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Solving irregular problems with High Performance Fortran

Solving irregular problems with High Performance Fortran

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Working conference on Massively parallel Programming Models

作者： P. Mehrotra J. Van Rosendale H. Zima MS 132C NASA Langely Research Center ICASE Hampton VA USA Institute for Software Technology and Parallel Systems University of Technology Vienna Vienna Austria

High Performance Fortran (HPF) provides a high-level interface for data-parallel scientific applications, while delegating to the compiler the task of generating an explicitly parallel message-passing program. The main objective of this paper is to study the applicability of the language to a class of irregular scientific applications. After giving an outline of developments that led to HPF and shortly explaining its major features, we discuss a variety of approaches for solving multiblock problems and applications dealing with unstructured meshes. We show that the efficient solution of these problems does not only need the full range of the HPF approved extensions, but also requires additional features such as the explicit control of communication schedules and support for value-based alignment.

关键词： NASA Communication system control Contracts Space technology Application software Program processors Yarn Transportation parallel processing distributed computing

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Permutation mapping for MIN using high level net models

Permutation mapping for MIN using high level net models

引用

International conference on parallel and distributed Systems (ICPADS)

作者： N. Chaki S. Bhattacharya Department of Computer Science & Engineering Technical Teachers Training Institute Calcutta India Department of Computer Science & Engineering Jadavpur University Calcutta India

This paper proposes to structurise the analysis of the performance of Multistage Interconnection Networks (MINs). A new type of High level net, named Modified Petri net (MP-net) which has subsequently been refined to S-net, has been defined in the process. Essentially, a variation of Coloured and Stochastic nets, this S-net has been shown to be a very effective tool for dynamic modelling of MINs. The results reported so far in the context of performance estimation of MINs, are mainly based on direct combinatorial analysis of the concerned networks with very little consideration towards the modelling aspects. The outcome of the present research work may be utilized for modelling of a wide range of MINs consisting of 2/spl times/2 crossbar switches. Multistage redundant path networks like Omega and non-redundant path networks such as Baseline network have been considered and modelled with S-net as a case study. It has also been established that using S-net, a MIN of N/spl times/N size can be modelled with 3N/2 number of places as against O(Nlog/sub 2/N) no. of switching elements for the equivalent MIN. Using the S-net model connectivity status of constituent cross-bar switches of a MIN, has been represented in a matrix, proposed to be termed as Control matrix. An algorithm has been developed to study and modify entries of the control matrix to analyse performance of MIN using S-net model.

关键词： Petri nets Performance analysis Multiprocessor interconnection networks Stochastic processes Context modeling Switches Fires Cities and towns Computer networks Concurrent computing

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parallel execution of radix sort program using fine-grain communication

Parallel execution of radix sort program using fine-grain co...

引用

International conference on parallel Architecture and Compilation Techniques (PACT)

作者： Y. Kodama M. Sato H. Sakane S. Sakai K. Hanpei Y. Yamaguchi Computer Science Division Electro Technical Laboratory Tsukuba Japan Real World Computing Tsukuba Research Center Tsukuba Japan Institute of Info. Science and Elec. University of Tsukuba Tsukuba Japan

The report presents empirical results of fine-grain communication on the 80-processor EM-X distributed-memory multiprocessor. EM-X has hardware support for low latency, high throughput fine-grain communication-this hardware support includes packet generation integrated into the instruction execution pipeline for single-cycle communication overhead, direct memory access for remote references, and rapid context switching for latency tolerance. The authors study the fine-grain communication performance of integer radix sort, a code with irregular communication, on EM-X, and compare it to the Fujitsu AP1000+ and the Cray Server CS6400. The experimental results indicate that EM-X achieves high throughput and low overhead for fine-grain communication. Whereas EM-X's communication performance scales perfectly as one increases the number of processors, other coarse-grain message-passing machines exhibit fluctuation and performance degradation for larger configurations due to network contention.

关键词： Hardware Delay Throughput Pipelines Context Packet switching Communication switching Network servers Fluctuations Degradation

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Faster simulation of timed Petri nets via distributed simulation

Faster simulation of timed Petri nets via distributed simula...

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IEEE Annual International Computer Software and Applications conference (COMPSAC)

作者： D. Kumar A. Kohli V. Narayanswamy Department of Computer SciencesThe City College and The Graduate Center University of New York NY USA Tata Consultancy Services Limited OH USA Alltel Information Serivices Inc. Twinsburg OH USA

In an earlier work (D. Kumar and S. Harous, 1990; 1994), we presented an approach towards the distributed simulation of timed Petri nets. This approach is based on some major changes to K.M. Chandy and J. Misra's (1979) null message based scheme. These changes were required because the well known distributed simulation schemes for discrete event systems do not directly apply to timed Petri nets due to the nonautonomous nature of place nodes in these systems. Moreover, our scheme incorporated several ideas to increase the degree of concurrency and to reduce the number of overhead messages in distributed simulation. We provide several algorithmic details to implement the above approach. The specific model of timed Petri nets that we assume here was also presented by us in the same earlier work.

关键词： Petri nets Computational modeling Concurrent computing Discrete event simulation parallel processing Fires distributed computing Cities and towns Educational institutions Computer simulation

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distributed processing: requirements for an object-oriented approach

Distributed processing: requirements for an object-oriented ...

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Annual Hawaii International conference on System Sciences (HICSS)

作者： R.M. Marsh L.M. Ott Michigan Technological University Houghton MI USA

Substantial benefits, such as increased code reusability, simplified maintainability, and improved reliability can be attained through the proper use of object oriented languages. Often, languages which claim to offer concurrency and object oriented features have exhibited significant inadequacies which impose limitations on the benefits. In addition, it is evident that there is no existing standard used by the designers of these languages. The lack of this consistency presents difficulty for programmers who would like to take advantage of an object oriented approach to distributed processing. Therefore, we combine the requirements for object oriented programming with those for distributed processing. Several solutions which have been proposed in the literature for advertised problems in the combination of distributed processing and object oriented programming languages are discussed and evaluated with respect to the paradigm which we present. These solutions are used to extend an existing language (ABCL/R3) to demonstrate that these features are compatible.

关键词： distributed processing Message passing Programming profession Object oriented programming Concurrent computing parallel programming Data structures Software reusability Hardware Maintenance

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Efficient methods for kr/spl rarr/r and r/spl rarr/kr array redistribution

Efficient methods for kr/spl rarr/r and r/spl rarr/kr array ...

引用

IEEE Annual International Computer Software and Applications conference (COMPSAC)

作者： Yeh-Ching Chung Ching-Hsien Hsu Department of Information Engineering Feng Chia University FCU Taichung Taiwan

Array redistribution is usually required to enhance algorithm performance in many parallel programs on distributed memory multicomputers. Since it is performed at run-time, there is performance tradeoff between the efficiency of new data decomposition for a subsequent phase of an algorithm and the cost of redistributing data among processors. We present efficient algorithms for array redistribution. The most significant improvement of our algorithms is that a processor does not need to construct the send/receive data sets for a redistribution. Based on the packing/unpacking information that derived from the BLOCK-CYCLIC(kr) to BLOCK-CYCLIC(r) redistribution (or vice versa), a processor can pack/unpack array elements into (from) messages directly. To evaluate the performance of our methods, we have implemented our methods along with Thakur's (1994) methods on an IBM SP2 parallel machine. The results show that the execution time of our algorithms is approximately 5% to 27% faster than that of Thakur's methods.

关键词： Phased arrays Runtime Costs parallel machines Contracts distributed computing

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parallelization of finite volume computations for heat transfer application using unstructured mesh partitioning algorithms

Parallelization of finite volume computations for heat trans...

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International conference on High Performance computing

作者： C. Singh Verma V.C.V. Rao Center for Development of Advanced Computing Pune University Campus Pune India Department of Computer Science University of Minnesota Minneapolis MN USA

An effective parallelization of finite volume computations for heat transfer application using unstructured triangular meshes and mesh partitioning algorithms are presented. The mesh partitioning software (METIS) is employed to create nearly load balanced subdomains and to minimize the interprocessor communications. Efficient data structures are developed to handle the neighboring element information at the interfaces of all subdomains and a simple strategy to overlap the computations to communications has been implemented for improving the performance of the program. The explicit time integration method is used and the results for the rectangular domain and L-shaped domain have been presented. The code (PHEAT2D) is written in Fortran90 and MPI for message passing is used. The algorithm is tested on distributed memory MIMD machine, PARAM OPENFRAME.

关键词： Concurrent computing Heat transfer Application software Temperature control Partitioning algorithms Data structures Computer interfaces Algorithm design and analysis parallel processing Equations

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An object-oriented data cache architecture for programmable parallel digital signal processors

An object-oriented data cache architecture for programmable ...

引用

IEEE International conference on Algorithms and Architectures for parallel Processing (ICAP)

作者： J. Kneip Laboratorium fir Informationstechnologie Universitat Hannover Hanover Germany

The paper describes concept and implementation of a data cache architecture with concurrent conflict free access to shared data for DSPs with parallel, synchronized processing units. It utilizes techniques known from object-oriented software design to achieve efficient and programmer friendly on-chip storage of data. The cache internally uses virtual 1D or 2D address spaces directly assigned to data structures instead of a conventional, linear address space. Data within the cache are distributed to a number of memory banks. Virtual local addresses are used for data location and hit/miss detection to minimize cost and memory latency. The object-oriented cache is fully transparent to programmer and compiler, reduces the amount of address calculations to be performed, exploits the 2D spatial locality typical for image processing algorithms and can be integrated into a standard RISC processor pipeline.

关键词： Computer architecture Programming profession Digital signal processing Software design Data structures Costs Delay Program processors Image processing Reduced instruction set computing

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EH/sup */-extendible hashing in a distributed environment

EH/sup */-extendible hashing in a distributed environment

引用

IEEE Annual International Computer Software and Applications conference (COMPSAC)

作者： V. Hilford F.B. Bastani B. Cukic Department of Computer Science University of Houston Houston TX USA Department of Electrical and Computer Engineering West Virginia University Morgantown WV USA

In today's world of computers, dealing with huge amounts of data is not unusual. The need to distribute this data in order to increase its availability and increase the performance of accessing it is more urgent than ever. For these reasons it is necessary to develop scalable distributed data structures. We propose EH*, a distributed variant of the Extendible Hashing data structure. It consists of buckets of data that are spread across multiple servers and autonomous clients that can access these buckets in parallel. EH* is scalable in the sense that it grows gracefully, one bucket at a time, to a large number of servers. The communication overhead is relatively independent of the number of servers and clients in the system. EH* offers a high query efficiency and good storage space utilization. The simulation results reveal that the method is comparable to the LH* introduced by W. Litwin (1993).

关键词： Data structures Information retrieval Computer science Contracts distributed computing Ear Read-write memory

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Efficient algorithms for multi-dimensional block-cyclic redistribution of arrays

Efficient algorithms for multi-dimensional block-cyclic redi...

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International conference on parallel Processing (ICPP)

作者： Young Won Lim Neungsoo Park V.K. Prasanna Department of EE-Systems EEB200C University of Southern California Los Angeles CA USA

We present a uniform framework for a classical problem, redistribution of a multi-dimensional array. Using a generalized circulant matrix formalism, we derive efficient direct, indirect and hybrid contention-free communication schedules. Our indirect schedule reduces the number of communication steps significantly compared with the previous approaches. Our approach exploits the regularity of the block-cyclic redistribution to minimize the index computation overheads. For the case of 2-d redistribution, when the block size increases by factors of K/sub 1/ and K/sub 2/ along each dimension and the process topology remains fixed, our indirect schedule performs the redistribution in O(log(K/sub 1/K/sub 2/)) communication steps. For the case of fixed block size and the processor topology is transposed, our indirect schedule results in O(log(L/G)) communication steps. Implementations of our algorithms on the IBM SP-2 show superior performance over previous approaches.

关键词： Processor scheduling Topology distributed computing Signal processing algorithms Application software Radar signal processing Program processors Programming profession Costs Phased arrays

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