This paper presents a parallel implementation of connected component labeling algorithms for gray and binary images on a one-dimensional DSP array. The system is a distributed memory MIMD and all the algorithms are de...
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This paper presents a parallel implementation of connected component labeling algorithms for gray and binary images on a one-dimensional DSP array. The system is a distributed memory MIMD and all the algorithms are developed considering this platform. Performance results of several parallel connected component labeling methods are evaluated. The multi-DSP system has demonstrated a viable performance.
Very long running queries in database systems are not uncommon in non traditional application domains such as imageprocessing or data warehousing analysis. Query optimization, therefore, is important. However, estima...
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Very long running queries in database systems are not uncommon in non traditional application domains such as imageprocessing or data warehousing analysis. Query optimization, therefore, is important. However, estimates of the query characteristics before query execution are usually inaccurate. Further, system configuration and resource availability may change during long evaluation period. As a result, queries are often evaluated with sub-optimal plan configurations. To remedy this situation, we have designed a novel approach to re-optimize suboptimal query plan configurations on-the-fly with Conquest, an extensible and distributed query processing system. A dynamic optimizer considers reconfiguration cost as well as execution cost in determining the best query plan configuration. Experimental results are presented.
The wavelet transform is a popular signal processing technique, particularly due to its impressive results in data compression. Its usefulness includes two-dimensional data for use in imageprocessing and three-dimens...
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ISBN:
(纸本)081942143X
The wavelet transform is a popular signal processing technique, particularly due to its impressive results in data compression. Its usefulness includes two-dimensional data for use in imageprocessing and three-dimensional data for use in video processing. In imageprocessing, the current trends are for image sizes which require a substantial amount of computing power;an application processing a 1024 by 1024 standard quality image requires many millions of processing steps per image frame. When processing sequences of these images for video, the throughput required is considerable in order to attain even low display rates. Three-based architectures have been proposed to provide this throughput rate by processing pixels in a data parallel fashion. Each level of the wavelet transform is processed using an array or a plane of processing elements operating in parallel on shared or distributed data. The largest of these architectures, the plane-based H-tree design, provides a real-time, pipelineable implementation of the 2DWT, but is costly in terms of VLSI area due to its requirement of O(n2) processors for a n by n data-set. In this paper, we look at methods for improving the practicality of these architectures by reducing the required area for a given problem size. This is achieved by adding extra processors at the root of the tree, which allows processing of larger images with an insignificant addition of hardware in exchange for a detrimental effect on the processing speed. We conclude the paper by presenting area/time trade-offs which can be used to evaluate cost/performance specifications.
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