This paper presents anew technique for automatically creating analog circuit models. The method extracts piecewise linear models from trained neural networks. A model is a set of linear dependencies between circuit pe...
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ISBN:
(纸本)078037634X
This paper presents anew technique for automatically creating analog circuit models. The method extracts piecewise linear models from trained neural networks. A model is a set of linear dependencies between circuit performances and design parameters. The paper illustrates the technique for an OTA circuit for which models for gain and bandwidth are generated. As experiments show the obtained models have a simple form that accurately fits the sampled points. These models are useful for fast simulation of systems with non-linear behavior and performances.
Scientists have long relied on abstract models to study phenomena that are too complex for direct observation and experimentation. As new scientific modeling methodologies emerge, new computing technologies must be de...
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ISBN:
(纸本)0769522564
Scientists have long relied on abstract models to study phenomena that are too complex for direct observation and experimentation. As new scientific modeling methodologies emerge, new computing technologies must be developed. In this paper we focus on entity-level modeling, a modeling approach that is gaining prevalence in many scientific fields. Although the principles of entity-level modeling are straightforward, entity-level simulations require a large amount of compute resource and grid platforms can meet such resource needs. Unfortunately, efficient large-scale distributed entity-level simulations have proven elusive, typically due to non-determinism that renders classical distributed application deployment strategies ineffective. In this work, we propose a method for dynamically remapping application tasks to cope with this inherent non-determinism. We evaluate the efficacy of this method in a simulated grid computing environment and discuss the feasibility of executing entity-level applications on grids.
During the last 10 years, the use of computer simulation at IC level has become prevalent in the design process. As the size of designs has increased rapidly, the same simulations have become progressively more diffic...
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ISBN:
(纸本)0780372913
During the last 10 years, the use of computer simulation at IC level has become prevalent in the design process. As the size of designs has increased rapidly, the same simulations have become progressively more difficult to perform, to the extent that the simulations have become less of a design tool and more of a bureaucratic step to be carried out. Behavioural modelling offers a practical route to achieving productive simulation, by allowing what-if analyses, or component variations to improve the design prior to and concurrently with the progression of the design to Silicon implementation. In this paper, the positive use of behavioural modelling, multi-level modelling and mixed-signal simulation is highlighted, based on the authors' experience during a practical mixed-signal ASIC design project. The benefits and drawbacks of such an approach are discussed, with the key aspects identified that led to the project's successful completion.
This paper applies an average modeling technique to different types of switched-capacitor DC-DC converters, taking into account the circuit non-ideal parameters. An extensive set of experiments were carried out to tes...
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ISBN:
(纸本)0780397428
This paper applies an average modeling technique to different types of switched-capacitor DC-DC converters, taking into account the circuit non-ideal parameters. An extensive set of experiments were carried out to test the validity of each model. The results show acceptable accuracy and simulation speed gain of several thousand times. This speed gain is achieved due to relaxation of the simulation timestep as opposed to traditional modeling and simulation techniques, where the simulator timestep is bound by the switching frequency. This modeling approach is most suitable for system level simulations where accuracy can be traded-off for speed.
Many circuits such as flip-flops, Schmitt triggers, and negative resistance circuits have multiple dc solutions. The same problem can occur in electrical non-electrical devices. For many years homotopy techniques have...
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ISBN:
(纸本)0780381351
Many circuits such as flip-flops, Schmitt triggers, and negative resistance circuits have multiple dc solutions. The same problem can occur in electrical non-electrical devices. For many years homotopy techniques have been investigated to obtain the multiple solutions. We present a method that establishes the resulting curve-tracing problem as a network analysis problem using the hardware description language VHDL-AMS. Thus, the curve-tracing problem can be solved with an available VHDL-AMS simulation engine. A special customized simulator is not necessary. The methodology can also be applied to the calculation of transfer characteristics and turning points. This allows e. g. the determination of pull-in voltages in MEMS.
This paper presents the selective orthogonal matrix least-squares (SOM-LS) method for representing a multiport network characterized by sampled data with the rational matrix. Recently, it is needed in a circuit design...
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ISBN:
(纸本)0780381351
This paper presents the selective orthogonal matrix least-squares (SOM-LS) method for representing a multiport network characterized by sampled data with the rational matrix. Recently, it is needed in a circuit design to evaluate physical effects of interconnects and package, and the evaluation is done by numerical electromagnetic analysis or measurement by network analyzer. Here, the SOM-LS method will play an important role for generating the macromodels of interconnects and package in circuit simulation level. The accuracy of the macromodels is predictable and controllable, that is, the SOM-LS method fits the rational matrix to the sampled data, selecting the dominant poles of the rational matrix. In examples, simple PCB models are analyzed, where the rational matrices are described by Verilog-A, and some simulations are carried out on a commercial circuit simulator.
This work formulates the resource allocation problem on grids as a knapsack problem. The notion of utility is introduced, and it is used to effect allocation policies. simulation results using a variety of allocation ...
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ISBN:
(纸本)0769522564
This work formulates the resource allocation problem on grids as a knapsack problem. The notion of utility is introduced, and it is used to effect allocation policies. simulation results using a variety of allocation policies are presented and show that knapsack formulations optimally allocate resources congruent with the chosen policies.
A three dimensional free-space optical library is developed and implemented using C language inside a SPICE simulator for accurate and realistic co-simulation with electronic and electromechanical elements. A parametr...
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ISBN:
(纸本)0780397428
A three dimensional free-space optical library is developed and implemented using C language inside a SPICE simulator for accurate and realistic co-simulation with electronic and electromechanical elements. A parametric, transient, and Monte-Carlo simulation of a 2x2 optical switch is demonstrated using this library.
Hardware description languages, mainly Verilog and VHDL including their analog and mixed-signal extensions, represent a significant investment by the electronic design automation community. Hardware description langua...
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ISBN:
(纸本)078039352X
Hardware description languages, mainly Verilog and VHDL including their analog and mixed-signal extensions, represent a significant investment by the electronic design automation community. Hardware description language technology promises productivity advances such as a medium for intellectual property exchange, model portability, model productivity, greater design collaboration, top-down design for AMS, AMS synthesis, and richer mixed-level, mixed-signal simulation for improved simulation throughput. modeling tools represent a step toward completion of the dwelling the EDA community seeks to build upon the hardware description language foundation. One such environment of tools is described in this tutorial on Paragon. Paragon will be described and demonstrated on both behavioral models using multiple HDLs and compact device modeling applications involving Verilog-A primarily.
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