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检索条件"任意字段=Proceedings of the 23rd ACM SIGPLAN Symposium on Principles and Practice of Parallel Programming"

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proceedings of the 23rd International symposium on principles and practice of Declarative programming, PPDP 2021, co-located with LOPSTR 2021 - 31st International symposium on Logic-Based Program Synthesis and Transformation

Proceedings of the 23rd International Symposium on Principle...

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23rd International symposium on principles and practice of Declarative programming, PPDP 2021, co-located with the 31st International symposium on Logic-Based Program Synthesis and Transformation, LOPSTR 2021

ISBN: (纸本)9781450386890

The proceedings contain 21 papers. The topics discussed include: programming languages techniques for controlling generalization errors in adaptive data analysis;the computational structure of programs and the universe;reflecting stacked continuations in a fine-grained direct-style reduction theory;a derived reasonable abstract machine for strong call by value;canonical proof-objects for coinductive programming: infinets with infinitely many cuts;confluence in non-left-linear untyped higher-order rewrite theories;static analysis of pattern-free properties,;a superposition-based calculus for diagrammatic reasoning;and free objects in constraint-logic object-oriented programming.

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Scheduling parallel Programs by Work Stealing with Private Deques 13

Scheduling Parallel Programs by Work Stealing with Private D...

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18th acm sigplan symposium on principles and practice of parallel programming

作者： Acar, Umut A. Chargueraud, Arthur Rainey, Mike Carnegie Mellon Univ Dept Comp Sci Pittsburgh PA 15213 USA Univ Paris 11 CNRS LRI Orsay France

ISBN: (纸本)9781450319225

Work stealing has proven to be an effective method for scheduling parallel programs on multicore computers. To achieve high performance, work stealing distributes tasks between concurrent queues, called deques, which are assigned to each processor. Each processor operates on its deque locally except when performing load balancing via steals. Unfortunately, concurrent deques suffer from two limitations: 1) local deque operations require expensive memory fences in modern weak-memory architectures, 2) they can be very difficult to extend to support various optimizations and flexible forms of task distribution strategies needed many applications, e. g., those that do not fit nicely into the divide-and-conquer, nested data parallel paradigm. For these reasons, there has been a lot recent interest in implementations of work stealing with non-concurrent deques, where deques remain entirely private to each processor and load balancing is performed via message passing. Private deques eliminate the need for memory fences from local operations and enable the design and implementation of efficient techniques for reducing task-creation overheads and improving task distribution. These advantages, however, come at the cost of communication. It is not known whether work stealing with private deques enjoys the theoretical guarantees of concurrent deques and whether they can be effective in practice. In this paper, we propose two work-stealing algorithms with private deques and prove that the algorithms guarantee similar theoretical bounds as work stealing with concurrent deques. For the analysis, we use a probabilistic model and consider a new parameter, the branching depth of the computation. We present an implementation of the algorithm as a C++ library and show that it compares well to Cilk on a range of benchmarks. Since our approach relies on private deques, it enables implementing flexible task creation and distribution strategies. As a specific example, we show how to impleme

关键词： work stealing nested parallelism dynamic load balancing

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Cache-oblivious wavefront: Improving parallelism of recursive dynamic programming algorithms without losing cache-efficiency 2015

Cache-oblivious wavefront: Improving parallelism of recursiv...

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20th acm sigplan symposium on principles and practice of parallel programming, PPoPP 2015

作者： Tang, Yuan You, Ronghui Kan, Haibin Tithi, Jesmin Jahan Ganapathi, Pramod Chowdhury, Rezaul A. Software School School of Computer Science Fudan University Shanghai Key Laboratory of Intelligent Information Processing Shanghai China Department of Computer Science Stony Brook University Stony BrookNY11790 United States

ISBN: (纸本)9781450332057

State-of-the-art cache-oblivious parallel algorithms for dynamic programming (DP) problems usually guarantee asymptotically optimal cache performance without any tuning of cache parameters, but they often fail to exploit the theoretically best parallelism at the same time. While these algorithms achieve cache-optimality through the use of a recursive divide-and-conquer (DAC) strategy, scheduling tasks at the granularity of task dependency introduces artificial dependencies in addition to those arising from the defining recurrence equations. We removed the artificial dependency by scheduling tasks ready for execution as soon as all its real dependency constraints are satisfied, while preserving the cache-optimality by inheriting the DAC strategy. We applied our approach to a set of widely known dynamic programming problems, such as Floyd-Warshall's All-Pairs Shortest Paths, Stencil, and LCS. Theoretical analyses show that our techniques improve the span of 2-way DAC-based Floyd Warshall's algorithm on an n node graph from Θ(nlog2 n) to Θ(n), stencil computations on a d-dimensional hypercubic grid of width w for h time steps from Θ ((d2h) wlog(d+2)-1) to Θ(h), and LCS on two sequences of length n each from Θ (nlog23) to Θ(n). In each case, the total work and cache complexity remain asymptotically optimal. Experimental measurements exhibit a 3-5 times improvement in absolute running time, 10-20 times improvement in burdened span by Cilkview, and approximately the same L1/L2 cache misses by PAPI. Copyright 2015 acm.

关键词： parallel algorithms

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Scalable Deterministic Replay in a parallel Full-system Emulator 13

Scalable Deterministic Replay in a Parallel Full-system Emul...

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18th acm sigplan symposium on principles and practice of parallel programming

作者： Chen, Yufei Chen, Haibo Fudan Univ Sch Comp Sci Shanghai Peoples R China Shanghai Jiao Tong Univ Inst Parallel & Distributed Syst Shanghai 200030 Peoples R China

ISBN: (纸本)9781450319225

Full-system emulation has been an extremely useful tool in developing and debugging systems software like operating systems and hypervisors. However, current full-system emulators lack the support for deterministic replay, which limits the reproducibility of concurrency bugs that is indispensable for analyzing and debugging the essentially multi-threaded systems software. This paper analyzes the challenges in supporting deterministic replay in parallel full-system emulators and makes a comprehensive study on the sources of non-determinism. Unlike application-level replay systems, our system, called ReEmu, needs to log sources of non-determinism in both the guest software stack and the dynamic binary translator for faithful replay. To provide scalable and efficient record and replay on multicore machines, ReEmu makes several notable refinements to the CREW protocol that replays shared memory systems. First, being aware of the performance bottlenecks in frequent lock operations in the CREW protocol, ReEmu refines the CREW protocol with a seqlock-like design, to avoid serious contention and possible starvation in instrumentation code tracking dependence of racy accesses on a shared memory object. Second, to minimize the required log files, ReEmu only logs minimal local information regarding accesses to a shared memory location, but instead relies on an offline log processing tool to derive precise shared memory dependence for faithful replay. Third, ReEmu adopts an automatic lock clustering mechanism that clusters a set of uncontended memory objects to a bulk to reduce the frequencies of lock operations, which noticeably boost performance. Our prototype ReEmu is based on our open-source COREMU system and supports scalable and efficient record and replay of full-system environments (both x64 and ARM). Performance evaluation shows that ReEmu has very good performance scalability on an Intel multicore machine. It incurs only 68.9% performance overhead on average (ranging

关键词： Algorithms Performance Reliability Scalable Deterministic Replay Full-system Emulator

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Teaching parallel computing to science faculty: Best practices and common pitfalls

Teaching parallel computing to science faculty: Best practic...

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2006 acm sigplan symposium on principles and practice of parallel programming, PPOPP'06

作者： Joiner, David A. Gray, Paul Murphy, Thomas Peck, Charles Kean University 1000 Morris Ave Union NJ 07083 University of Northern Iowa 1227 West 27th St Cedar Falls IA 50614 Contra Costa College 2600 Mission Bell Dr San Pablo CA 94806 Earlham College 801 National Rd West Richmond IN 47374

ISBN: (纸本)1595931899

In 2002, we first brought High Performance Computing (HPC) methods to the college classroom as a way to enrich Computational Science education. Through the years, we have continued to facilitate college faculty in science, technology, engineering, and mathematics (STEM) disciplines to stay current with HPC methodologies. We have accomplished this by designing and delivering faculty workshops, hosted in a variety of lab settings, as well as by developing tools supporting the technical infrastructure necessary for HPC education, all this without requiring access to traditional HPC computing platforms. In all, we have so far presented 16 professional development workshops for close to 400 predominantly undergraduate STEM faculty. This paper presents the result of internal formative evaluation by workshop instructors and the materials and tools developed during that process. We did this work as part of the National Computational Science Institute (NCSI) and in collaboration with the following groups: The Minority Serving Institutions - High Performance Computing (MSI-HPC) program of the National Computational Science Alliance The Consortium for Computing Sciences in Colleges (CCSC) The Center for Excellence in High Performance Computing The Oklahoma University Supercomputing symposium series The Super Computing (SC) conference series education program We presented learners with a sequence of interactive, "run it, modify it, build it" open-ended lab exercises drawn from a variety of disciplines. Interactivity means having the ability to change parallel and algorithmic parameters, e.g. running software on more than one machine, using different models, refining the model, changing the problem scale, using different parallel algorithms. There is a lack of scientific parallel curricula suitable for illustrating Computational Science principles in the classroom. We addressed this need by locating, and where necessary creating, suitable open source software, data-sets, and cur

关键词： parallel processing systems

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The integration of application and system based metrics in a parallel program performance tool 91

The integration of application and system based metrics in a...

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3rd acm sigplan symposium on principles and practice of parallel programming, PPOPP 1991

作者： Hollingsworth, Jeflrey K. Bruce Irvin, R. Miller, Barton P. Computer Sciences Department University of Wiseonsin-Madison 1210 W. Dayton Street MadisonWI53706 United States

ISBN: (纸本)0897913906

The IPS-2 parallel program measurement tools provide performance data from application programs, the operating system, hardware, network, and other sources. Previous versions of IPS-2 allowed programmers to collect information about an application based only on what could be collected by software instrumentation inserted into the program (and system call libraries). We have developed an open interface, called the "external time histogram", providing a graceful way to include external data from many sources. The user can tell IPS-2 of new sources of performance data through an extensible metric description language. The data from these external sources is automatically collected when the application program is run. IPS-2 provides a library to simplify constructing the external data collectors. The new version of IPS-2 can measure sharedmemory and message-passing parallel programs running on a heterogeneous collection of machines. Data from C or Fortran programs, and data from simulations ean be processed by the same tool. As a result of including the new external performance data, IPS-2 now can report on a whole new set of performance problems. We describe the results of using IPS-2 on two real applications: A shared-memory database join utility, and a multi-processor interconnection network simulator. Even though these applications previously went through careful tuning, we were able to precisely identify performance problems and extract additional performance improvements of about 30%. © 1991 Association for Computing Machinery. All Rights Reserved.

关键词： Application programs

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Revealing parallel scans and reductions in sequential loops through function reconstruction 18

Revealing parallel scans and reductions in sequential loops ...

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proceedings of the 23rd acm sigplan symposium on principles and practice of parallel programming

作者： Peng Jiang Gagan Agrawal The Ohio State University

ISBN: (纸本)9781450349826

Many sequential loops are actually scans or reductions and can be parallelized across iterations despite the loop-carried dependences. In this work, we consider the parallelization of such scan/reduction loops, and propose a practical runtime approach called sampling-and-reconstruction to extract the hidden scan/reduction patterns in these loops.

关键词： loop parallelization

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A Peta-scalable CPU-GPU Algorithm for Global Atmospheric Simulations 13

A Peta-scalable CPU-GPU Algorithm for Global Atmospheric Sim...

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18th acm sigplan symposium on principles and practice of parallel programming

作者： Yang, Chao Xue, Wei Fu, Haohuan Gan, Lin Li, Linfeng Xu, Yangtong Lu, Yutong Sun, Jiachang Yang, Guangwen Zheng, Weimin Chinese Acad Sci Inst Software Beijing Peoples R China Tsinghua Univ Dept Comp Sci & Technol Beijing 100084 Peoples R China Tsinghua Univ Minist Educ Key Lab Earth Syst Modeling Beijing 100084 Peoples R China Tsinghua Univ Ctr Earth Syst Sci Beijing 100084 Peoples R China Natl Univ Def Technol Dept Comp Sci & Technol Changsha Hunan Peoples R China Chinese Acad Sci State Key Lab Space Weather Beijing Peoples R China

ISBN: (纸本)9781450319225

Developing highly scalable algorithms for global atmospheric modeling is becoming increasingly important as scientists inquire to understand behaviors of the global atmosphere at extreme scales. Nowadays, heterogeneous architecture based on both processors and accelerators is becoming an important solution for large-scale computing. However, large-scale simulation of the global atmosphere brings a severe challenge to the development of highly scalable algorithms that fit well into state-of-the-art heterogeneous systems. Although successes have been made on GPU-accelerated computing in some top-level applications, studies on fully exploiting heterogeneous architectures in global atmospheric modeling are still very less to be seen, due in large part to both the computational difficulties of the mathematical models and the requirement of high accuracy for long term simulations. In this paper, we propose a peta-scalable hybrid algorithm that is successfully applied in a cubed-sphere shallow-water model for global atmospheric simulations. We employ an adjustable partition between CPUs and GPUs to achieve a balanced utilization of the entire hybrid system, and present a pipe-flow scheme to conduct conflict-free inter-node communication on the cubed-sphere geometry and to maximize communication-computation overlap. Systematic optimizations for multithreading on both GPU and CPU sides are performed to enhance computing throughput and improve memory efficiency. Our experiments demonstrate nearly ideal strong and weak scalabilities on up to 3,750 nodes of the Tianhe-1A. The largest run sustains a performance of 0.8 Pflops in double precision (32% of the peak performance), using 45,000 CPU cores and 3,750 GPUs.

关键词： parallel algorithm atmospheric modeling GPU heterogeneous system communication-computation overlap scalability

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A Study of Transactional Memory vs. Locks in practice 11

A Study of Transactional Memory vs. Locks in Practice

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23rd Annual symposium on parallelism in Algorithms and Architectures

作者： Pankratius, Victor Adl-Tabatabai, Ali-Reza Karlsruhe Inst Technol D-76131 Karlsruhe Germany

ISBN: (纸本)9781450307437

Transactional Memory (TM) promises to simplify parallel programming by replacing locks with atomic transactions. Despite much recent progress in TM research, there is very little experience using TM to develop realistic parallel programs from scratch. In this paper, we present the results of a detailed case study comparing teams of programmers developing a parallel program from scratch using transactional memory and locks. We analyze and quantify in a realistic environment the development time, programming progress, code metrics, programming patterns, and ease of code understanding for six teams who each wrote a parallel desktop search engine over a fifteen week period. Three randomly chosen teams used Intel's Software Transactional Memory compiler and Pthreads, while the other teams used just Pthreacls. Our analysis is exploratory: Given the same requirements, how far did each team get? The TM teams were among the first to have a prototype parallel search engine. Compared to the locks teams, the TM teams spent less than half the time debugging segmentation faults, but had more problems tuning performance and implementing queries. Code inspections with industry experts revealed that TM code was easier to understand than locks code, because the locks teams used many locks (up to thousands) to improve performance. Learning from each team's individual success and failure story, this paper provides valuable lessons for improving TM.

关键词： transactional memory

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Reducing the burden of parallel loop schedulers for many-core processors 18

Reducing the burden of parallel loop schedulers for many-cor...

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proceedings of the 23rd acm sigplan symposium on principles and practice of parallel programming

作者： Mahwish Arif Hans Vandierendonck Queen's University Belfast

ISBN: (纸本)9781450349826

This work proposes a low-overhead half-barrier pattern to schedule fine-grain parallel loops and considers its integration in the Intel OpenMP and Cilkplus schedulers. Experimental evaluation demonstrates that the scheduling overhead of our techniques is 43% lower than Intel OpenMP and 12.1x lower than Cilk. We observe 22% speedup on 48 threads, with a peak of 2.8x speedup.

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