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检索条件"任意字段=Proceedings of the 23rd Conference on Design, Automation and Test in Europe"
272 条 记 录,以下是21-30 订阅
排序:
An Embedded Process Monitor test Chip Architecture
An Embedded Process Monitor Test Chip Architecture
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IEEE 23rd International conference on Microelectronic test Structures (ICMTS)
作者: Idgunji, Sachin Chandra, Vikas Pietrzyk, Cezary Iqbal, Imran Aitken, Rob Yeric, Greg ARM Res & Dev San Jose CA USA ARM Res & Dev Austin TX USA
We present a test chip architecture which embeds a thorough set of process characterization ring oscillators into a synthesized digital circuit, such as a processor core. We discuss the motivation, implementation, and... 详细信息
来源: 评论
Towards Flexible and Automated testing in Production Systems Engineering Projects  23
Towards Flexible and Automated Testing in Production Systems...
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23rd IEEE International conference on Emerging Technologies and Factory automation (ETFA)
作者: Winkler, Dietmar Meixner, Kristof Biffl, Stefan Tech Univ Wien Christian Doppler Lab Secur & Qual Improvement Pr Vienna Austria Tech Univ Wien Inst Informat Syst Engn Informat & Software Engn Vienna Austria
Automated and systematic testing of automation systems (AS) and production systems (PS) require an integrated testing tool chain for test case development, execution and reporting. In practice, the test automation too... 详细信息
来源: 评论
X -Tolerant Logic BIST for Automotive designs using Observation Scan Technology  37
X -Tolerant Logic BIST for Automotive Designs using Observat...
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37th International conference on VLSI design (VLSID) / 23rd International conference on Embedded Systems (ES)
作者: Harith, Ashrith S. Liu, Yingdi Mukherjee, Nilanjan Mayer, Jeff Siemens Digital Ind Software Wilsonville OR 97070 USA
Due to recent trends and rapid automation, the percentage of electronics in automobiles has grown at a rapid pace. This includes complex safety critical components, such as Advanced Driver Assistance Systems (ADAS) an... 详细信息
来源: 评论
Genetic Algorithm Based Efficient Grouping Technique for Post Bond test and Crosstalk Faults Among TSVs  37
Genetic Algorithm Based Efficient Grouping Technique for Pos...
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37th International conference on VLSI design (VLSID) / 23rd International conference on Embedded Systems (ES)
作者: Kaibartta, Tanusree Arora, Hitarth Das, Debesh Kumar IITISM Comp Sci & Engn Dhanbad Bihar India Jadavpur Univ Comp Sci & Engn Kolkata India
Through-silicon-via (TSV) is considered as a critical component in 3D integration that extends Moore's Law. Efficient testing for correct operation of TSVs is essential for 3D integrated circuit design. In this pa... 详细信息
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ADC test Methods using an impure Stimulus: a Survey  23
ADC Test Methods using an impure Stimulus: a Survey
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23rd IEEE european test Symposium (ETS)
作者: Schat, Jan NXP Semicond Hamburg Germany
testing high-resolution ADCs with impure test signals can be done by applying first the original test signal to the ADC, and then the same signal with a DC offset. The two output data sets then have a lot of redundanc... 详细信息
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A method of optimization selecting test points by inverse process  23
A method of optimization selecting test points by inverse pr...
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23rd ISSAT International conference on Reliability and Quality in design 2017
作者: Hou, Wenkui Zhang, Zhiming School of Reliability and System Engineering Beihang University Beijing China
With the complexity of the structure of electronic products, testability design has been widely concerned. In the testability design, the selection of test points is an important part of the testability design. Based ... 详细信息
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Hamming Distance Based Reordering and Columnwise Bit Stuffing with Difference Vector: A Better Scheme for test Data Compression with Run Length Based Codes
Hamming Distance Based Reordering and Columnwise Bit Stuffin...
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23rd International conference on VLSI design/9th International conference on Embedded Systems
作者: Mehta, Usha S. Dasgupta, Kankar S. Devashrayee, Niranjan M. Nirma Univ Ahmedabad Inst Technol Ahmadabad Gujarat India ISRO Space Applicat Ctr Ahmadabad Gujarat India
Because of increased design complexity and advanced fabrication technologies, the number of tests and corresponding data volume increases rapidly As the large size of test data volume is becoming one of the major prob... 详细信息
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Sense Amplifier Offset Characterisation and test Implications for Low-Voltage SRAMs in 65 nm  23
Sense Amplifier Offset Characterisation and Test Implication...
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23rd IEEE european test Symposium (ETS)
作者: Patel, Dhruv Wright, Derek Sachdev, Manoj Univ Waterloo Dept Elect & Comp Engn Waterloo ON N2L 3G1 Canada Univ Toronto Dept Elect & Comp Engn Toronto ON M5S 3G4 Canada
Variability in offset voltage, bitcell transistor conductance, and leakage currents can lead to marginal and intermittent failures in low-voltage SRAMs. In this paper, we develop a model of these marginal faults that ... 详细信息
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Recap of the 23rd Asia and South Pacific design automation conference (ASP-DAC)
Recap of the 23rd Asia and South Pacific Design Automation C...
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作者: Shin, Youngsoo KAIST Korea Republic of
The 23rd Asia and South Pacific design automation conference (ASP-DAC) was held at the International Convention Center, Jeju Island, South Korea, on 22-25 January 2018. ASP-DAC was founded in 1995 and has continuously... 详细信息
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Efficient test-data compression for IP cores using multilevel Huffman coding
Efficient test-data compression for IP cores using multileve...
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design, automation and test in europe conference and Exhibition (DATE 06)
作者: Kavousianos, X. Kalligeros, E. Nikolos, D. Univ Ioannina Dept Comp Sci GR-45110 Ioannina Greece Univ Patras Dept Comp Engn & Informat Patras GR- 26500 Greece Res Acad Comp Tech Inst Patras GR- 26500 Greece
In this paper we introduce a new test-data compression method for IP cores with unknown structure. The proposed method encodes the test data provided by the core vendor using a new, very effective compression scheme b... 详细信息
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