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检索条件"任意字段=Proceedings of the 24th Symposium on Principles and Practice of Parallel Programming"

共 364 条记录，以下是181-190 订阅

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Software caching and computation migration in Olden 95

Software caching and computation migration in Olden

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proceedings of the 5th ACM SIGPLAN symposium on principles and practice of parallel programming

作者： Carlisle, Martin C. Rogers, Anne Princeton Univ Princeton NJ United States

ISBN: (纸本)9780897917001

the goal of the Olden project is to build a system that provides parallelism for general purpose C programs with minimal programmer annotations. We focus on programs using dynamic structures such as trees, lists, and DAGs. We demonstrate that providing both software caching and computation migration can improve the performance of these programs, and provide a compile-time heuristic that selects between them for each pointer dereference. We have implemented a prototype system on the thinking Machines CM-5. We describe our implementation and report on experiments with ten benchmarks.

关键词： parallel processing systems

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Efficient support for irregular applications on distributed-memory machines

Efficient support for irregular applications on distributed-...

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proceedings of the 5th ACM SIGPLAN symposium on principles and practice of parallel programming

作者： Mukherjee, Shubhendu S. Sharma, Shamik D. Hill, Mark D. Larus, James R. Rogers, Anne Saltz, Joel Univ of Wisconsin-Madison Madison United States

Irregular computation problems underlie many important scientific applications. Although these problems are computationally expensive, and so would seem appropriate for parallel machines, their irregular and unpredictable run-time behavior makes this type of parallel program difficult to write and adversely affects run-time performance. this paper explores three issues - partitioning, mutual exclusion, and data transfer - crucial to the efficient execution of irregular problems on distributed-memory machines. Unlike previous work, we studied the same programs running in three alternative systems on the same hardware base (a thinking Machines CM-5): the CHAOS irregular application library, Transparent Shared Memory (TSM), and extensible Shared Memory (XSM). CHAOS and XSM performed equivalently for all three applications. Both systems were somewhat (13%) to significantly faster (991%) than TSM.

关键词： parallel processing systems

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Performance implications of communication mechanisms in all-software global address spaces systems

Performance implications of communication mechanisms in all-...

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proceedings of the 1997 6th ACM SIGPLAN symposium on principles and practice of parallel programming

作者： Lim, Beng-Hong Chang, Chi-Chao Czajkowski, Grzegorz von Eicken, thorsten IBM Corp Yorktown Heights United States

Global addressing of shared data simplifies parallel programming and complements message passing models commonly found in distributed memory machines. A number of programming systems have been designed that synthesize global addressing purely in software on such machines. these systems provide a number of communication mechanisms to mitigate the effect of high communication latencies and overheads. this study compares the mechanisms in two representative all-software systems: CRL and Split-C. CRL uses region-based caching while Split-C uses split-phase and push-based data transfers for optimizing communication performance. Both systems take advantage of bulk data transfers. By implementing a set of parallel applications in both CRL and Split-C, and running them on the IBM SP2, Meiko CS-2 and two simulated architectures, we find that split-phase and push-based bulk data transfers are essential for good performance. Region-based caching benefits applications with irregular structure and with sufficient temporal locality, especially under high communication latencies. However, caching also hurts performance when there is insufficient data reuse or when the size of caching granularity is mismatched with the communication granularity. We find the programming complexity of the communication mechanisms in both languages to be comparable. Based on our results, we recommend that an ideal system intended to support diverse applications on parallel platforms should incorporate the communication mechanisms in CRL and Split-C.

关键词： parallel processing systems

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A library for portable and composable data locality optimizations for NUMA systems 2015

A library for portable and composable data locality optimiza...

引用

20th ACM SIGPLAN symposium on principles and practice of parallel programming, PPoPP 2015

作者： Majo, Zoltan Gross, thomas R. Department of Computer Science ETH Zurich Switzerland

ISBN: (纸本)9781450332057

Many recent multiprocessor systems are realized with a nonuniform memory architecture (NUMA) and accesses to remote memory locations take more time than local memory accesses. Optimizing NUMA memory system performance is difficult and costly for three principal reasons: (1) today's programming languages/libraries have no explicit support for NUMA systems, (2) NUMA optimizations are not portable, and (3) optimizations are not composable (i.e., they can become ineffective or worsen performance in environments that support composable parallel software). this paper presents TBB-NUMA, a parallel programming library based on Intel threading Building Blocks (TBB) that supports portable and composable NUMA-aware programming. TBB-NUMA provides a model of task affinity that captures a programmer's insights on mapping tasks to resources. NUMA-awareness affects all layers of the library (i.e., resource management, task scheduling, and high-level parallel algorithm templates) and requires close coupling between all these layers. Optimizations implemented with TBB-NUMA (for a set of standard benchmark programs) result in up to 44% performance improvement over standard TBB, but more important, optimized programs are portable across different NUMA architectures and preserve data locality also when composed with other parallel computations. Copyright 2015 ACM.

关键词： parallel programming

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Triolet: A programming system that unifies algorithmic skeleton interfaces for high-performance cluster computing 14

Triolet: A programming system that unifies algorithmic skele...

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2014 19th ACM SIGPLAN symposium on principles and practice of parallel programming, PPoPP 2014

作者： Rodrigues, Christopher Jablin, thomas Dakkak, Abdul Hwu, Wen-Mei University of Illinois at Urbana-Champaign United States

ISBN: (纸本)9781450326568

Functional algorithmic skeletons promise a high-level programming interface for distributed-memory clusters that free developers from concerns of task decomposition, scheduling, and communication. Unfortunately, prior distributed functional skeleton frameworks do not deliver performance comparable to that achievable in a low-level distributed programming model such as C with MPI and OpenMP, even when used in concert with high-performance array libraries. there are several causes: they do not take advantage of shared memory on each cluster node;they impose a fixed partitioning strategy on input data;and they have limited ability to fuse loops involving skeletons that produce a variable number of outputs per input. We address these shortcomings in the Triolet programming language through a modular library design that separates concerns of parallelism, loop nesting, and data partitioning. We show how Triolet substantially improves the parallel performance of algorithms involving array traversals and nested, variable-size loops over what is achievable in Eden, a distributed variant of Haskell. We further demonstrate how Triolet can substantially simplify parallel programming relative to C with MPI and OpenMP while achieving 23.100% of its performance on a 128-core cluster. Copyright © 2014 ACM.

关键词： parallel programming

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CPMA: An Efficient Batch-parallel Compressed Set Without Pointers 24

CPMA: An Efficient Batch-Parallel Compressed Set Without Poi...

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29th ACM SIGPLAN Annual symposium on principles and practice of parallel programming (PPoPP)

作者： Wheatman, Brian Burns, Randal Buluc, Aydin Xu, Helen Johns Hopkins Univ Baltimore MD 21218 USA Lawrence Berkeley Natl Lab Lawrence KS USA Georgia Inst Technol Atlanta GA USA

ISBN: (纸本)9798400704352

this paper introduces the batch-parallel Compressed Packed Memory Array (CPMA), a compressed, dynamic, ordered set data structure based on the Packed Memory Array (PMA). Traditionally, batch-parallel sets are built on pointerbased data structures such as trees because pointer-based structures enable fast parallel unions via pointer manipulation. Whencompared with cache-optimized trees, PMAswere slower to update but faster to scan. the batch-parallel CPMA overcomes this tradeoff between updates and scans by optimizing for cache-friendliness. On average, the CPMA achieves 3x faster batch-insert throughput and 4x faster range-query throughput compared with compressed PaC-trees, a state-of-the-art batch-parallel set library based on cache-optimized trees. We further evaluate the CPMA compared with compressed PaC-trees and Aspen, a state-of-the-art system, on a realworld application of dynamic-graph processing. the CPMA is on average 1.2x faster on a suite of graph algorithms and 2x faster on batch inserts when compared with compressed PaC-trees. Furthermore, the CPMA is on average 1.3x faster on graph algorithms and 2x faster on batch inserts compared with Aspen.

关键词： packed memory array batch-parallel compression data structures dynamic graphs

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Work-stealing with Configurable Scheduling Strategies 13

Work-stealing with Configurable Scheduling Strategies

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18th ACM SIGPLAN symposium on principles and practice of parallel programming

作者： Wimmer, Martin Traeff, Jesper Larsson Cederman, Daniel Tsigas, Philippas Vienna Univ Technol Fac Informat Res Grp Parallel Comp A-1040 Vienna Austria Chalmers Univ Technol S-41296 Gothenburg Sweden

ISBN: (纸本)9781450319225

Work-stealing systems are typically oblivious to the nature of the tasks they are scheduling. they do not know or take into account how long a task will take to execute or how many subtasks it will spawn. Moreover, task execution order is typically determined by an underlying task storage data structure, and cannot be changed. there are thus possibilities for optimizing task parallel executions by providing information on specific tasks and their preferred execution order to the scheduling system. We investigate generalizations of work-stealing and introduce a framework enabling applications to dynamically provide hints on the nature of specific tasks using scheduling strategies. Strategies can be used to independently control both local task execution and steal order. Strategies allow optimizations on specific tasks, in contrast to more conventional scheduling policies that are typically global in scope. Strategies are composable and allow different, specific scheduling choices for different parts of an application simultaneously. We have implemented a work-stealing system based on our strategy framework. A series of benchmarks demonstrates beneficial effects that can be achieved with scheduling strategies.

关键词： Algorithms Work-stealing scheduler hints strategies priorities

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Reducing false sharing on shared memory multiprocessors through compile time data transformations 95

Reducing false sharing on shared memory multiprocessors thro...

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proceedings of the 5th ACM SIGPLAN symposium on principles and practice of parallel programming

作者： Jeremiassen, Tor E. Eggers, Susan J. AT&T Bell Lab Murray Hill NJ United States

ISBN: (纸本)9780897917001

We have developed compiler algorithms that analyze explicitly parallel programs and restructure their shared data to reduce the number of false sharing misses. the algorithms analyze per-process shared data accesses, pinpoint the data structures that are susceptible to false sharing and choose an appropriate transformation to reduce it. the transformations either group data that is accessed by the same processor or separate individual data items that are shared. this paper evaluates that technique. We show through simulation that our analysis successfully identifies the data structures that are responsible for most false sharing misses, and then transforms them without unduly decreasing spatial locality. the reduction in false sharing positively impacts both execution time and program scalability when executed on a KSR2. Both factors combine to increase the maximum achievable speedup for all programs, more than doubling it for several. Despite being able to only approximate actual inter-processor memory accesses, the compiler-directed transformations always outperform programmer efforts to eliminate false sharing.

关键词： parallel processing systems

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Data Transformations Enabling Loop Vectorization on Multithreaded Data parallel Architectures

Data Transformations Enabling Loop Vectorization on Multithr...

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15th ACM SIGPLAN symposium on principles and practice of parallel programming

作者： Jang, Byunghyun Mistry, Perhaad Schaa, Dana Dominguez, Rodrigo Kaeli, David Northeastern Univ Dept ECE Boston MA 02115 USA

ISBN: (纸本)9781605587080

Loop vectorization, a key feature exploited to obtain high performance on Single Instruction Multiple Data (SIMD) vector architectures, is significantly hindered by irregular memory access patterns in the data stream. this paper describes data transformations that allow us to vectorize loops targeting massively multithreaded data parallel architectures. We present a mathematical model that captures loop-based memory access patterns and computes the most appropriate data transformations in order to enable vectorization. Our experimental results show that the proposed data transformations can significantly increase the number of loops that can be vectorized and enhance the data-level parallelism of applications. Our results also show that the overhead associated with our data transformations can be easily amortized as the size of the input data set increases. For the set of high performance benchmark kernels studied, we achieve consistent and significant performance improvements (up to 11.4X) by applying vectorization using our data transformation approach.

关键词： Loop Vectorization Data Transformation GPGPU

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PERFLOW: A Domain Specific Framework for Automatic Performance Analysis of parallel Applications 22

PERFLOW: A Domain Specific Framework for Automatic Performan...

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27th ACM SIGPLAN symposium on principles and practice of parallel programming (PPoPP)

作者： Jin, Yuyang Wang, Haojie Zhong, Runxin Zhang, Chen Zhai, Jidong Tsinghua Univ Beijing Peoples R China

ISBN: (纸本)9781450392044

Performance analysis is widely used to identify performance issues of parallel applications. However, complex communications and data dependence, as well as the interactions between different kinds of performance issues make high-efficiency performance analysis even harder. Although a large number of performance tools have been designed, accurately pinpointing root causes for such complex performance issues still needs specific in-depth analysis. To implement each such analysis, significant human efforts and domain knowledge are normally required. To reduce the burden of implementing accurate performance analysis, we propose a domain specific programming framework, named PERFLOW. PERFLOW abstracts the step-by-step process of performance analysis as a dataflow graph. this dataflow graph consists of main performance analysis sub-tasks, called passes, which can either be provided by PERFLOW'S built-in analysis library, or be implemented by developers to meet their requirements. Moreover, to achieve effective analysis, we propose a Program Abstraction Graph to represent the performance of a program execution and then leverage various graph algorithms to automate the analysis. We demonstrate the efficacy of PERFLOW by three case studies of real-world applications with up to 700K lines of code. Results show that PERFLOW significantly eases the implementation of customized analysis tasks. In addition, PERFLOW is able to perform analysis and locate performance bugs automatically and effectively.

关键词： Performance Analysis Domain Specific Framework Dataflow Graph

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