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High performance fortran without templates: An alternative model for distribution and alignment 93

High performance fortran without templates: An alternative m...

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4th ACM SIGPLAN symposium on principles and practice of parallel programming, PPOPP 1993

作者： Chapman, Barbara M. Mehrotra, Piyush Zima, Hans P. Department for Software Technology and Parallel Systems University of Vienna Austria ICASE MS 132C NASA Langley Research Center HamptonVA23681 United States

ISBN: (纸本)0897915895

Language extensions of Fortran are being developed which permit the user to map data structures to the individual processors of distributed memory machines. these languages allow a programming style in which global data references are used. Current efforts are fo-cussed on designing a common basis for such languages, the result of which is known as High Performance For-tran (HPF). One of the central debates in the HPF effort revolves around the concept of templates, introduced as an abstract index space to which data could be aligned. In this paper, we present a model for the mapping of data which provides the functionality of High Performance Fortran distributions without the use of templates. © 1993 ACM.

关键词： FORTRAN (programming language)

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High-level dataflow programming for reconfigurable computing 26

High-level dataflow programming for reconfigurable computing

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26th IEEE International symposium on Computer Architecture and High Performance Computing Workshops, SBAC-PADW 2014

作者： Sérot, J. Berry, F. Institut Pascal Université Blaise Pascal / CNRS Clermont-Ferrand France

ISBN: (纸本)9781479970148

In many application domains, FPGAS are now promoted as a way of getting round the restrictions of specific CPU designs on system scalability. However, in the current state-of-the art, programming FPGAS remains essentially a hardware-oriented activity, relying on dedicated hardware description languages such as VHDL or Verilog. Using these languages requires expertise in digital design and in practice this limits the applicability of FPGA-based solutions. this is particulary true for stream-processing applications, in which some processing must be carried out "on the fly" on digital data streams. In this context, the dataflow programming model offers a very effective way to reduce the gap between high-level formulations and low-level implementations. To support this claim, the authors have recently introduced CAPH, a domain specific language, offering a fully-automated compilation path from high-level dataflow descriptions to FPGA configuration for stream-processing applications. this paper is a introduction to the CAPH language, giving its motivations and main design principles and exposing the basic features of its syntax, semantics and compilation. It also points to experimental results showing that, at least for stream-processing applications, the dataflow model of computation, used jointly as a programming model and an execution model, can offer a very effective way to conciliate abstraction and efficiency when programming FPGAS. © 2014 IEEE.

关键词： Computer hardware description languages

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PiPAD: Pipelined and parallel Dynamic GNN Training on GPUs 23

PiPAD: Pipelined and Parallel Dynamic GNN Training on GPUs

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28th ACM SIGPLAN Annual symposium on principles and practice of parallel programming, PPoPP 2023

作者： Wang, Chunyang Sun, Desen Bai, Yuebin Beihang University Beijing China

ISBN: (纸本)9798400700156

Dynamic Graph Neural Networks (DGNNs) have been widely applied in various real-life applications, such as link prediction and pandemic forecast, to capture both static structural information and temporal characteristics from dynamic graphs. Combining both time-dependent and -independent components, DGNNs manifest substantial parallel computation and data reuse potentials, but suffer from severe memory access inefficiency and data transfer overhead under the canonical one-graph-at-a-time training pattern. To tackle these challenges, we propose PiPAD, a Pipelined and parallel DGNN training framework for the end-to-end performance optimization on GPUs. From both algorithm and runtime level, PiPAD holistically reconstructs the overall training paradigm from the data organization to computation manner. Capable of processing multiple graph snapshots in parallel, PiPAD eliminates unnecessary data transmission and alleviates memory access inefficiency to improve the overall performance. Our evaluation across various datasets shows PiPAD achieves 1.22 × - 9.57× speedup over the state-of-the-art DGNN frameworks on three representative models. © 2023 ACM.

关键词： Memory architecture

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ParlayANN: Scalable and Deterministic parallel Graph-Based Approximate Nearest Neighbor Search Algorithms 24

ParlayANN: Scalable and Deterministic Parallel Graph-Based A...

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29th ACM SIGPLAN Annual symposium on principles and practice of parallel programming (PPoPP)

作者： Manohar, Magdalen Dobson Shen, Zheqi Blelloch, Guy E. Dhulipala, Laxman Gu, Yan Simhadri, Harsha Vardhan Sun, Yihan Carnegie Mellon Univ Pittsburgh PA 15213 USA UC Riverside Riverside CA USA Univ Maryland Baltimore MD USA Microsoft Res Redmond WA USA

ISBN: (纸本)9798400704352

Approximate nearest-neighbor search (ANNS) algorithms are a key part of the modern deep learning stack due to enabling efficient similarity search over high-dimensional vector space representations (i.e., embeddings) of data. Among various ANNS algorithms, graph-based algorithms are known to achieve the best throughput-recall tradeoffs. Despite the large scale of modern ANNS datasets, existing parallel graphbased implementations suffer from significant challenges to scale to large datasets due to heavy use of locks and other sequential bottlenecks, which 1) prevents them from efficiently scaling to a large number of processors, and 2) results in nondeterminism that is undesirable in certain applications. In this paper, we introduce ParlayANN, a library of deterministic and parallel graph-based approximate nearest neighbor search algorithms, along with a set of useful tools for developing such algorithms. In this library, we develop novel parallel implementations for four state-of-the-art graph-based ANNS algorithms that scale to billion-scale datasets. Our algorithms are deterministic and achieve high scalability across a diverse set of challenging datasets. In addition to the new algorithmic ideas, we also conduct a detailed experimental study of our new algorithms as well as two existing non-graph approaches. Our experimental results both validate the effectiveness of our new techniques, and lead to a comprehensive comparison among ANNS algorithms on large scale datasets with a list of interesting findings.

关键词： nearest neighbor search vector search parallel algorithms

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A parallel algorithm for global states enumeration in concurrent systems 2015

A parallel algorithm for global states enumeration in concur...

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20th ACM SIGPLAN symposium on principles and practice of parallel programming, PPoPP 2015

作者： Chang, Yen-Jung Garg, Vijay K. Department of Electrical and Computer Engineering University of Texas Austin United States

ISBN: (纸本)9781450332057

Verifying the correctness of the executions of a concurrent program is difficult because of its nondeterministic behavior. One of the verification methods is predicate detection, which predicts whether the user specified condition (predicate) could become true in any global states of the program. the method is predictive because it generates inferred execution paths from the observed execution path and then checks the predicate on the global states of inferred paths. One important part of predicate detection is global states enumeration, which generates the global states on inferred paths. Cooper and Marzullo gave the first enumeration algorithm based on a breadth first strategy (BFS). Later, many algorithms have been proposed to improve space and time complexity. None of them, however, takes parallelism into consideration. In this paper, we present the first parallel and online algorithm, named ParaMount, for global state enumeration. Our experimental results show that ParaMount speeds up the existing sequential algorithms by a factor of 6 with 8 threads. We have implemented an online predicate detector using ParaMount. For predicate detection, our detector based on ParaMount is 10 to 50 times faster than RV runtime (a verification tool that uses Cooper and Marzullo's BFS enumeration algorithm). Copyright 2015 ACM.

关键词： parallel algorithms

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On the parallel I/O optimality of linear algebra kernels: Near-optimal LU factorization 21

On the parallel I/O optimality of linear algebra kernels: Ne...

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26th ACM SIGPLAN symposium on principles and practice of parallel programming, PPoPP 2021

作者： Kwasniewski, Grzegorz Ben-Nun, Tal Ziogas, Alexandros Nikolaos Schneider, Timo Besta, MacIej Hoefler, Torsten Timo Schneider Maciej Besta Torsten Hoefler Department of Computer Science Eth Zurich Switzerland

ISBN: (纸本)9781450382946

Dense linear algebra kernels are fundamental components of many scientific computing applications. In this work we present a novel method of deriving parallel I/O lower bounds for this broad family of programs. Based on the X-Partitioning abstraction, our method explicitly captures inter-statement dependencies. Applying our analysis to LU factorization, we derive COnfLUX, an LU algorithm with the parallel I/O cost of N3/([EQUATION]) communicated elements per processor - only 1/3× over our established lower bound. We evaluate COnfLUX on various problem sizes, demonstrating empirical results that match our theoretical analysis, communicating less than Cray ScaLAPACK, SLATE, and the asymptotically-optimal CANDMC library. Running on 1,024 nodes of Piz Daint, COnfLUX communicates 1.6× less than the second-best implementation and is expected to communicate 2.1× less on a full-scale run on Summit. © 2021 Owner/Author.

关键词： Factorization

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POSTER: Stream-K:Work-centric parallel Decomposition for Dense Matrix-Matrix Multiplication on the GPU 28

POSTER: Stream-K:Work-centric Parallel Decomposition for Den...

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28th ACM SIGPLAN Annual symposium on principles and practice of parallel programming, PPoPP 2023

作者： Osama, Muhammad Merrill, Duane Cecka, Cris Garland, Michael Owens, John D. University of California Davis United States NVIDIA Corporation

ISBN: (纸本)9798400700156

We introduce Stream-K, a work-centric parallelization of matrix multiplication (GEMM) and related computations in dense linear algebra. Whereas contemporary decompositions are primarily tile-based, our method operates by partitioning an even share of the aggregate inner loop iterations among physical processing elements. this provides a near-perfect utilization of computing resources, regardless of how efficiently the output tiling for any given problem quantizes across the underlying processing elements. © 2023 Owner/Author.

关键词： Graphics processing unit

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Implementation of a portable nested data-parallel language 93

Implementation of a portable nested data-parallel language

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4th ACM SIGPLAN symposium on principles and practice of parallel programming, PPOPP 1993

作者： Blelloch, Guy E. Chatterjee, Siddhartha Hardwick, Jonathan C. Sipelstein, Jay Zagha, Marco School of Computer Science Carnegie Mellon University PittsburghPA15213 United States RIACS Mail Stop T045-1 NASA Ames Research Center Moffett FieldCA94035 United States

ISBN: (纸本)0897915895

this paper gives an overview of the implementation of NESL, a portable nested data-parallel language. this language and its implementation are the first to fully support nested data structures as well as nested data-parallel function calls. these features allow the concise description of parallel algorithms on irregular data, such as sparse matrices and graphs. In addition, they maintain the advantages of data-parallel languages: a simple programming model and portability. the current NESL implementation is based on an intermediate language called VcODE and a library of vector routines called CVL. It runs on the Connection Machine CM-2, the Cray Y-MP C90, and serial machines. We compare initial benchmark results of NESL with those of machine-specific code on these machines for three algorithms: least-squares line-fitting, median finding, and a sparse-matrix vector product. these results show that NESL'S performance is competitive with that of machine-specific codes for regular dense data, and is often superior for irregular data. © 1993 ACM.

关键词： Matrix algebra

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Scaling Graph Traversal to 281 Trillion Edges with 40 Million Cores 22

Scaling Graph Traversal to 281 Trillion Edges with 40 Millio...

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27th ACM SIGPLAN symposium on principles and practice of parallel programming (PPoPP)

作者： Cao, Huanqi Wang, Yuanwei Wang, Haojie Lin, Heng Ma, Zixuan Yin, Wanwang Chen, Wenguang Tsinghua Univ Dept Comp Sci & Technol Beijing Peoples R China Tsinghua Univ BNRist Beijing Peoples R China Peking Univ Sch Comp Sci Beijing Peoples R China Natl Supercomp Ctr Wuxi Wuxi Jiangsu Peoples R China

ISBN: (纸本)9781450392044

Graph processing, especially high-performance graph traversal, plays a more and more important role in data analytics. the successor of Sunway TaihuLight, NEW SUNWAY, is equipped with nearly 10 PB memory and over 40 million cores, which brings the opportunity to process hundreds of trillions of edges graphs. However, the graph with an unprecedented scale also brings severe performance challenges, including load imbalance, poor locality, and irregular access of graph traversal workload. To address the scalability problem, we propose a novel 3-level degree-aware 1.5D graph partitioning, which benefits from both delegated 1D and 2D partitioning. By delegating extremely heavy vertices globally and other heavy vertices on columns and rows in the processes mesh, we break the scalability wall of previous partitioning methods. Together with sub-iteration direction optimization, core group -aware core subgraph segmenting, and a new on-chip sorting mechanism using RMA, we achieve 180,792 GTEPS on a graph with 281 trillion edges, using 103,912 processors with over 40 million cores, achieving 1.75x performance and 8x capacity compared to the previous state of the art and conforming to the Graph 500 BFS benchmark[14].

关键词： massively parallel algorithm breadth-first search heterogeneous architecture

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COREMU: A Scalable and Portable parallel Full-system Emulator 11

COREMU: A Scalable and Portable Parallel Full-system Emulato...

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16th ACM symposium on principles and practice of parallel programming

作者： Wang, Zhaoguo Liu, Ran Chen, Yufei Wu, Xi Chen, Haibo Zhang, Weihua Zang, Binyu Fudan Univ Parallel Proc Inst Shanghai Peoples R China

ISBN: (纸本)9781450301190

this paper presents the open-source COREMU, a scalable and portable parallel emulation framework that decouples the complexity of parallelizing full-system emulators from building a mature sequential one. the key observation is that CPU cores and devices in current (and likely future) multiprocessors are loosely-coupled and communicate through well-defined interfaces. Based on this observation, COREMU emulates multiple cores by creating multiple instances of existing sequential emulators, and uses a thin library layer to handle the inter-core and device communication and synchronization, to maintain a consistent view of system resources. COREMU also incorporates lightweight memory transactions, feedback-directed scheduling, lazy code invalidation and adaptive signal control to provide scalable performance. To make COREMU useful in practice, we also provide some preliminary tools and APIs that can help programmers to diagnose performance problems and (concurrency) bugs. A working prototype, which reuses the widely-used QEMU as the sequential emulator, is with only 2500 lines of code (LOCs) changes to QEMU. It currently supports x64 and ARM platforms, and can emulates up to 255 (1) cores running commodity OSes with practical performance, while QEMU cannot scale above 32 cores. A set of performance evaluation against QEMU indicates that, COREMU has negligible uniprocessor emulation overhead, performs and scales significantly better than QEMU. We also show how COREMU could be used to diagnose performance problems and concurrency bugs of both OS kernel and parallel applications.

关键词： Full-system Emulator parallel Emulator Multicore Design Experimentation Performance

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