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proceedings of the ACM SIGPLAN symposium on principles and practice of parallel programming, PPOPP 1999年 25-36页

作者： McCurdy, Collin Mellor-Crummey, John Univ of Wisconsin Madison United States

the efficiency of HPF with respect to irregular applications is still largely unproven. While recent work has shown that a highly irregular hierarchical n-body force calculation method can be implemented in HPF, we have found that the implementation contains inefficiencies which cause it to run up to a factor of three times slower than our hand-coded, explicitly parallel implementation. Our work examines these inefficiencies, determines that most of the extra overhead is due to a single aspect of the communication strategy, and demonstrates that fixing the communication strategy can bring the overheads of the HPF application to within 25% of those of the hand-coded version.

关键词： parallel processing systems

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Dynamic instrumentation of threaded applications

Proceedings of the ACM SIGPLAN Symposium on Principles and P...

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proceedings of the ACM SIGPLAN symposium on principles and practice of parallel programming, PPOPP 1999年 49-59页

作者： Xu, Zhichen Miller, Barton P. Naim, Oscar Univ of Wisconsin Madison WI United States

the design of non-trace based performance instrumentation techniques for threaded programs is investigated to provide detailed performance data while maintaining control of instrumentation costs. the design is based on low contention data structures. the Paradyn's dynamic instrumentation is extended to handle threaded programs. To associate data with individual threads, all threads must share the same instrumentation code and assign each thread with its own private copy of performance counters or timers. the asynchrony in a threaded program poses a major challenge to dynamic instrumentation.

关键词： parallel processing systems

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User Guided Abductive Proof Generation for Answer Set programming Queries 22

User Guided Abductive Proof Generation for Answer Set Progra...

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24th International symposium on principles and practice of Declarative programming, PPDP 2022

作者： Mahajan, Avishkar Strecker, Martin Wong, Meng Weng Singapore Management University Singapore Singapore Universite de Toulouse France

ISBN: (纸本)9781450397032

We present a method for generating possible proofs of a query with respect to a given Answer Set programming (ASP) rule set using an abductive process where the space of abducibles is automatically constructed just from the input rules alone. Given a (possibly empty) set of user provided facts, our method infers any additional facts that may be needed for the entailment of a query and then outputs these extra facts, without the user needing to explicitly specify the space of all abducibles. We also present a method to generate a set of directed edges corresponding to the justification graph for the query. Furthermore, through different forms of implicit term substitution, our method can take user provided facts into account and suitably modify the abductive solutions. Past work on abduction has been primarily based on goal directed methods. However these methods can result in solvers that are not truly declarative. Much less work has been done on realizing abduction in a bottom up solver like the Clingo ASP solver. We describe novel ASP programs which can be run directly in Clingo to yield the abductive solutions and directed edge sets without needing to modify the underlying solving engine. © 2022 ACM.

关键词： Query processing

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Code motion for explicitly parallel programs

Proceedings of the ACM SIGPLAN Symposium on Principles and P...

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proceedings of the ACM SIGPLAN symposium on principles and practice of parallel programming, PPOPP 1999年 13-24页

作者： Knoop, Jens Steffen, Bernhard Universitaet Dortmund Dortmund Germany

In comparison to automatic parallelization, which is thoroughly studied in the literature, classical analyses and optimizations of explicitly parallel programs were more or less neglected. this may be due to the fact that naive adaptations of the sequential techniques fail, and their straightforward correct ones have unacceptable costs caused by the interleavings, which manifest the possible executions of a parallel program. Recently, however, we showed that unidirectional bitvector analyses can be performed for parallel programs as easily and as efficiently as for sequential ones, a necessary condition for the successful transfer of the classical optimizations to the parallel setting. In this article we focus on possible subsequent code motion transformations, which turn out to require much more care than originally conjectured. Essentially, this is due to the fact that interleaving semantics, although being adequate for correctness considerations, fails when it comes to reasoning about efficiency of parallel programs. this deficiency, however, can be overcome by strengthening the specific treatment of synchronization points.

关键词： parallel processing systems

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OpenCilk: A Modular and Extensible Software Infrastructure for Fast Task-parallel Code 23

OpenCilk: A Modular and Extensible Software Infrastructure f...

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28th ACM SIGPLAN Annual symposium on principles and practice of parallel programming, PPoPP 2023

作者： Schardl, Tao B. Lee, I.-Ting Angelina MIT CSAIL United States Washington University St. Louis United States

ISBN: (纸本)9798400700156

this paper presents OpenCilk, an open-source software infrastructure for task-parallel programming that allows for substantial code reuse and easy exploration of design choices in language abstraction, compilation strategy, runtime mechanism, and productivity-tool development. the OpenCilk infrastructure consists of three main components: a compiler designed to compile fork-join task-parallel code, an efficient work-stealing runtime scheduler, and a productivity-tool development framework based on compiler instrumentation designed for fork-join parallel computations. OpenCilk is modular - modifying one component for the most part does not necessitate modifications to the other components - and easy to extend - its construction naturally encourages code reuse. Despite being modular and easy to extend, OpenCilk produces high-performing code. We investigated OpenCilk's modularity, extensibility, and performance through several case studies, including a study to extend OpenCilk to support multiple parallel runtime systems, including Cilk Plus, OpenMP, and oneTBB. OpenCilk's design enables rapid prototyping of new compiler back ends to target different parallel-runtime ABIs. Each back end required fewer than 2000 new lines of code. We examined the OpenCilk runtime's performance empirically on 15 benchmark Cilk programs and found that it outperforms the other runtimes by a geometric mean of 4% - 26% on 1 core and 10% - 120% on 48 cores. © 2023 Owner/Author.

关键词： parallel programming

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Boosting Performance and QoS for Concurrent GPU B+trees by Combining-Based Synchronization 23

Boosting Performance and QoS for Concurrent GPU B+trees by C...

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28th ACM SIGPLAN Annual symposium on principles and practice of parallel programming, PPoPP 2023

作者： Zhang, Weihua Zhao, Chuanlei Peng, Lu Lin, Yuzhe Zhang, Fengzhe Lu, Yunping School of Computer Science Fudan University China Institute of Big Data Fudan University China State Key Laboratory of Mathematical Engineering and Advanced Computing China Parallel Processing Institute Fudan University China Department of Computer Science Tulane University United States

ISBN: (纸本)9798400700156

Concurrent B+trees have been widely used in many systems. With the scale of data requests increasing exponentially, the systems are facing tremendous performance pressure. GPU has shown its potential to accelerate concurrent B+trees performance. When many concurrent requests are processed, the conflicts should be detected and resolved. Prior methods guarantee the correctness of concurrent GPU B+trees through lock-based or software transactional memory (STM)-based approaches. However, these methods complicate the request processing logic, increase the number of memory accesses and bring execution path divergence. they lead to performance degradation and variance in response time increasing. Moreover, previous methods do not guarantee linearizability among concurrent requests. In this paper, we design a combined-based concurrency control framework, called Eirene, for GPU B+tree to reduce the overhead of conflict detection and resolution. First, a combining-based synchronization method is designed to combine and issue requests. It combines the requests with the same key, constructs their dependence, decides the issued request, and determines their return values. Since only one request for each key is issued, key conflicts are eliminated. then, an optimistic STM method is used to reduce structure conflicts. the query and the update requests are partitioned into different kernels. For the update kernels, STM is involved only when the number of the retry reaches a threshold. Finally, a locality-aware warp reorganization optimization is proposed to improve memory behavior and reduce conflicts by exploiting the locality among requests. Evaluations on an NVIDIA A100 GPU show that Eirene is efficient (a throughput of 2.4 billion per second) and can guarantee linearizability. Compared to the state-of-the-art GPU B+tree, it can achieve a speedup of 7.43X and reduce the response time variance from 36% to 5%. © 2023 ACM.

关键词： Graphics processing unit

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Lifetime-Based Optimization for Simulating Quantum Circuits on a New Sunway Supercomputer 23

Lifetime-Based Optimization for Simulating Quantum Circuits ...

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28th ACM SIGPLAN Annual symposium on principles and practice of parallel programming, PPoPP 2023

作者： Chen, Yaojian Liu, Yong Shi, Xinmin Song, Jiawei Liu, Xin Gan, Lin Guo, Chu Fu, Haohuan Gao, Jie Chen, Dexun Yang, Guangwen Tsinghua University Beijing China National Supercomputing Center in Wuxi Zhejiang Lab Hangzhou China Information Engineering University Zhengzhou China National Supercomputing Center in Wuxi China Tsinghua University National Supercomputing Center in Wuxi China National Research Centre of Parallel Engineering and Technology Beijing China Tsinghua University National Supercomputing Center in Wuxi Zhejiang Lab Hangzhou China

ISBN: (纸本)9798400700156

High-performance classical simulator for quantum circuits, in particular the tensor network contraction algorithm, has become an important tool for the validation of noisy quantum computing. In order to address the memory limitations, the slicing technique is used to reduce the tensor dimensions, but it could also lead to additional computation overhead that greatly slows down the overall performance. this paper proposes novel lifetime-based methods to reduce the slicing overhead and improve the computing efficiency, including, an interpretation method to deal with slicing overhead, an inplace slicing strategy to find the smallest slicing set and an adaptive tensor network contraction path refiner customized for Sunway architecture. Experiments show that in most cases the slicing overhead with our inplace slicing strategy would be less than the Cotengra, which is the most used graph path optimization software at present. Finally, the resulting simulation time is reduced to 96.1s for the Sycamore quantum processor RQC, with a sustainable single-precision performance of 308.6Pflops using over 41M cores to generate 1M correlated samples, which is more than 5 times performance improvement compared to 60.4 Pflops in 2021 Gordon Bell Prize work. © 2023 Owner/Author.

关键词： Timing circuits

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A Scalable Hybrid Total FETI Method for Massively parallel FEM Simulations 23

A Scalable Hybrid Total FETI Method for Massively Parallel F...

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28th ACM SIGPLAN Annual symposium on principles and practice of parallel programming, PPoPP 2023

作者： Lin, Kehao Zhou, Chunbao Zeng, Yan Nie, Ningming Wang, Jue Li, Shigang Feng, Yangde Wang, Yangang Yao, Kehan Yao, Tiechui Zhang, Jilin Wan, Jian Hangzhou Dianzi University Hangzhou China Computer Network Information Center Chinese Academy of Sciences Beijing China University of Chinese Academy of Sciences Beijing China School of Computer Science Beijing University of Posts and Telecommunications Beijing China

ISBN: (纸本)9798400700156

the Hybrid Total Finite Element Tearing and Interconnecting (HTFETI) method plays an important role in solving large-scale and complex engineering problems. this method needs to handle numerous matrix-vector multiplications. Directly calling the vendor-optimized library for general matrix-vector multiplication (gemv) on GPU leads to low performance, since it does not consider optimizations for different matrix sizes in HTFETI, i.e. different row and column sizes. In addition, state-of-the-art graph partitioning methods cannot guarantee load balancing for HTFETI, since the matrix size is determined by the length of the subdomain boundary. To solve the problems above, we first port gemv to the multi-stream pipeline scheme and develop a new batched kernel function on GPU, which brings 15%∼30% throughput improvement and 37% average GFLOPs improvement, respectively. We also propose a multi-grained load-balancing scheme based on graph repartitioning and work-stealing, and the load imbalance ratio is down to 1.05∼1.09 from 1.5. We have successfully applied the scalable HTFETI method to simulate the whole core assembly of China Experimental Fast Reactor (CEFR) for steady-state analysis, and the efficiencies of weak scalability and strong scalability reach 78% and 72% on 12,288 GPUs, respectively. As far as we know, this is the first time that HTFETI has been used in large-scale and high-fidelity whole core assembly simulation. © 2023 Owner/Author.

关键词： Scalability

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Performance prediction of large parallel applications using parallel simulations

Proceedings of the ACM SIGPLAN Symposium on Principles and P...

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proceedings of the ACM SIGPLAN symposium on principles and practice of parallel programming, PPOPP 1999年 151-162页

作者： Bagrodia, Rajive Deelman, Ewa Docy, Steven Phan, thomas Univ of California Los Angeles Los Angeles United States

Accurate simulation of large parallel applications can be facilitated with the use of direct execution and parallel discrete event simulation. this paper describes the use of COMPASS, a direct execution-driven, parallel simulator for performance prediction of programs that include both communication and I/O intensive applications. the simulator has been used to predict the performance of such applications on both distributed memory machines like the IBM SP and shared-memory machines like the SGI Origin 2000. the paper illustrates the usefulness of COMPASS as a versatile performance prediction tool. We use both real-world applications and synthetic benchmarks to study application scalability, sensitivity to communication latency, and the interplay between factors like communication pattern and parallel file system caching on application performance. We also show that the simulator is accurate in its predictions and that it is also efficient in its ability to use parallel simulation to reduce its own execution time which, in some cases, has yielded a near-linear speedup.

关键词： parallel processing systems

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Efficient implementation scheme of concurrent object-oriented languages on stock multicomputers

Efficient implementation scheme of concurrent object-oriente...

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proceedings of the 4th ACM SIGPLAN symposium on principles & practice of parallel programming

作者： Taura, Kenjiro Matsuoka, Satoshi Yonezawa, Akinori Univ of Tokyo Japan

ISBN: (纸本)0897915895

Several novel techniques for efficient implementation of concurrent object-oriented languages on general purpose, stock multicomputers are presented. these techniques have been developed in implementing our concurrent object-oriented language ABCL on a Fujitsu Laboratory's experimental multicomputer AP1000 consisting of 512 SPARC chips. the proposed intra-node scheduling mechanism reduces the cost of local message passing. the cost of intra-node asynchronous message passing is about 20 SPARC instructions in the best case, including locality checking, dynamic method lookup, and scheduling. the minimum latency of asynchronous internode message passing is about 9 μs, or about 120 instructions, employing the self-dispatching mechanism independently proposed by Eicken et al. A large scale benchmark which involves 9,000,000 message passings shows 440 times speedup on the 512 nodes system compared to the sequential version of the same algorithm. We rely on simple hardware support for message passing and use no specialized architectural supports for object-oriented computing. thus, we are able to enjoy the benefits of future progress in standard processor technology. Our result shows that concurrent object-oriented languages can be implemented efficiently on conventional multicomputers.

关键词： Object oriented programming

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