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检索条件"任意字段=Proceedings of the 27th ACM SIGPLAN Symposium on Principles and Practice of Parallel Programming"

共 330 条记录，以下是121-130 订阅

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Correct and efficient work-stealing for weak memory models 13

Correct and efficient work-stealing for weak memory models

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18th acm sigplan symposium on principles and practice of parallel programming, PPoPP 2013

作者： Lê, Nhat Minh Pop, Antoniu Cohen, Albert Zappa Nardelli, Francesco INRIA ENS Paris Paris France

ISBN: (纸本)9781450319225

Chase and Lev's concurrent deque is a key data structure in shared-memory parallel programming and plays an essential role in work-stealing schedulers. We provide the first correctness proof of an optimized implementation of Chase and Lev's deque on top of the POWER and ARM architectures: these provide very relaxed memory models, which we exploit to improve performance but considerably complicate the reasoning. We also study an optimized x86 and a portable C11 implementation, conducting systematic experiments to evaluate the impact of memory barrier optimizations. Our results demonstrate the benefits of hand tuning the deque code when running on top of relaxed memory models. © 2013 acm.

关键词： parallel programming

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Lock-free channels for programming via communicating sequential processes 19

Lock-free channels for programming via communicating sequent...

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24th acm sigplan symposium on principles and practice of parallel programming, PPoPP 2019

作者： Koval, Nikita Alistarh, Dan Elizarov, Roman IST Austria Austria JetBrains Austria

ISBN: (纸本)9781450362252

Traditional concurrent programming involves manipulating shared mutable state. Alternatives to this programming style are communicating sequential processes (CSP) [1] and actor [2] models, which share data via explicit communication. Rendezvous channel is the common abstraction for communication between several processes, where senders and receivers perform a rendezvous handshake as a part of their protocol (senders wait for receivers and vice versa). Additionally to this, channels support the select expression. In this work, we present the first eficient lock-free channel algorithm, and compare it against Go [3] and Kotlin [4] baseline implementations. © 2019 Copyright held by the owner/author(s).

关键词： Locks (fasteners)

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A parallel Sparse Tensor Benchmark Suite on CPUs and GPUs 20

A Parallel Sparse Tensor Benchmark Suite on CPUs and GPUs

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25th acm sigplan symposium on principles and practice of parallel programming (PPoPP)

作者： Li, Jiajia Lakshminarasimhan, Mahesh Wu, Xiaolong Li, Ang Olschanowsky, Catherine Barker, Kevin Pacific Northwest Natl Lab Richland WA 99352 USA Univ Utah Salt Lake City UT USA Purdue Univ W Lafayette IN 47907 USA Boise State Univ Boise ID 83725 USA

ISBN: (纸本)9781450368186

Tensor computations present significant performance challenges that impact a wide spectrum of applications. Efforts on improving the performance of tensor computations include exploring data layout, execution scheduling, and parallelism in common tensor kernels. this work presents a benchmark suite for arbitrary-order sparse tensor kernels using state-of-the-art tensor formats: coordinate (COO) and hierarchical coordinate (HiCOO). It demonstrates a set of reference tensor kernel implementations and some observations on Intel CPUs and NVIDIA GPUs. the full paper can be referred to at http://***/abs/2001.00660.

关键词： sparse tensors benchmark GPU roofline model

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GENERATING parallel CODE FROM OBJECT-ORIENTED MAthEMATICAL-MODELS

GENERATING PARALLEL CODE FROM OBJECT-ORIENTED MATHEMATICAL-M...

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5th acm sigplan symposium on principles and practice of parallel programming

作者： ANDERSSON, N FRITZSON, P Linkoping Univ Linkoping Sweden

For a long time efficient use of parallel computers has been hindered by dependencies introduced in software through low-level implementation practice. In this paper we present a programming environment and language called Object-Math (Object oriented Mathematical language for scientific computing), which aims at eliminating this problem by allowing the user to represent mathematical equation-based models directly in the system. the system performs analysis of mathematical models to extract parallelism and automatically generates parallel code for numerical solution. In the context of industrial applications in mechanical analysis, we have so far primarily explored generation of parallel code for solving systems of ordinary differential equations (ODEs), in addition to preliminary work on generating code for solving partial differential equations. Two approaches to extracting parallelism have been implemented and evaluated: extracting parallelism at the equation system level and at the single equation level, respectively. We found that for several applications the corresponding systems of equations do not partition well into subsystems. this means that the equation system level approach is of restricted general applicability. thus, we focused on the equation-level approach which yielded significant parallelism for ODE systems solution. For the bearing simulation applications we present here, the achieved speedup is however critically dependent on low communication latency of the parallel computer.

关键词： parallel processing systems

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Automatic Formal Verification of MPI-Based parallel Programs 11

Automatic Formal Verification of MPI-Based Parallel Programs

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16th acm symposium on principles and practice of parallel programming

作者： Siegel, Stephen F. Zirkel, Timothy K. Univ Delaware Verified Software Lab Dept Comp & Informat Sci Newark DE 19716 USA

ISBN: (纸本)9781450301190

the Toolkit for Accurate Scientific Software (TASS) is a suite of tools for the formal verification of MPI-based parallel programs used in computational science. TASS can verify various safety properties as well as compare two programs for functional equivalence. the TASS front end takes an integer n >= 1 and a C/MPI program, and constructs an abstract model of the program with n processes. Procedures, structs, (multi-dimensional) arrays, heap-allocated data, pointers, and pointer arithmetic are all representable in a TASS model. the model is then explored using symbolic execution and explicit state space enumeration. A number of techniques are used to reduce the time and memory consumed. A variety of realistic MPI programs have been verified with TASS, including Jacobi iteration and manager-worker type programs, and some subtle defects have been discovered. TASS is written in Java and is available from http://***/tass under the Gnu Public License.

关键词： Verification Symbolic execution MPI message-passing debugging verification

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GPU Initiated OpenSHMEM: Correct and Eicient Intra-Kernel Networking for dGPUs 25

GPU Initiated OpenSHMEM: Correct and Eicient Intra-Kernel Ne...

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25th acm sigplan symposium on principles and practice of parallel programming (PPoPP)

作者： Hamidouche, Khaled LeBeane, Michael Adv Micro Devices Inc Santa Clara CA 95054 USA

ISBN: (纸本)9781450368186

Current state-of-the-art in GPU networking utilizes a host-centric, kernel-boundary communication model that reduces performance and increases code complexity. To address these concerns, recent works have explored performing network operations from within a GPU kernel itself. However, these approaches typically involve the CPU in the critical path, which leads to high latency and ineicient utilization of network and/or GPU resources. In this work, we introduce GPU Initiated OpenSHMEM (GIO), a new intra-kernel PGAS programming model and runtime that enables GPUs to communicate directly with a NIC without the intervention of the CPU. We accomplish this by exploring the GPU's coarse-grained memory model and correcting semantic mismatches when GPUs wish to directly interact with the network. GIO also reduces latency by relying on a novel template-based design to minimize the overhead of initiating a network operation. We illustrate that for structured applications like a Jacobi 2D stencil, GIO can improve application performance by up to 40% compared to traditional kernel-boundary networking. Furthermore, we demonstrate that on irregular applications like Sparse Triangular Solve (SpTS), GIO provides up to 44% improvement compared to existing intra-kernel networking schemes.

关键词： GPUs Distributed programming models RDMA networks

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Incremental Flattening for Nested Data parallelism 19

Incremental Flattening for Nested Data Parallelism

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24th acm sigplan symposium on principles and practice of parallel programming (PPoPP)

作者： Henriksen, Troels thoroe, Frederik Elsman, Martin Oancea, Cosmin Univ Copenhagen Copenhagen Denmark

ISBN: (纸本)9781450362252

Compilation techniques for nested-parallel applications that can adapt to hardware and dataset characteristics are vital for unlocking the power of modern hardware. this paper proposes such a technique, which builds on flattening and is applied in the context of a functional data-parallel language. Our solution uses the degree of utilized parallelism as the driver for generating a multitude of code versions, which together cover all possible mappings of the application's regular nested parallelism to the levels of parallelism supported by the hardware. these code versions are then combined into one program by guarding them with predicates, whose threshold values are automatically tuned to hardware and dataset characteristics. Our unsupervised method-of statically clustering datasets to code versions-is different from autotuning work that typically searches for the combination of code transformations producing a single version, best suited for a specific dataset or on average for all datasets. We demonstrate-by fully integrating our technique in the repertoire of a compiler for the Futhark programming language-significant performance gains on two GPUs for three real-world applications, from the financial domain, and for six Rodinia benchmarks.

关键词： functional language parallel compilers GPGPU

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Fine-grain parallel megabase sequence comparison with multiple heterogeneous GPUs 14

Fine-grain parallel megabase sequence comparison with multip...

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2014 19th acm sigplan symposium on principles and practice of parallel programming, PPoPP 2014

作者： De Sandes, Edans F.O. Miranda, Guillermo Melo, Alba C.M.A. Martorell, Xavier Ayguadé, Eduard University of Brasilia Brazil Universitat Politècnica de Catalunya Barcelona Supercomputing Center Spain

ISBN: (纸本)9781450326568

this paper proposes and evaluates a parallel strategy to execute the exact Smith-Waterman (SW) algorithm for megabase DNA sequences in heterogeneous multi-GPU platforms. In our strategy, the computation of a single huge SW matrix is spread over multiple GPUs, which communicate border elements to the neighbour, using a circular buffer mechanism that hides the communication overhead. We compared 4 pairs of human-chimpanzee homologous chromosomes using 2 different GPU environments, obtaining a performance of up to 140.36 GCUPS (Billion of cells processed per second) with 3 heterogeneous GPUS.

关键词： Graphics processing unit

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Data Transformations Enabling Loop Vectorization on Multithreaded Data parallel Architectures

Data Transformations Enabling Loop Vectorization on Multithr...

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15th acm sigplan symposium on principles and practice of parallel programming

作者： Jang, Byunghyun Mistry, Perhaad Schaa, Dana Dominguez, Rodrigo Kaeli, David Northeastern Univ Dept ECE Boston MA 02115 USA

ISBN: (纸本)9781605587080

Loop vectorization, a key feature exploited to obtain high performance on Single Instruction Multiple Data (SIMD) vector architectures, is significantly hindered by irregular memory access patterns in the data stream. this paper describes data transformations that allow us to vectorize loops targeting massively multithreaded data parallel architectures. We present a mathematical model that captures loop-based memory access patterns and computes the most appropriate data transformations in order to enable vectorization. Our experimental results show that the proposed data transformations can significantly increase the number of loops that can be vectorized and enhance the data-level parallelism of applications. Our results also show that the overhead associated with our data transformations can be easily amortized as the size of the input data set increases. For the set of high performance benchmark kernels studied, we achieve consistent and significant performance improvements (up to 11.4X) by applying vectorization using our data transformation approach.

关键词： Loop Vectorization Data Transformation GPGPU

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Linear-time algorithm for computing the memory access sequence in data-parallel programs

Linear-time algorithm for computing the memory access sequen...

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proceedings of the 5th acm sigplan symposium on principles and practice of parallel programming

作者： Kennedy, Ken Nedeljkovic, Nenad Sethi, Ajay Rice Univ Houston United States

Data-parallel languages, such as High Performance Fortran, are widely regarded as a promising means for writing portable programs for distributed-memory machines. Novel features of these languages call for the development of new techniques in both compilers and run-time systems. In this paper, we present an improved algorithm for finding the local memory access sequence in computations involving regular sections of arrays with cyclic(k) distributions. After establishing the fact that regular section indices correspond to elements of an integer lattice, we show how to find a lattice basis that allows for simple and fast enumeration of memory accesses. the complexity of our algorithm is shown to be lower than that of the previous solution for the same problem. In addition, the experimental results demonstrate the efficiency of our method in practice.

关键词： parallel algorithms

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