检索结果-内蒙古大学图书馆

您好，读者！请登录

内蒙古大学图书馆

首页
概况
党建
资源
服务
科研支持
- 论文收录引用证明
- 科技查新
知识产权
档案馆
帮助

咨询与建议

建议与咨询留下您的常用邮箱和电话号码，以便我们向您反馈解决方案和替代方法

您的常用邮箱：*

您的手机号码：*

问题描述：

当前已输入0个字，您还可以输入200个字

全部搜索
期刊论文
图书
学位论文
标准
纸本馆藏
外文资源发现
数据库导航
超星发现

高级检索

时间限定

出版年份：

文献类型

图书期刊文献学位论文多媒体

馆藏选择

电子馆藏纸本馆藏

核心期刊

全部期刊 SCI 收录期刊 SSCI 收录期刊 EI 收录期刊 CSCD 收录期刊 CSSCI 收录期刊

语言

中文英文

文献类型

期刊文献图书学位论文标准纸本馆藏

帮助

文字说明：

T=题名（书名、题名），A=作者（责任者），K=主题词，P=出版物名称，PU=出版社名称，O=机构（作者单位、学位授予单位、专利申请人），L=中图分类号，C=学科分类号，U=全部字段，Y=年（出版发行年、学位年度、标准发布年）

检索规则说明：

AND代表“并且”；OR代表“或者”；NOT代表“不包含”；(注意必须大写,运算符两边需空一格)

检索范例：

范例一：(K=图书馆学 OR K=情报学) AND A=范并思 AND Y=1982-2016
范例二：P=计算机应用与软件 AND (U=C++ OR U=Basic) NOT K=Visual AND Y=2011-2016

分类表

所选分类

>> <<

限定检索结果

文献类型

54 篇 会议

馆藏范围

54 篇 电子文献
0 种 纸本馆藏

日期分布

学科分类号

35 篇 工学
- 32 篇 计算机科学与技术...
- 20 篇 软件工程
- 4 篇 电气工程
- 2 篇 动力工程及工程热...
- 2 篇 电子科学与技术（可...
- 2 篇 信息与通信工程
- 2 篇 建筑学
- 1 篇 冶金工程
- 1 篇 土木工程
- 1 篇 轻工技术与工程
9 篇 理学
- 8 篇 数学
- 1 篇 系统科学
- 1 篇 统计学（可授理学、...
4 篇 管理学
- 3 篇 管理科学与工程(可...
- 2 篇 工商管理
- 1 篇 图书情报与档案管...
1 篇 经济学
- 1 篇 应用经济学

主题

3 篇 parallel archite...
3 篇 scheduling
2 篇 computer archite...
2 篇 software archite...
2 篇 asynchronous var...
2 篇 cuda
2 篇 dependence graph
2 篇 numerical stabil...
2 篇 machine learning
2 篇 fpga
1 篇 computer science
1 篇 parallel algorit...
1 篇 consumers
1 篇 plug-and-play de...
1 篇 experimentation
1 篇 performance
1 篇 profiling
1 篇 brain-inspired c...
1 篇 scalability
1 篇 dataflow archite...

机构

3 篇 univ calif berke...
2 篇 univ texas austi...
1 篇 nc state univ ra...
1 篇 penn state univ ...
1 篇 univ calif san d...
1 篇 univ texas austi...
1 篇 new mexico state...
1 篇 brookhaven natio...
1 篇 department of el...
1 篇 seoul natl univ
1 篇 university of sã...
1 篇 univ jaume 1 dep...
1 篇 universitat poli...
1 篇 fraunhofer iese ...
1 篇 university of ch...
1 篇 florianópolis
1 篇 computer science...
1 篇 universität duis...
1 篇 politecnico di m...
1 篇 platform archite...

作者

1 篇 anjum iffat
1 篇 ding wei
1 篇 alex druinsky
1 篇 ballard grey
1 篇 chan ernie
1 篇 ha phuong h.
1 篇 becker jurgen
1 篇 wang lei
1 篇 lee yunsup
1 篇 mirakhorli mehdi
1 篇 agostini luciano
1 篇 seidel ismael
1 篇 bacis marco
1 篇 zou zhuowen
1 篇 dongarra jack
1 篇 mehta gayatri
1 篇 bosch samuel
1 篇 drago mauro luig...
1 篇 bishop judith
1 篇 yum ki hwan

语言

54 篇 英文

检索条件"任意字段=Proceedings of the 27th ACM symposium on Parallelism in Algorithms and Architectures"

共 54 条记录，以下是41-50 订阅

全选清除本页清除全部题录导出标记到"检索档案"

详细简洁

排序：

Designing architectures from problem descriptions by interactive model transformation 12

Designing architectures from problem descriptions by interac...

引用

27th Annual acm symposium on Applied Computing, SAC 2012

作者： Alebrahim, Azadeh Côté, Isabelle Heisel, Maritta Choppy, Christine Hatebur, Denis Universität Duisburg-Essen Germany LIPN UMR CNRS Université Paris 13 France Institut für Technische Systeme GmbH Germany

ISBN: (纸本)9781450308571

We present a structured approach to systematically derive a software architecture from a given problem description based on problem frames and a description of the environment. Our aim is to re-use the elements of the problem descriptions in creating the architecture. the derivation is performed by transforming the problem description into an initial architecture, where each subproblem corresponds to a component. the transformation is supported by model transformation rules, formally specified as operations with pre- and postconditions. this specification serves as a blueprint for a tool supporting the architectural design. We illustrate our method by the example of a patient care system. © 2012 Authors.

关键词： Architectural design

来源：评论

学校读者我要写书评

暂无评论

proceedings - International symposium on Computer Architecture

Proceedings - International Symposium on Computer Architectu...

引用

6th Annual symposium on Computer Architecture, ISCA 1979

the proceedings contain 27 papers. the topics discussed include: A concurrent computer architecture and a ring based implementation;on-line algorithms for the design of pipeline architectures;architectural implications of abstract data type implementation;a new approach to an adaptive computer - an automatic recovery mechanism to prevent the occurrence of subtract errors;overview of the arcade system;an architecture with many operand registers to efficiently execute block-structured languages;an expandable multiprocessor architecture for video graphics (preliminary report);and an adaptive multimicroprocessor array computing structure for radar signal processing applications.

关键词：

来源：评论

学校读者我要写书评

暂无评论

2015 IEEE Hot Chips 27 symposium, HCS 2015

2015 IEEE Hot Chips 27 Symposium, HCS 2015

引用

27th IEEE Hot Chips symposium, HCS 2015

ISBN: (纸本)9781467388856

the proceedings contain 40 PowerPoint presentations. the topics discussed include: deep learning: architectures, algorithms, applications;makers from hobbyists to professionals;maker trends: the path of least resistance;IoT device development challenges and solutions;implementing software defined radio on the parallella;current trends for hardware and software developers;PULP: a parallel ultra low power platform for next generation IoT applications;ultra-low power wireless SoCs enabling a batteryless IoT;a scalable heterogeneous multicore architecture for ADAS;energy efficient graphics and multimedia in 28nm Carrizo APU;and LS2085/8A Freescale's new QorIQ layerscape communications processor.

关键词：

来源：评论

学校读者我要写书评

暂无评论

Revisiting HyperDimensional Learning for FPGA and Low-Power architectures 27

Revisiting HyperDimensional Learning for FPGA and Low-Power ...

引用

27th IEEE International symposium on High-Performance Computer Architecture (HPCA)

作者： Imani, Mohsen Zou, Zhuowen Bosch, Samuel Rao, Sanjay Anantha Salamat, Sahand Kumar, Venkatesh Kim, Yeseong Rosing, Tajana Univ Calif Irvine Dept Comp Sci Irvine CA 92697 USA Univ Calif San Diego Dept Comp Sci & Engn San Diego CA 92093 USA MIT Dept Elect Engn & Comp Sci Cambridge MA 02139 USA Daegu Gyeongbuk Inst Sci & Technol Informat & Commun Engn Daegu South Korea

ISBN: (纸本)9781665422352

Today's applications are using machine learning algorithms to analyze the data collected from a swarm of devices on the Internet of things (IoT). However, most existing learning algorithms are overcomplex to enable real-time learning on IoT devices with limited resources and computing power. Recently, Hyperdimensional computing (HDC) is introduced as an alternative computing paradigm for enabling efficient and robust learning. HDC emulates the cognitive task by representing the values as patterns of neural activity in high-dimensional space. HDC first encodes all data points to high-dimensional vectors. It then efficiently performs the learning task using a well-defined set of operations. Existing HDC solutions have two main issues that hinder their deployments on low-power embedded devices: (i) the encoding module is costly, dominating 80% of the entire training performance, (ii) the HDC model size and the computation cost grow significantly with the number of classes in online inference. In this paper, we proposed a novel architecture, LookHD, which enables real-time HDC learning on low-power edge devices. LookHD exploits computation reuse to memorize the encoding module and simplify its computation with single memory access. LookHD also address the inference scalability by exploiting HDC governing mathematics that compresses the HDC trained model into a single hypervector. We present how the proposed architecture can be implemented on the existing low power architectures: ARM processor and FPGA design. We evaluate the efficiency of the proposed approach on a wide range of practical classification problems such as activity recognition, face recognition, and speech recognition. Our evaluations show that LookHD can achieve, on average, 28.3 x faster and 97.4 x more energy-efficient training as compared to the state-of-the-art HDC implemented on the FPGA. Similarly, in the inference, LookHD is 2.2 x faster, 4.1 x more energy-efficient, and has 6.3 x smaller model siz

关键词： HyprDimensional computing Brain-inspired computing Machine learning Real-time learning FPGA

来源：评论

学校读者我要写书评

暂无评论

Cross-Architectural study of custom reconfigurable devices using crowdsourcing

Cross-Architectural study of custom reconfigurable devices u...

引用

2013 IEEE 37th Annual Computer Software and Applications Conference, COMPSAC 2013

作者： Sistla, Anilkumar Parde, Natalie Patel, Krunalkumar Mehta, Gayatri University of North Texas Denton TX 76207 United States

ISBN: (纸本)9780769549798

Coarse grained reconfigurable architectures (CGRAs) are promising due to the ability to highly customize such architectures to an application domain. However, good tools and good algorithms to map benchmarks onto these architectures are needed to support design space exploration for CGRAs. In particular, the mapping problem has been difficult to solve in a satisfying and general way. In this paper, we present an architectural design flow using crowd sourcing to provide mappings of benchmarks onto new architectures. We show that the crowd can provide high quality, reliable mappings, outperforming our custom Simulated Annealing algorithm in 37 of 42 trials. We further show that the crowd can provide other types of feedback that are difficult to obtain from an automatic mapping algorithm. Our proof of concept cross-Architectural study concludes that a mesh architecture with 8Way connectivity outperforms the other interconnection options tested. A stripe architecture with dedicated vertical routes (StripeDR) performs competitively as well. © 2013 IEEE.

关键词： Reconfigurable architectures

来源：评论

学校读者我要写书评

暂无评论

Towards a framework to perform DPA attack on GALS pipeline architectures 14

Towards a framework to perform DPA attack on GALS pipeline a...

引用

27th symposium on Integrated Circuits and Systems Design, SBCCI 2014

作者： Loder, Luciano De Souza, Adao Fay, Marcelo Soares, Rafael Instituto Federal Sul-Riograndense - IFSUL Praça 20 de setembro Pelotas - RS Brazil Universidade Federal de Pelotas - UFPEL Rua Gomes Carneiro 1 Pelotas - RS Brazil

ISBN: (纸本)9781479968732

Differential power analysis (DPA) is a low cost method to extract secret information from supposedly secure cryptographic systems. DPA correlates the data processed with power consumption of the device through statistical analyses to unveil the secret key of the system. A common approach to counteract DPA is randomizing the data processing in order to misalign power consumption traces in time and amplitude domains using strategies such as random delay insertion and random clock frequency. the combination of strategies requires more computational effort for a successful DPA attack. this paper introduces the first steps toward a framework to compromise cryptographic systems that combine misalignment strategies to hide leakage information. the steps of the proposed framework are discussed in terms of computational efforts and successful attacks rate. the results obtained in an architecture prototyped on FPGA show that noise filtering can significantly improve the DPA success rate. Furthermore, clustering traces by frequency allow the improvement of the alignment step, thus increasing about 40 times the efficiency of the DPA attack to the cost of an increase of the computational efforts. © 2014 IEEE.

关键词： Side channel attack

来源：评论

学校读者我要写书评

暂无评论

Data Layout Optimization for GPGPU architectures 13

Data Layout Optimization for GPGPU Architectures

引用

18th acm SIGPLAN symposium on Principles and Practice of Parallel Programming

作者： Liu, Jun Ding, Wei Jang, Ohyoung Kandemir, Mahmut Penn State Univ University Pk PA 16802 USA

ISBN: (纸本)9781450319225

GPUs are being widely used in accelerating general-purpose applications, leading to the emergence of GPGPU architectures. New programming models, e. g., Compute Unified Device Architecture (CUDA), have been proposed to facilitate programming general-purpose computations in GPGPUs. However, writing high-performance CUDA codes manually is still tedious and difficult. In particular, the organization of the data in the memory space can greatly affect the performance due to the unique features of a custom GPGPU memory hierarchy. In this work, we propose an automatic data layout transformation framework to solve the key issues associated with a GPGPU memory hierarchy (i.e., channel skewing, data coalescing, and bank conflicts). Our approach employs a widely applicable strategy based on a novel concept called data localization. Specifically, we try to optimize the layout of the arrays accessed in affine loop nests, for both the device memory and shared memory, at both coarse grain and fine grain parallelization levels. We performed an experimental evaluation of our data layout optimization strategy using 15 benchmarks on an NVIDIA CUDA GPU device. the results show that the proposed data transformation approach brings around 4.3X speedup on average.

关键词： algorithms Design Performance Experimentation GPGPU Data Layout Transformation CUDA Optimization

来源：评论

学校读者我要写书评

暂无评论

Designing hybrid architectures for massive-scale graph analysis

Designing hybrid architectures for massive-scale graph analy...

引用

2013 IEEE 37th Annual Computer Software and Applications Conference, COMPSAC 2013

作者： Ediger, David Bader, David A. Georgia Institute of Technology United States

ISBN: (纸本)9780769549798

Turning large volumes of data into actionable knowledge is a top challenge in high performance computing. Our previous work in this area demonstrated algorithmic techniques for massively parallel graph analysis on multithreaded systems. this work led to the development of GraphCT, the first end-to-end graph analytics platform for the Cray XMT and x86-class systems with OpenMP, and STINGER, a high performance, multithreaded, dynamic graph data structure and algorithms. Both of these packages are freely available as open source software. this dissertation research culminates in experimental and analytical techniques to study the marriage of disk-based systems, such as Hadoop, with shared memory-based systems, such as the Cray XMT, for data-intensive applications. David Ediger is a fifth year PhD candidate in Electrical and Computer Engineering. © 2013 IEEE.

关键词： Open source software

来源：评论

学校读者我要写书评

暂无评论

An efficient uncertain graph processing framework for heterogeneous architectures 21

An efficient uncertain graph processing framework for hetero...

引用

26th acm SIGPLAN symposium on Principles and Practice of Parallel Programming, PPoPP 2021

作者： Zhang, Heng Li, Lingda Zhuang, Donglin Liu, Rui Song, Shuang Tao, Dingwen Wu, Yanjun Song, Shuaiwen Leon Institution of Software Chinese Academy of Sciences China Brookhaven National Laboratory New York United States University of Sydney Sydney Australia University of Chicago Chicago United States Facebook Inc. Montain View United States Washington State University Washington United States Institution of Software Chinese Academy of Sciences Beijing China

ISBN: (纸本)9781450382946

Uncertain or probabilistic graphs have been ubiquitously used in many emerging applications. Previously CPU based techniques were proposed to use sampling but suffer from (1) low computation efficiency and large memory overhead, (2) low degree of parallelism, and (3) nonexistent general framework to effectively support programming uncertain graph applications. To tackle these challenges, we propose a general uncertain graph processing framework for multi-GPU systems, named BPGraph. Integrated with our highly-efficient path sampling method, BPGraph can support a wide range of uncertain graph algorithms' development and optimization. Extensive evaluation demonstrates a significant performance improvement from BPGraph over the state-of-the-art uncertain graph sampling techniques. © 2021 Owner/Author.

关键词： Graphics processing unit

来源：评论

学校读者我要写书评

暂无评论

Hardware and software support for NUMA computing on configurable emulated shared memory architectures

Hardware and software support for NUMA computing on configur...

引用

2013 IEEE 37th Annual Computer Software and Applications Conference, COMPSAC 2013

作者： Forsell, Martti Hansson, Erik Kessler, Christoph Makela, Jari-Matti Leppanen, Ville Platform Architectures Team VTT Technical Research Centre of Finland Box 1100 FI-90571 Oulu Finland Computer Science Deptartment Linköping University S-58183 Linkoping Sweden Information Technology University of Turku Joukahaisenkatu 3-5 FI-20014 Turku Finland

ISBN: (纸本)9780769549798

the emulated shared memory (ESM) architectures are good candidates for future general purpose parallel computers due to their ability to provide easy-to-use explicitly parallel synchronous model of computation to programmers as well as avoid most performance bottlenecks present in current multicore architectures. In order to achieve full performance the applications must, however, have enough thread-level parallelism (TLP). To solve this problem, in our earlier work we have introduced a class of configurable emulated shared memory (CESM) machines that provides a special non-uniform memory access (NUMA) mode for situations where TLP is limited or for direct compatibility for legacy code sequential computing or NUMA mechanism. Unfortunately the earlier proposed CESM architecture does not integrate the different modes of the architecture well together e.g. by leaving the memories for different modes isolated and therefore the programming interface is non-integrated. In this paper we propose a number of hardware and software techniques to support NUMA computing in CESM architectures in a seamless way. the hardware techniques include three different NUMA-shared memory access mechanisms and the software ones provide a mechanism to integrate NUMA computation into the standard parallel random access machine (PRAM) operation of the CESM. the hardware techniques are evaluated on our REPLICA CESM architecture and compared to an ideal CESM machine making use of the proposed software techniques. © 2013 IEEE.

关键词： Software architecture

来源：评论

学校读者我要写书评

暂无评论

没有更多数据了...

全选清除本页清除全部题录导出标记到“检索档案”

共6页 << < 1 2 3 4 5 6 > >>

检索报告对象比较合并检索0

隐藏清空

合并搜索

回到顶部

执行限定条件

内容：

评分：

请选择保存的检索档案：

请选择收藏分类：

订阅名称：

通借通还

温馨提示：

图书名称：

借书校区：

取书校区：

手机号码：

邮箱地址：

一卡通帐号：

电话和邮箱必须正确填写，我们会与您联系确认。

联系人：

所在院系：

联系邮箱：

联系电话：

内蒙古自治区呼和浩特市赛罕区大学西街235号邮编: 010021

建议与咨询 留下您的常用邮箱和电话号码，以便我们向您反馈解决方案和替代方法

时间限定

文献类型

馆藏选择

核心期刊

语言

文献类型

帮助

文字说明：

检索规则说明：

检索范例：

分类表

所选分类

限定检索结果

文献类型

馆藏范围

日期分布

学科分类号

主题

机构

作者

语言

请选择保存的检索档案： 新增检索档案 确定 取消

请选择收藏分类： 新增自定义分类 确定 取消

通借通还

建议与咨询留下您的常用邮箱和电话号码，以便我们向您反馈解决方案和替代方法

请选择保存的检索档案：

请选择收藏分类：