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检索条件"任意字段=Proceedings of the 37th Annual ACM/IEEE Symposium on Logic in Computer Science"
423 条 记 录,以下是241-250 订阅
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Variable reordering and sifting for QMDD
Variable reordering and sifting for QMDD
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37th International symposium on Multiple-Valued logic, ISMVL 2007
作者: Miller, D. Michael Feinstein, David Y. thornton, Mitchell A. Department of Computer Science University of Victoria Victoria BC Canada Department of Computer Science and Engineering Southern Methodist University Dallas TX United States
this paper considers variable reordering for quantum multiple-valued decision diagrams (QMDD) used to represent the matrices describing reversible and quantum gates and circuits. An efficient method for adjacent varia... 详细信息
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An application of 16-valued logic to design of reconfigurable logic arrays
An application of 16-valued logic to design of reconfigurabl...
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37th International symposium on Multiple-Valued logic, ISMVL 2007
作者: Sasao, Tsutomu Department of Computer Science and Electronics Kyushu Institute of Technology Iizuka 820-8502 Japan
this paper presents a method to implement a reconfigurable logic array by using FPGA. 16-valued logic is introduced to design circuits with 2-valued 4-input LUTs. Symmetric functions and adders can be efficiently repr... 详细信息
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Multiple-valued logic ciruits design using negative differential resistance devices
Multiple-valued logic ciruits design using negative differen...
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37th International symposium on Multiple-Valued logic, ISMVL 2007
作者: Berezowski, Krzysztof S. Vrudhula, Sarma B. K. Wroclaw University of Technology Wroclaw Poland Computer Science and Engineering Dept. Arizona State University Tempe AZ 85281
In this paper, we present a novel multiple-valued logic circuit design style based on negative differential resistance (NDR) devices and the monostable-to-multistable transition logic (MML) operating principle. We int... 详细信息
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Evaluation of toggle coverage for MVL circuits specified in the SystemVerilog HDL
Evaluation of toggle coverage for MVL circuits specified in ...
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37th International symposium on Multiple-Valued logic, ISMVL 2007
作者: Amoui, Mahsan Große, Daniel thornton, Mitchell A. Drechsler, Rolf Computer Science and Engineering Southern Methodist University Dallas TX 75275 Institute of Computer Science University of Bremen 28359 Bremen Germany
Designing modern circuits comprised of millions of gates is a very challenging task. therefore new directions are investigated for efficient modeling and verification of such systems. Recently, a new language, SystemV... 详细信息
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Weighted and ordered direct cover algorithms for minimization of MVL functions
Weighted and ordered direct cover algorithms for minimizatio...
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37th International symposium on Multiple-Valued logic, ISMVL 2007
作者: Abd-El-Barr, Mostafa Sarif, Bambang A.B. Department of Information Science CFW Kuwait University Department of Computer Engineering KFUPM KSA
In this paper, Weighted and Ordered Direct Cover Algorithms (abbreviated as WDC and ODC, respectively) for synthesis of Multiple-Valued logic (MVL) functions are proposed. the algorithms are tested using 50000 randoml... 详细信息
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On designs of radix converters using arithmetic decompositions - Binary to decimal converters
On designs of radix converters using arithmetic decompositio...
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37th International symposium on Multiple-Valued logic, ISMVL 2007
作者: Iguchi, Yukihiro Sasao, Tsutomu Matsuura, Munehiro Dept. of Computer Science Meiji University Kawasaki 214-8571 Japan Dept. of Computer Science and Electronics Kyushu Institute of Technology Iizuka 820-8502 Japan
In digital signal processing, radixes other than two are often used for high-speed computation. In the computation for finance, decimal numbers are used instead of binary numbers. In such cases, radix converters are n... 详细信息
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2-SAT problems in some multi-valued logics based on finite lattices
2-SAT problems in some multi-valued logics based on finite l...
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37th International symposium on Multiple-Valued logic, ISMVL 2007
作者: Charatonik, Witold Wrona, Michal University of Wroclaw Institute of Computer Science ul. Joliot-Curie 15 PL-50-383 Wroclaw
We prove that regular 2-SAT with signs of the form u&rarr i and drarr;i, where the underlying truth value set forms a lattice, is solvable in quadratic time in the size of the input, and in the case where the latt... 详细信息
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Quantum realization of some ternary circuits using muthukrishnan-stroud gates
Quantum realization of some ternary circuits using muthukris...
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37th International symposium on Multiple-Valued logic, ISMVL 2007
作者: Khan, Asif I. Nusrat, Nadia Khan, Samira M. Hasan, Masud Khan, Mozammel H. A. Department of Electrical and Electronic Engineering Bangladesh University of Engineering and Technology Dhaka-1000 Bangladesh Department of Computer Science and Engineering Bangladesh University of Engineering and Technology Dhaka-1000 Bangladesh Department of Computer Science and Engineering East West University 43 Mohakhali Dhaka-1212 Bangladesh
We present realization of ternary Toffoli gate and modified Fredkin gate for quantum computing on top of ion trap realizable Muthukrishnan-Stroud primitive gates. Our design methodology is based on first realizing the... 详细信息
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Experimental studies on SAT-based ATPG for gate delay faults
Experimental studies on SAT-based ATPG for gate delay faults
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37th International symposium on Multiple-Valued logic, ISMVL 2007
作者: Eggersglüß, Stephan Tille, Daniel Fey, Görschwin Drechsler, Rolf Glowatz, Andreas Hapke, Friedrich Schlöffel, Jürgen Institute of Computer Science University of Bremen 28359 Bremen Germany NXP Semiconductors GmbH 21147 Hamburg Germany
the clock rate of modern chips is still increasing and at the same time the gate size decreases. As a result, already slight variations during the production process may cause a functional failure. therefore, dynamic ... 详细信息
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Representations of elementary functions using edge-valued MDDs
Representations of elementary functions using edge-valued MD...
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37th International symposium on Multiple-Valued logic, ISMVL 2007
作者: Nagayama, Shinobu Sasao, Tsutomu Department of Computer Engineering Hiroshima City University Hiroshima 731-3194 Japan Department of Computer Science and Electronics Kyushu Institute of Technology Iizuka 820-8502 Japan
this paper proposes a method to represent elementary functions such as trigonometric, logarithmic, square root, and reciprocal functions using edge-valued multi-valued decision diagrams (EVMDDs). We introduce a new cl... 详细信息
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