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Teaching parallel and distributed computing using a cluster computing portal

Teaching parallel and distributed computing using a cluster ...

引用

2013 ieee 37th Annual Computer Software and Applications Conference, COMPSAC 2013

作者： Lin, Hong Department of Computer and Mathematical Sciences University of Houston-Downtown Houston United States

ISBN: (纸本)9780769549798

this paper presents the establishment of cluster computing lab at a minority serving institution that aims to provide computing resources to support undergraduate computer science curriculum. We present a case study of using this platform to teach parallel and distributed computing topics in the operating system course. the evaluation of the teaching effectiveness is presented thereafter. © 2013 ieee.

关键词： Cluster computing

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proceedings of the 2012 10th ieee International symposium on parallel and distributed processing with Applications, ISPA 2012

Proceedings of the 2012 10th IEEE International Symposium on...

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2012 10th ieee International symposium on parallel and distributed processing with Applications, ISPA 2012

ISBN: (纸本)9780769547015

the proceedings contain 133 papers. the topics discussed include: multiple spanning tree construction for deadlock-free adaptive routing in irregular networks;chemical reaction optimization for heterogeneous computing environments;on adaptive contention management strategies for software transactional memory;reducing energy consumption of dense linear algebra operations on hybrid CPU-GPU platforms;efficient GPU asynchronous implementation of a watershed algorithm based on cellular automata;portfolio management using particle swarm optimization on GPU;parallel parameter identification in industrial biotechnology;towards an infrastructure description language for modeling computing infrastructures;trace file comparison with a hierarchical sequence alignment algorithm;network load-aware user grouping for Internet media streaming systems;a simulation study of multi-criteria scheduling in grid based on genetic algorithms;and analytical framework for QoS aware publish/subscribe system deployed on MANET.

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Early Experience on the Blue Gene/Q Supercomputing System

Early Experience on the Blue Gene/Q Supercomputing System

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ieee 27th International parallel and distributed processing symposium (IPDPS)

作者： Morozov, Vitali Kumaran, Kalyan Vishwanath, Venkatram Meng, Jiayuan Papka, Michael E. Argonne Natl Lab Argonne IL 60439 USA

ISBN: (纸本)9780769549712

the Argonne Leadership Computing Facility (ALCF) is home to Mira, a 10 PF Blue Gene/Q (BG/Q) system. the BG/Q system is the third generation in Blue Gene architecture from IBM and like its predecessors combines system-on-chip technology with a proprietary interconnect (5-D torus). Each compute node has 16 augmented PowerPC A2 processor cores with support for simultaneous multithreading, 4-wide double precision SIMD, and different data prefetching mechanisms. Mira offers several new opportunities for tuning and scaling scientific applications. this paper discusses our early experience with a subset of micro-benchmarks, MPI benchmarks, and a variety of science and engineering applications running at ALCF. Both performance and power are studied and results on BG/Q is compared with its predecessor BG/P. Several lessons gleaned from tuning applications on the BG/Q architecture for better performance and scalability are shared.

关键词： IBM computers application program interfaces multi-threading parallel machines system-on-chip

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High Performance FFT Based Poisson Solver on a CPU-GPU Heterogeneous Platform

High Performance FFT Based Poisson Solver on a CPU-GPU Heter...

引用

ieee 27th International parallel and distributed processing symposium (IPDPS)

作者： Wu, Jing JaJa, Joseph Univ Maryland Dept Elect & Comp Engn College Pk MD 20742 USA

ISBN: (纸本)9780769549712

We develop an optimized FFT based Poisson solver on a CPU-GPU heterogeneous platform for the case when the input is too large to fit on the GPU global memory. the solver involves memory bound computations such as 3D FFT in which the large 3D data may have to be transferred over the PCIe bus several times during the computation. We develop a new strategy to decompose and allocate the computation between the GPU and the CPU such that the 3D data is transferred only once to the device memory, and the executions of the GPU kernels are almost completely overlapped with the PCI data transfer. We were able to achieve significantly better performance than what has been reported in previous related work, including over 50 GFLOPS for the three periodic boundary conditions, and over 40 GFLOPS for the two periodic, one Neumann boundary conditions. the PCIe bus bandwidth achieved is over 5GB/s, which is close to the best possible on our platform. For all the cases tested, the single 3D PCIe transfer time, which constitutes a lower bound on what is possible on our platform, takes almost 70% of the total execution time of the Poisson solver.

关键词： Fast Fourier Transforms parallel and Vector Implementations GPU CUDA Poisson Equations

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Revisiting a pattern for processing combinatorial objects in parallel

Revisiting a pattern for processing combinatorial objects in...

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2013 ieee 37th Annual Computer Software and Applications Conference, COMPSAC 2013

作者： Trefftz, Christian Scripps, Jerry School of Computing Grand Valley State University Allendale MI 49401-9403 United States

ISBN: (纸本)9780769549798

the unrank pattern to process combinatorial objects in parallel is revisited. the pattern is applied to find, in parallel, solutions to a restricted version of the community finding problem on small graphs. Performance results obtained on a shared memory machine, a cluster of workstations and a Graphical processing Unit (GPU) are included. © 2013 ieee.

关键词： Graphics processing unit

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Exploring SIMD for Molecular Dynamics, Using Intel®Xeon®Processors and Intel®Xeon Phi™ Coprocessors

Exploring SIMD for Molecular Dynamics, Using Intel®Xeon®Pr...

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ieee 27th International parallel and distributed processing symposium (IPDPS)

作者： Pennycook, S. J. Hughes, C. J. Smelyanskiy, M. Jarvis, S. A. Univ Warwick Dept Comp Sci Coventry CV4 7AL W Midlands England Intel Corp Parallel Comp Lab Santa Clara CA USA

ISBN: (纸本)9780769549712

We analyse gather-scatter performance bottle-necks in molecular dynamics codes and the challenges that they pose for obtaining benefits from SIMD execution. this analysis informs a number of novel code-level and algorithmic improvements to Sandia's miniMD benchmark, which we demonstrate using three SIMD widths (128-, 256- and 512-bit). the applicability of these optimisations to wider SIMD is discussed, and we show that the conventional approach of exposing more parallelism through redundant computation is not necessarily best. In single precision, our optimised implementation is up to 5x faster than the original scalar code running on Intel (R) Xeon (R) processors with 256-bit SIMD, and adding a single Intel (R) Xeon Phi (TM) coprocessor provides up to an additional 2x performance increase. these results demonstrate: (i) the importance of effective SIMD utilisation for molecular dynamics codes on current and future hardware;and (ii) the considerable performance increase afforded by the use of Intel (R) Xeon Phi (TM) coprocessors for highly parallel workloads.

关键词： scientific computing accelerator architectures parallel programming performance analysis high performance computing

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On Graphs, GPUs, and Blind Dating A Workload to Processor Matchmaking Quest

On Graphs, GPUs, and Blind Dating A Workload to Processor Ma...

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ieee 27th International parallel and distributed processing symposium (IPDPS)

作者： Gharaibeh, Abdullah Costa, Lauro Beltrao Santos-Neto, Elizeu Ripeanu, Matei Univ British Columbia Dept Elect & Comp Engn Vancouver BC V5Z 1M9 Canada

ISBN: (纸本)9780769549712

Graph processing has gained renewed attention. the increasing large scale and wealth of connected data, such as those accrued by social network applications, demand the design of new techniques and platforms to efficiently derive actionable information from large scale graphs. Hybrid systems that host processing units optimized for both fast sequential processing and bulk processing (e. g., GPU-accelerated systems) have the potential to cope with the heterogeneous structure of real graphs and enable high performance graph processing. Reaching this point, however, poses multiple challenges. the heterogeneity of the processing elements (e. g., GPUs implement a different parallel processing model than CPUs and have much less memory) and the inherent irregularity of graph workloads require careful graph partitioning and load assignment. In particular, the workload generated by a partitioning scheme should match the strength of the processing element the partition is allocated to. this work explores the feasibility and quantifies the performance gains of such low-cost partitioning schemes. We propose to partition the workload between the two types of processing elements based on vertex connectivity. We show that such partitioning schemes offer a simple, yet efficient way to boost the overall performance of the hybrid system. Our evaluation illustrates that processing a 4-billion edges graph on a system with one CPU socket and one GPU, while offloading as little as 25% of the edges to the GPU, achieves 2x performance improvement over state-of-the-art implementations running on a dual-socket symmetric system. Moreover, for the same graph, a hybrid system with dual-socket and dual-GPU is capable of 1.13 Billion breadth-first search traversed edge per second, a performance rate that is competitive with the latest entries in the Graph500 list, yet at a much lower price point.

关键词： graph theory graphics processing units parallel processing

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distributed throughput Maximization for Multi-Channel ALOHA Networks

Distributed Throughput Maximization for Multi-Channel ALOHA ...

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5th ieee International Workshop on Computational Advances in Multi-Sensor Adaptive processing (CAMSAP)

作者： Cohen, Kobi Leshem, Amir Bar Ilan Univ Fac Engn IL-52900 Ramat Gan Israel

ISBN: (纸本)9781467331463;9781467331449

We consider the problem of distributed throughput maximization for multi-channel ALOHA networks. We focus on networks containing a large number of users that transmit over a low number of channels. First, we consider the problem of constrained distributed rate maximization, where user rates are subject to total transmission probability constraints. We propose a distributed best-response algorithm to solve the rate maximization problem, where each user updates its strategy using its local channel state information (CSI) and by monitoring the channel utilization. We then consider the case where users are not restricted by transmission probability constraints. distributed optimization of the network throughput under uncertainty is mandatory since the transmission probabilities of other users are unknown. We propose a distributed scheme to solve the throughput optimization problem under uncertainty, where users adjust their transmission probability to maximize their rates, but maintain the desired load on the channels. We propose sequential and parallel algorithms for this purpose.

关键词： Collision channels multi-channel ALOHA distributed optimization best-response dynamics

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InfoStor: Highly available distributed block store

InfoStor: Highly available distributed block store

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2013 ieee 37th Annual Computer Software and Applications Conference, COMPSAC 2013

作者： Ren, Yongjian Lin, Youqing Zhang, Jilin Wan, Jian Jiang, Cong-Feng Department of Computer and Technology Hangzhou Dianzi University Hangzhou Zhejiang 310018 China

ISBN: (纸本)9780769549798

In order to adapt to the requirements of the massive scale storage environments, and improve storage space utilization of the data center host, we designed and implemented InfoStor, a heterogeneous environment, distributed block storage system. through in-band storage virtualization technology that provides the reliability of traditional enterprise arrays with low cost and better scalability;provide a copy of redundancy and back-end support the adaptive copy of reconstruction;Using consistent hashing algorithm based on virtual node to manage replica of storage backend to improve the load balance and performance of the distributed block storage system. the evaluation experiments demonstrate that compare to ordinary iSCSI network hard disk, InfoStor reach considerable data processing capabilities I/O throughput, it is foreseeable that system performance did not impact by storage virtualization and distributed storage backend. © 2013 ieee.

关键词： Virtualization

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Discrete min-energy scheduling on restricted parallel processors

Discrete min-energy scheduling on restricted parallel proces...

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2013 ieee 37th Annual Computer Software and Applications Conference, COMPSAC 2013

作者： Jin, Xibo Zhang, Fa Liu, Zhiyong Institute of Computing Technology University of Chinese Academy of Sciences Beijing China

ISBN: (纸本)9780769549798

Different from the previous work on energy-efficient algorithms, which focused on assumption that a task can be assigned to any processor, we study the problem of task Scheduling with the objective of Energy Minimization on Restricted parallel Processors (SEMRPP). Restriction accounts for affinities between tasks and processors, that is, a task has its own eligible processing set of processors. It assumes all tasks have a prescribed deadline on the execution time. We study the processors run at a finite number of distinct speeds, and the processors cannot change its speed during the computation of a task. Our work is motivated by the practical variable voltage processors that they cannot run at arbitrary speed and the task may be failure if the processor adjusts its speed during the computation of the task. We assess the complexity of the problem and present a polynomial time approximation algorithm with a bounded factor related to the adjacent speed ratio. © 2013 ieee.

关键词： Speed

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