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VisIO: Enabling interactive visualization of ultra-scale, time series data via high-bandwidth distributed I/O systems

VisIO: Enabling interactive visualization of ultra-scale, ti...

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25th ieee International parallel and distributed processing symposium, IPDPS 2011

作者： Mitchell, Christopher Ahrens, James Wang, Jun Department of Electrical Engineering and Computer Science University of Central Florida Orlando FL 32816-2450 United States Computer Computational and Statistical Sciences Los Alamos National Laboratory Los Alamos NM 87545 United States

ISBN: (纸本)9780769543857

Petascale simulations compute at resolutions ranging into billions of cells and write terabytes of data for visualization and analysis. Interactive visualization of this time series is a desired step before starting a new run. the I/O subsystem and associated network often are a significant impediment to interactive visualization of time-varying data, as they are not configured or provisioned to provide necessary I/O read rates. In this paper, we propose a new I/O library for visualization applications: VisIO. Visualization applications commonly use N-to-N reads within their parallel enabled readers which provides an incentive for a shared-nothing approach to I/O, similar to other data-intensive approaches such as Hadoop. However, unlike other data-intensive applications, visualization requires: (1) interactive performance for large data volumes, (2) compatibility with MPI and POSIX file system semantics for compatibility with existing infrastructure, and (3) use of existing file formats and their stipulated data partitioning rules. VisIO, provides a mechanism for using a non-POSIX distributed file system to provide linear scaling of I/O bandwidth. In addition, we introduce a novel scheduling algorithm that helps to co-locate visualization processes on nodes with the requested data. Testing using VisIO integrated into Para View was conducted using the Hadoop distributed File System (HDFS) on TACC's Longhorn cluster. A representative dataset, VPIC, across 128 nodes showed a 64.4% read performance improvement compared to the provided Lustre installation. Also tested, was a dataset representing a global ocean salinity simulation that showed a 51.4% improvement in read performance over Lustre when using our VisIO system. VisIO, provides powerful high-performance I/O services to visualization applications, allowing for interactive performance with ultra-scale, time-series data. © 2011 ieee.

关键词： Data visualization

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parallelization strategies for Ant Colony Optimisation on GPUs

Parallelization strategies for Ant Colony Optimisation on GP...

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25th ieee International parallel and distributed processing symposium, Workshops and Phd Forum, IPDPSW 2011

作者： Cecilia, José M. García, José M. Ujaldón, Manuel Nisbet, Andy Amos, Martyn Computer Architecture Department University of Murcia 30100 Murcia Spain Computer Architecture Department University of Malaga 29071 Málaga Spain Novel Computation Group Division of Computing and IS Manchester Metropolitan University Manchester M1 5GD United Kingdom

ISBN: (纸本)9780769543857

Ant Colony Optimisation (ACO) is an effective population-based meta-heuristic for the solution of a wide variety of problems. As a population-based algorithm, its computation is intrinsically massively parallel, and it is therefore theoretically well-suited for implementation on Graphics processing Units (GPUs). the ACO algorithm comprises two main stages: Tour construction and Pheromone update. the former has been previously implemented on the GPU, using a task-based parallelism approach. However, up until now, the latter has always been implemented on the CPU. In this paper, we discuss several parallelisation strategies for both stages of the ACO algorithm on the GPU. We propose an alternative data-based parallelism scheme for Tour construction, which fits better on the GPU architecture. We also describe novel GPU programming strategies for the Pheromone update stage. Our results show a total speed-up exceeding 28× for the Tour construction stage, and 20× for Pheromone update, and suggest that ACO is a potentially fruitful area for future research in the GPU domain. © 2011 ieee.

关键词： Graphics processing unit

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Just-in-time instruction set extension - Feasibility and limitations for an FPGA-based reconfigurable ASIP architecture

Just-in-time instruction set extension - Feasibility and lim...

引用

25th ieee International parallel and distributed processing symposium, Workshops and Phd Forum, IPDPSW 2011

作者： Grad, Mariusz Plessl, Christian Paderborn Center for Parallel Computing University of Paderborn Germany

ISBN: (纸本)9780769543857

In this paper, we study the feasibility of moving the instruction set customization process for reconfigurable ASIPs to runtime under the precondition that current FPGA devices and tools are used. To this end we propose a tool flow for just-in-time ASIP customization which identifies suitable custom instructions to accelerate arbitrary binary applications that execute on a virtual machine. the tool flow targets our previously introduced Woolcano reconfigurable ASIP architecture, which augments the PowerPC core in a Xilinx Virtex 4FX CPU with runtime reconfigurable instructions. We evaluate the tool flow with a comprehensive set of applications from the SPEC2006, SPEC2000, MiBench, and SciMark2 benchmark suites and compare the speedups that can be achieved with the overhead of the complete ASIP specialization process. We show that an average speedup of 5× can be achieved for benchmarks from the embedded computing domain. the overhead of custom instruction identification and hardware generation for these benchmarks is less than 50 minutes and will be compensated if the applications execute for more than 2 hours. Finally, we evaluate caching strategies to reduce the time until this break even point is reached. © 2011 ieee.

关键词： Field programmable gate arrays (FPGA)

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On the resilience of [distributed] eas against cheaters in Global Computing platforms

On the resilience of [distributed] eas against cheaters in G...

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25th ieee International parallel and distributed processing symposium, Workshops and Phd Forum, IPDPSW 2011

作者： Varrette, Sebastien Tantar, Emilia Bouvry, Pascal Research Unit University of Luxembourg 16 rue Richard Coudenhove Kalergi L-1359 Luxembourg

ISBN: (纸本)9780769543857

Global Computing (GC) platforms such as BOINC [1] are nowadays considered as the most powerful distributed computing systems worldwide. Based on volunteer computing and various forms of incentives, such architecture also attract cheaters who seek to obtain rewards with little or no contribution to the system. Cheating can be modelized as alteration of output values produced by some or all tasks of the program beeing executed. In complement of generic approaches typically based on task duplication, this article focus on Algorithm-Based Fault Tolerance (ABFT) [2] technics where the fault tolerance scheme is tailored to the algorithm performed to make it resilient to a limited number of faults i.e. falsified results produced by cheaters in this case. More precisely, the ABFT aspects of distributed Evolutionary Algorithm (dEA) against cheaters in GC environment is studied. Our main contribution consists in the formal analysis of the impact of cheating faults on this context, together with a theoretical proof of convergence towards valid solutions despite the presence of malicious acts. Whereas the resilience of dEA against a simpler model of fault (i.e. crash faults) has been observed in the literature [3], [4], [5], [6], this study is the first to propose a theoretical proof of this behaviour, additionally against a more complex kind of fault. By the variety of problems addressed by EAs, this study will hopefully promote their usage in the future developments around GC platforms. © 2011 ieee.

关键词： Fault tolerance

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Scheduling parallel iterative applications on volatile resources

Scheduling parallel iterative applications on volatile resou...

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25th ieee International parallel and distributed processing symposium, IPDPS 2011

作者： Casanova, Henri Dufossé, Fanny Robert, Yves Vivien, Frédéric University of Hawai'i at Manoa United States Ecole Normale Supérieure de Lyon France

ISBN: (纸本)9780769543857

In this paper we study the execution of iterative applications on volatile processors such as those found on desktop grids. We develop master-worker scheduling schemes that attempt to achieve good trade-offs between worker speed and worker availability. A key feature of our approach is that we consider a communication model where the bandwidth capacity of the master for sending application data to workers is limited. this limitation makes the scheduling problem more difficult both in a theoretical sense and in a practical sense. Furthermore, we consider that a processor can be in one of three states: available, down, or temporarily preempted by its owner. this preempted state also complicates the scheduling problem. In practical settings, e.g., desktop grids, master bandwidth is limited and processors are temporarily reclaimed. Consequently, addressing the aforementioned difficulties is necessary for successfully deploying master-worker applications on volatile platforms. Our first contribution is to determine the complexity of the scheduling problem in its off-line version, i.e., when processor availability behaviors are known in advance. Even with this knowledge, the problem is NP-hard, and cannot be approximated within a factor 8/7. Our second contribution is a closed-form formula for the expectation of the time needed by a worker to complete a set of tasks. this formula relies on a Markovian assumption for the temporal availability of processors, and is at the heart of some heuristics that aim at favoring "reliable" processors in a sensible manner. Our third contribution is a set of heuristics, which we evaluate in simulation. Our results provide guidance to selecting the best strategy as a function of processor state availability versus average task duration. © 2011 ieee.

关键词： Bandwidth

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Intelligent distributed Computing V: proceedings of the 5th International symposium on Intelligent distributed Computing - IDC 2011, Delft, the ... 2011

引用

2011年

作者： Frances M T Brazier Kees Nieuwenhuis Gregor Pavlin Martijn Warnier Costin Bădică

ISBN: (纸本)9783642240126

this book represents the combined peer-reviewed proceedings of the Fifth International symposium on Intelligent distributed Computing -- IDC 2011 and of the third International Workshop on Multi-Agent Systems Technology and Semantics -- MASTS 2011. Both events were held in Delft, the Netherlands during October 5-7, 2011. the 33 contributions published in this book address many topics related to theory and applications of intelligent distributed computing and multi-agent systems, including: adaptive and autonomous distributed systems, agent programming, ambient assisted living systems, business process modeling and verification, cloud computing, coalition formation, decision support systems, distributed optimization and constraint satisfaction, gesture recognition, intelligent energy management in WSNs, intelligent logistics, machine learning, mobile agents, parallel and distributed computational intelligence, parallel evolutionary computing, trust metrics and security, scheduling in distributed heterogenous computing environments, semantic Web service composition, social simulation, and software agents for WSNs.

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2-IDT Double-Mode SAW Filters with Decreased Insertion Loss and Advanced Functionalities

2-IDT Double-Mode SAW Filters with Decreased Insertion Loss ...

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5th Joint Conference of the 65th ieee International Frequency Control symposium / 25th European Frequency and Time Forum

作者： Doberstein, S. A. Omsk Res Inst Commun & Elect ONIIP Omsk Russia

ISBN: (纸本)9781612841106

this paper presents new 2-IDT double-mode SAW (DMS) filters with the decreased insertion loss and advanced functionalities: low input and output impedances, balanced operation and impedance conversion on 42 degrees YX LiTaO3, 64 degrees YX and 41 degrees YX LiNbO3. To decrease the input and output impedances and resistive losses of the IDT electrodes the parallel connection of the 2-IDT DMS filters in the different acoustic tracks is used simultaneously reducing the aperture of each track. For an impedance conversion a series connection of the output IDTs in the 2 parallel acoustic tracks of the filters is used. To increase the selectivity of the filters the cascaded connection and phase weighting are employed. the constructional and topological optimization of the SAW filters is provided with a computer simulation using an equivalent circuit model. the 240-367 MHz samples of the balanced SAW filters have shown an insertion loss of about 1 dB, stopband attenuation of about 20 dB, impedance conversion from 50-75 Omega at the input to 200-300 Omega at the output in a wide fractional bandwidth of 2-6%. Two cascaded filter has provided an insertion loss of less than 2 dB and stopband attenuation of about 50 dB. the filters are housed in the 5x5x1.35 mm SMD packages.

关键词： 2-IDT DMS filter 2-IDT double-mode SAW filter Attenuation Bandwidth Frequency measurement Frequency response IDT electrode Impedance Insertion loss LiNbO3 LiTaO3 Resonator filters UHF filters VHF filters acoustic impedance band-stop filters equivalent circuit model equivalent circuits frequency 240 MHz to 367 MHz impedance conversion input impedance insertion loss interdigital transducers lithium compounds optimisation optimization output impedance parallel acoustic tracks resistive loss stopband attenuation surface acoustic wave filters

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High Performance I/O

High Performance I/O

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19th International Euromicro Conference on parallel, distributed and Network-Based processing (PDP)

作者： Jackson, Adrian Reid, Fiona Hein, Joachim Soba, Alejandro Saez, Xavier Univ Edinburgh EPCC Edinburgh Midlothian Scotland BSC Comp Applicat Sci & Engn Barcelona 08034 Spain

ISBN: (纸本)9780769543284

parallelisation, serial optimisation, compiler tuning, and many more techniques are used to optimise and improve the performance scaling of parallel programs. One area which is frequently not optimised is file I/O. this is because it is often not considered to be key to the performance of a program and also because it is traditionally difficult to optimise and very machine specific. However, in the current era of Peta-and Exascale computing it is no longer possible to ignore I/O performance as it can significantly limit the scaling of many codes when executing on very large numbers of processors or cores. Furthermore, as producing data is the main purpose of most simulation codes any work that can be undertaken to provide improved performance of I/O can be applicable to a very large range of simulation codes, and provide them with improved functionality (i.e. the ability to produce more data). this paper describes some of the issues surrounding I/O, the technology that is commonly deployed to provide I/O on HPC machines and the software libraries available to programmers to undertake I/O. the performance of all these aspects of I/O on a range of HPC systems were investigated by the authors and are presented in this paper to motivate the discussions in the paper.

关键词： component: I/O HPC optimisation parallelisation Lustre GPFS MPI-I/O HDF5 NetCDF

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Amplifying matrix design for distributed noncooperative SIMO wireless relay networks under jamming environment

Amplifying matrix design for distributed noncooperative SIMO...

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Asia Modelling symposium 2011: 5th Asia International Conference on Mathematical Modelling and Computer Simulation, AMS 2011

作者： Wang, Zuojun Kwon, Hyuck M. Ding, Yanwu Lee, Kanghee Ibdah, Yazan Department of Electrical Engineering and Computer Science Wichita State University Wichita KS 67260 United States

ISBN: (纸本)9780769544144

the main contribution of this paper is the derivation of an optimal diagonal amplifying relay matrix. this matrix is for a non cooperative distributed wireless relay network in a jamming environment. Minimum mean square error (MMSE) criterion was used in this study. Jamming location was also studied in this paper. Results show that diversity of a system can be degraded or even get lost depending on jamming location. A single-input multiple-output (SIMO) system strategy was implemented, using one-source, M-destination and N-relay nodes. System performance for the new derived matrix was evaluated using bit error rate (BER). Also, performance comparisons with/without jamming were a focus in our study. © 2011 ieee.

关键词： Mean square error

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Effects of node geometry on noncooperative distributed SIMO wireless relay networks

Effects of node geometry on noncooperative distributed SIMO ...

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Asia Modelling symposium 2011: 5th Asia International Conference on Mathematical Modelling and Computer Simulation, AMS 2011

作者： Lee, Kanghee Kwon, Hyuck M. Ding, Yanwu Ibdah, Yazan Wang, Zuojun Department of Electrical Engineering and Computer Science Wichita State University Wichita KS 67260 United States

ISBN: (纸本)9780769544144

In practice, in any wireless network where 1-source, N-relays and M-destinations exist, each relay node will most likely have different separations with the source and any destination. therefore, relay node geometry effect in a single-input multiple-output (SIMO) system was studied in this paper. the main contribution of this paper is the derivation of an optimal diagonal amplifying relay matrix under node geometry effect. this matrix is designed for a non cooperative distributed wireless relay network. the effect of node geometry in wireless relay networks was studied. the new derived matrix was evaluated using bit error rate (BER). Also, performance comparisons with/without no node geometry were a focus in our study. © 2011 ieee.

关键词： Mean square error

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