The proceedings contain 64 papers from the acm/sigda Thirteenth acminternationalsymposium on fieldprogrammablegatearrays - FPGA 2005. The topics discussed include: the Stratix II logic and routing architecture;sk...
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The proceedings contain 64 papers from the acm/sigda Thirteenth acminternationalsymposium on fieldprogrammablegatearrays - FPGA 2005. The topics discussed include: the Stratix II logic and routing architecture;skew-programmable clock design for FPGA and skew-aware placement;sparse matrix-vector multiplication on FPGAs;power modeling and architecture evaluation for FPGA with novel circuits for VDD programmability;architecture adaptive routability-driven placement for FPGAs;energy-efficient FPGA interconnect architecture design;3D-Softchip: A novel 3D vertically integrated adaptive computing system;dynamic reconfiguration in FPGA-based SoC designs;and rapid prototyping of a test harness for forward error correcting codes.
The proceedings contain 22 papers. The topics discussed include: embedded floating-point units in FPGAs;measuring the gap between FPGAs and ASICs;optimality study of logic synthesis for LUT-based FPGAs;improvements to...
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ISBN:
(纸本)1595932925
The proceedings contain 22 papers. The topics discussed include: embedded floating-point units in FPGAs;measuring the gap between FPGAs and ASICs;optimality study of logic synthesis for LUT-based FPGAs;improvements to technology mapping for LUT-based FPGAs;improving performance and robustness of domain-specific CPLDs;design, implementation, and verification of active cache emulator (ACE);modeling and data-dependent performance of pattern-matching architectures;yield enhancements of design-specific FPGAs;FGPA clock network architecture: flexibility vs. area and power;a reconfigurable hardware based embedded scheduler for buffered crossbar switches;and combining module selection and resource sharing for efficient FPGA pipeline synthesis.
The proceddings contains 24 papers from international syposium on fieldprogrammablegatearrays. Some of the topics discussed include: timing driven placement for hierarchical programmable logic devices;performance d...
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The proceddings contains 24 papers from international syposium on fieldprogrammablegatearrays. Some of the topics discussed include: timing driven placement for hierarchical programmable logic devices;performance driven mapping for CPLD architectures;detailed routing arhitectures for embeembedded programmable logic IP cores;Microprocessor and applification specific integrated circuits;the effect of reconfigurable units in superscalar processors;run-time defect tolerance using Jbits;fpga implementation of a novel, fast motin estimation algorithm for real video compression.
The proceedings contain 26 papers. The topics discussed include: are we alone? searching for ET with FPGAs;tensor slices to the rescue: supercharging ML acceleration on FPGAs;global is the new local: FPGA architecture...
ISBN:
(纸本)9781450382182
The proceedings contain 26 papers. The topics discussed include: are we alone? searching for ET with FPGAs;tensor slices to the rescue: supercharging ML acceleration on FPGAs;global is the new local: FPGA architecture at 5nm and beyond;Stratix 10 NX architecture and applications;ThunderGP: HLS-based graph processing framework on FPGAs;AutoBridge: coupling coarse-grained floorplanning and pipelining for high-frequency HLS design on multi-die FPGAs;AutoSA: a polyhedral compiler for high-performance systolic arrays on FPGA;demystifying the memory system of modern datacenter FPGAs for software programmers through microbenchmarking;PRGA: an open-source FPGA research and prototyping framework;and PRGA: An open-source FPGA research and prototyping framework.
The proceedings contain 24 papers. The topics discussed include: designing with extreme parallelism;high-quality, deterministic parallel placement for FPGAs on commodity hardware;enforcing long-path timing closure for...
ISBN:
(纸本)9781595939340
The proceedings contain 24 papers. The topics discussed include: designing with extreme parallelism;high-quality, deterministic parallel placement for FPGAs on commodity hardware;enforcing long-path timing closure for FPGA routing with path searches on clamped lexicographic spirals;mapping for better than worst-case delays in LUT-based FPGA designs;a complexity-effective architecture for accelerating full-system multiprocessor simulations using FPGAs;efficient ASIP design for configurable processors with fine-grained resource sharing;pattern-based behavior synthesis for FPGA resource reduction;modeling routing demand for early-stage FPGA architecture development;and trace-based framework for concurrent development of process and FPGA architecture considering process variation and reliability.
The proceedings contain 35 papers. The topics discussed include: using source-level transformations to improve high-level synthesis debug and validation on fpgas;high-level design tools for floating point FPGAs;softwa...
ISBN:
(纸本)9781450333153
The proceedings contain 35 papers. The topics discussed include: using source-level transformations to improve high-level synthesis debug and validation on fpgas;high-level design tools for floating point FPGAs;software-driven hardware development;InTime: a machine learning approach for efficient selection of FPGA CAD tool parameters;enhancing hardware design flows with MyHDL;rapid prototyping of wireless physical layer modules using flexible software/hardware design flow;application of specific delay window routing for timing optimization in FPGA designs;application of specific delay window routing for timing optimization in FPGA designs;fine-grained interconnect synthesis;delay-bounded routing for shadow registers;EURECA: on-chip configuration generation for effective dynamic data access;energy-efficient discrete signal processing with fieldprogrammable analog arrays (FPAAs);expanding OpenFlow capabilities with virtualized reconfigurable hardware.
The proceedings contain 33 papers. The topics discussed include: flexible communication avoiding matrix multiplication on FPGA with high-level synthesis;maximizing the serviceability of partially reconfigurable FPGA s...
ISBN:
(纸本)9781450370998
The proceedings contain 33 papers. The topics discussed include: flexible communication avoiding matrix multiplication on FPGA with high-level synthesis;maximizing the serviceability of partially reconfigurable FPGA systems in multi-tenant environment;fingerprinting cloud FPGA infrastructures;massively simulating adiabatic bifurcations with FPGA to solve combinatorial optimization;high-performance FPGA network switch architecture;using OPENCL to enable software-like development of an FPGA-accelerated biophotonic cancer treatment simulator;energy-efficient 360-degree video rendering on FPGA via algorithm-architecture co-design;real-time spatial 3D audio synthesis on FPGAS for blind sailing;when massive GPU parallelism ain't enough: a novel hardware architecture of 2D-LSTM neural network;and light-OPU: an FPGA-based overlay processor for lightweight convolutional neural networks.
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