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检索条件"任意字段=Proceedings of the ACM SIGPLAN 1991 conference on Programming language design and implementation"

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The design and implementation of HoME 92

The design and implementation of HoME

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proceedings of the acm sigplan 1992 conference on programming language design and implementation

作者： Kazuhiro Ogata Satoshi Kurihara Mikio Inari Norihisa Doi

ISBN: (纸本)9780897914758

HoME is a version of Smalltalk which can be efficiently executed on a multiprocessor and can be executed in parallel by combining a Smalltalk process with a Mach thread and executing the process on the thread. HoME is nearly the same as ordinary Smalltalk except that multiple processes may execute in parallel. Thus, almost all applications running on ordinary Smalltalk can be executed on HoME without changes in their *** was designed and implemented based on the following fundamental policies: (1) theoretically, an infinite number of processes can become active; (2) the moment a process is scheduled, it becomes active; (3) no process switching occurs; (4) HoME is equivalent to ordinary Smalltalk except for the previous three *** performance of the current implementation of HoME running on OMRON LUNA-88K, which had four processors, was measured by benchmarks which execute in parallel with multiple processes. In all benchmarks, the results showed that HoME's performance is much better than HPS on the same workstation.

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Devil: An IDL for hardware programming 4

Devil: An IDL for hardware programming

引用

4th conference on Symposium on Operating System design and implementation, OSDI 2000

作者： Mérillon, Fabrice Réveillére, Laurent Consel, Charles Marlet, Renaud Muller, Gilles Compose Group IRISA INRIA University of Rennes I Campus Universitaire de Beaulieu Rennes CedexF-35042 France LaBRI ENSERB 351 cours de la Libération Talence CedexF-33405 France Trusted Logic 5 rue du Bailliage VersaillesF-78000 France

To keep up with the frantic pace at which devices come out, drivers need to be quickly developed, debugged and tested. Although a driver is a critical system component, the driver development process has made little (if any) progress. The situation is particularly disastrous when considering the hardware operating code (i.e., the layer interacting with the device). Writing this code often relies on inaccurate or incomplete device documentation and involves assembly-level operations. As a result, hardware operating code is tedious to write, prone to errors, and hard to debug and maintain. This paper presents a new approach to developing hardware operating code based on an Interface Definition language (IDL) for hardware functionalities, named Devil. This IDL allows a high-level definition of the communication with a device. A compiler automatically checks the consistency of a Devil definition and generates efficient low-level code. Because the Devil compiler checks safety critical properties, the long-awaited notion of robustness for hardware operating code is made possible. Finally, the wide variety of devices that we have already specified (mouse, sound, DMA, interrupt, Ethernet, video, and IDE disk controllers) demonstrates the expressiveness of the Devil language.

关键词： Program compilers

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LLVM Compiler implementation for explicit parallelization and SIMD vectorization 4

LLVM Compiler implementation for explicit parallelization an...

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4th Workshop on the LLVM Compiler Infrastructure in HPC, LLVM-HPC 2017 - Held in conjunction with the International conference for High Performance Computing, Networking, Storage and Analysis, SC 2017

作者： Tian, Xinmin Saito, Hideki Su, Ernesto Lin, Jin Guggilla, Satish Caballero, Diego Masten, Matt Savonichev, Andrew Rice, Michael Demikhovsky, Elena Zaks, Ayal Rapaport, Gil Gaba, Abhinav Porpodas, Vasileios Garcia, Eric Intel Corporation 3600 Juliette Lane Santa ClaraCA95054 United States

ISBN: (纸本)9781450355650

With advances of modern multi-core processors and accelerators, many modern applications are increasingly turning to compilerassisted parallel and vector programming models such as OpenMP, OpenCL, Halide, Python and TensorFlow. It is crucial to ensure that LLVM-based compilers can optimize parallel and vector code as effectively as possible. In this paper, we first present a set of updated LLVM IR extensions for explicitly parallel, vector, and offloading program constructs in the context of C/C++/OpenCL. Secondly, we describe our LLVM design and implementation for advanced features in OpenMP such as parallel loop reduction, task and taskloop, SIMD loop and functions, and we discuss the impact of our updated implementation on existing LLVM optimization passes. Finally, we present a re-use case of our infrastructure to enable explicit parallelization and vectorization extensions in our OpenCL compiler to achieve ~35x performance speedup for a wellknown autonomous driving workload on a multi-core platform configured with Intel(r) Xeon(r) Scalable Processors. © 2017 Association for Computing Machinery.

关键词： C++ (programming language)

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CDuce: an XML-centric general-purpose language 03

CDuce: an XML-centric general-purpose language

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proceedings of the eighth acm sigplan international conference on Functional programming

作者： Véronique Benzaken Giuseppe Castagna Alain Frisch Université Paris-Sud Orsay France CNRS Département d'Informatique Paris France

ISBN: (纸本)9781581137569

We present the functional language CDuce, discuss some design issues, and show its adequacy for working with XML documents. Distinctive features of CDuce are a powerful pattern matching, first class functions, overloaded functions, a very rich type system (arrows, sequences, pairs, records, intersections, unions, differences), precise type inference for patterns and error localization, and a natural interpretation of types as sets of values. We also outline some important implementation issues; in particular, a dispatch algorithm that demonstrates how static type information can be used to obtain very efficient compilation schemas..

关键词： type systems XML CDuce XML-processing

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design and implementation of a database design aid using VP-Expert

Design and implementation of a database design aid using VP-...

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proceedings of the IEEE/acm International conference on Developing and Managing Expert System Programs

作者： I.-Y. Song S.D. Strum C. Medsker College of Information Studies Drexel University Philadelphia PA USA

The design and implementation of a database modeling aid called Database designer (DBD) using VP-Expert are discussed. The DBD expert system is intended to help novice users design a proper database by asking questions of the user and thus incrementally building a structure for an extended entity relationship (ER) diagram. The authors discuss their approach to system design for DBD and implementation issues specific to VP-Expert, such as combining backward chaining and forward chaining, procedural techniques, and transparency and visibility of VP-Expert statements. This study indicates that applying a systematic, structural approach, properly commenting the code, and logically grouping rules can make an expert system programming approach viable for designing a complex procedural design application like DBD.< >

关键词： Databases Power system modeling Expert systems Erbium Application software Flowcharts Educational institutions Buildings programming profession Logic programming

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Functional parallel algorithms 10

Functional parallel algorithms

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proceedings of the 15th acm sigplan international conference on Functional programming

作者： Guy E. Blelloch Carnegie Mellon University Pittsburgh PA USA

ISBN: (纸本)9781605587943

Functional programming presents several important advantages in the design, analysis and implementation of parallel algorithms: It discourages iteration and encourages *** supports persistence and hence easy *** encourages higher-order aggregate *** is well suited for defining cost models tied to the programming language rather than the *** can avoid false *** can use cheaper weak consistency *** most importantly, it supports safe deterministic *** fact functional programming supports a level of abstraction in which parallel algorithms are often as easy to design and analyze as sequential algorithms. The recent widespread advent of parallel machines therefore presents a great opportunity for functional programming languages. However, any changes will require significant education at all levels and involvement of the functional programming *** this talk I will discuss an approach to designing and analyzing parallel algorithms in a strict functional and fully deterministic setting. Key ideas include a cost model defined in term of analyzing work and span, the use of divide-and-conquer and contraction, the need for arrays (immutable) to achieve asymptotic efficiency, and the power of (deterministic) randomized algorithms. These are all ideas I believe can be taught at any level.

关键词： parallel algorithms functional programming

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The design, implementation, and evaluation of a compiler algorithm for CPU energy reduction 03

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proceedings of the acm sigplan 2003 conference on programming language design and implementation

作者： Chung-Hsing Hsu Ulrich Kremer Rutgers The State University of New Jersey

ISBN: (纸本)9781581136623

This paper presents the design and implementation of a compiler algorithm that effectively optimizes programs for energy usage using dynamic voltage scaling (DVS). The algorithm identifies program regions where the CPU can be slowed down with negligible performance loss. It is implemented as a source-to-source level transformation using the SUIF2 compiler infrastructure. Physical measurements on a high-performance laptop show that total system (i.e., laptop) energy savings of up to 28% can be achieved with performance degradation of less than 5% for the SPECfp95 benchmarks. On average, the system energy and energy-delay product are reduced by 11% and 9%, respectively, with a performance slowdown of 2%. It was also discovered that the energy usage of the programs using our DVS algorithm is within 6% from the theoretical lower bound. To the best of our knowledge, this is one of the first work that evaluates DVS algorithms by physical measurements.

关键词： energy savings dynamic voltage scaling

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GUM: a portable parallel implementation of Haskell 96

GUM: a portable parallel implementation of Haskell

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proceedings of the acm sigplan 1996 conference on programming language design and implementation

作者： P. W. Trinder K. Hammond J. S. Mattson A. S. Partridge S. L. Peyton Jones Department of Computing Science Glasgow University Hewlett-Packard California Language Laboratory and Department of Computing Science Glasgow University Department of Computer Science University of Tasmania and Department of Computing Science Glasgow University

ISBN: (纸本)9780897917957

GUM is a portable, parallel implementation of the Haskell functional language. Despite sustained research interest in parallel functional programming, GUM is one of the first such systems to be made publicly *** is message-based, and portability is facilitated by using the PVM communications harness that is available on many multi-processors. As a result, GUM is available for both shared-memory (Sun SPARCserver multiprocessors) and distributed-memory (networks of workstations) architectures. The high message-latency of distributed machines is ameliorated by sending messages asynchronously, and by sending large packets of related data in each *** performance figures demonstrate absolute speedups relative to the best sequential compiler technology. To improve the performance of a parallel Haskell program GUM provides tools for monitoring and visualising the behaviour of threads and of processors during execution.

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Executable computational logics: combining formal methods and programming language based system design 03

Executable computational logics: combining formal methods an...

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acm and IEEE International conference on Formal Methods and Models for Co-design (MEMOCODE)

作者： J. Meseguer Computer Science Department University of Illinois Urbana-Champaign Urbana-Champaign IL USA

ISBN: (纸本)9780769519234

An executable computational logic can provide the desired bridge between formal system properties and formal methods to verify them on the one hand, and executable models of system designs based on programming languages on the other. However, not all such logics are equally well suited for the task. This paper gives some requirements that seem important for a computational logic to be suitable in practice, and discusses the experience with rewriting logic, its Maude language implementation, and its formal tool environment, concluding that they seem to meet well those requirements.

关键词： Logic design Logic programming Computer languages Convergence Bridges Hardware Military computing Mathematical model Mathematics Computer science

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An algorithm to support code-skeleton generation for concurrent systems 4

An algorithm to support code-skeleton generation for concurr...

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4th International Workshop on Real-Time Ada Issues, IRTAW 1990

作者： Penedo, Maria Heloisa Berry, Daniel M. Estrin, Gerald Computer Science Department University of California Los Angeles United States

ISBN: (纸本)0897911466

Computers are increasingly being used in engineering systems which could utilize a multiplicity of processors. Computer aided design methods are needed to support the design of inherently complex concurrent software. UCLA's SARA (System ARchitects Apprentice) is a design environment which provides computer aid to both hardware and software design of concurrent systems. This paper focusses on an improved capability to aid software design. This capability is provided by defining a Module Interface Description (MID), which allows designers to deal with the structure of code, and effecting a mapping between SARA models and MID-models. It then becomes clear how to create a tool to accept these descriptions and perform various checks on the consistency and completeness of the modeling and implementation descriptions. The addition of this capability reduces the gap between the modeling and realization of systems by providing for automatic generation of code skeletons. © 1981 IEEE Computer Society. All rights reserved.

关键词： Computer aided design

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