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Automatic inversion generates divide-and-conquer parallel programs

acm sigplan NOTICES 2007年第6期42卷 146-155页

作者： Morita, Kazutaka Morihata, Akimasa Matsuzaki, Kiminori Hu, Zhenjiang Takeichi, Masato Univ Tokyo Grad Sch Informat Sci & Technol Tokyo Japan

Divide-and-conquer algorithms are suitable for modern parallel machines, tending to have large amounts of inherent parallelism and working well with caches and deep memory hierarchies. Among others, list homomorphisms are a class of recursive functions on lists, which match very well with the divide-and-conquer paradigm. However, direct programming with list homomorphisms is a challenge for many programmers. In this paper, we propose and implement a novel system that can automatically derive cost-optimal list homomorphisms from a pair of sequential programs, based on the third homomorphism theorem. Our idea is to reduce extraction of list homomorphisms to derivation of weak right inverses. We show that a weak right inverse always exists and can be automatically generated from a wide class of sequential programs. We demonstrate our system with several nontrivial examples, including the maximum prefix sum problem, the prefix sum computation, the maximum segment sum problem, and the line-of-sight problem. The experimental results show practical efficiency of our automatic parallelization algorithm and good speedups of the generated parallel programs.

关键词： algorithms design languages divide-and-conquer parallelism inversion program transformation third homomorphism theorem

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Valgrind: A framework for heavyweight dynamic binary instrumentation

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acm sigplan NOTICES 2007年第6期42卷 89-100页

作者： Nethercote, Nicholas Seward, Julian Natl ICT Australia Melbourne Vic Australia OpenWorks LLP Cambridge England

Dynamic binary instrumentation (DBI) frameworks make it easy to build dynamic binary analysis (DBA) tools such as checkers and profilers. Much of the focus on DBI frameworks has been on performance;little attention has been paid to their capabilities. As a result, we believe the potential of DBI has not been fully exploited. In this paper we describe Valgrind, a DBI framework designed for building heavyweight DBA tools. We focus on its unique support for shadow values - a powerful but previously little-studied and difficult-to-implement DBA technique, which requires a tool to shadow every register and memory value with another value that describes it. This support accounts for several crucial design features that distinguish Valgrind from other DBI frameworks. Because of these features, lightweight tools built with Valgrind run comparatively slowly, but Valgrind can be used to build more interesting, heavyweight tools that are difficult or impossible to build with other DBI frameworks such as Pin and DynamoRIO.

关键词： design performance experimentation Valgrind Memcheck dynamic binary instrumentation dynamic binary analysis shadow values

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P: Safe Asynchronous Event-Driven programming 13

P: Safe Asynchronous Event-Driven Programming

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acm sigplan conference on programming language design and implementation

作者： Ankush Desai Vivek Gupta Ethan Jackson Shaz Qadeer Sriram Rajamani Damien Zufferey Microsoft IST Austria

ISBN: (纸本)9781450320146

We describe the design and implementation of P, a domain-specific language to write asynchronous event driven code. P allows the programmer to specify the system as a collection of interacting state machines, which communicate with each other using events. P unifies modeling and programming into one activity for the programmer. Not only can a P program be compiled into executable code, but it can also be tested using model checking techniques. P allows the programmer to specify the environment, used to "close" the system during testing, as nondeterministic ghost machines. Ghost machines are erased during compilation to executable code; a type system ensures that the erasure is semantics preserving. The P language is designed so that a P program can be checked for responsiveness-the ability to handle every event in a timely manner. By default, a machine needs to handle every event that arrives in every state. But handling every event in every state is impractical. The language provides a notion of deferred events where the programmer can annotate when she wants to delay processing an event. The default safety checker looks for presence of unhandled events. The language also provides default liveness checks that an event cannot be potentially deferred forever. P was used to implement and verify the core of the USB device driver stack that ships with Microsoft Windows 8. The resulting driver is more reliable and performs better than its prior incarnation (which did not use P); we have more confidence in the robustness of its design due to the language abstractions and verification provided by P.

关键词： Domain-specific language Device driver Event-driven programming State machine Verification Systematic testing state machines Computer personnel event-driven programming Verification device drivers Phosphorus Executable code Device Programmer Component application-specific language language Microsoft Windows(software)

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Elevate embedded real-time programming with a synchronous language 17

Elevate embedded real-time programming with a synchronous la...

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15th acm-IEEE International conference on Formal Methods and Models for System design (MEMOCODE)

作者： Grosch, Franz-Josef Robert Bosch GmbH Gerlingen Germany

ISBN: (纸本)9781450350938

Product development at companies such as Bosch requires systems engineering for digital hardware and mechatronic components as well as software engineering for resource-constrained real-time applications cooperating with distributed server applications. While many of the involved engineering disciplines greatly benefit from model-based approaches and from advances in software infrastructures, deeply embedded software still is written in C since the seventies and runs on platforms designed in the nineties (e.g. OSEK). Simulation tools like Simulink or Modelica are used to test discrete code against continuous plant models or to generate code for certain aspects, but they do not really provide modern implementation technologies to address software architecture and qualities or to make embedded programming "attractive" for software *** regard synchronous languages as suitable to solve many of the issues in the integration (causality) and synchronisation (clocks) of time-triggered and event-triggered embedded functions that exhibit their behaviour over time steps and are coordinated according to their mode-switching in a structured synchronous control flow. Searching for an imperative synchronous language (with deterministic concurrent composition, and synchronous control flow), equipped with features for encapsulation and composition (objects, packages, separate compilation) and supporting programming parallel tasks deployed to separate cores (clock refinement and deterministic inter-task communication), we ended up in designing our own language, suitable for resource-constrained, real-time applications running on multi-core *** will explain the main requirements and features of this language, how they integrate with the principles of a synchronous language, how they can be applied to typical everyday problems in embedded development, and how such locally synchronous services may integrate in a globally asynchronous service architecture.

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The exo VM system for automatic VM and application reduction

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acm sigplan NOTICES 2007年第6期42卷 352-362页

作者： Titzer, Ben L. Auerbach, Joshua Bacon, David F. Palsberg, Jens Univ Calif Los Angeles Compilers Grp Los Angeles CA 90025 USA

Embedded systems pose unique challenges to Java application developers and virtual machine designers. Chief among these challenges is the memory footprint of both the virtual machine and the applications that run within it. With the rapidly increasing set of features provided by the Java language, virtual machine designers are often forced to build custom implementations that make various tradeoffs between the footprint of the virtual machine and the subset of the Java language and class libraries that are supported. In this paper, we present the Exo VM, a system in which an application is initialized in a fully featured virtual machine, and then the code, data, and virtual machine features necessary to execute it are packaged into a binary image. Key to this process is feature analysis, a technique for computing the reachable code and data of a Java program and its implementation inside the VM simultaneously. The Exo VM reduces the need to develop customized embedded virtual machines by reusing a single VM infrastructure and automatically eliding the implementation of unused Java features on a per-program basis. We present a constraint-based instantiation of the analysis technique, an implementation in IBM's J9 Java VM, experiments evaluating our technique for the EEMBC benchmark suite, and some discussion of the individual costs of some of Java's features. Our evaluation shows that our system can reduce the non-heap memory allocation of the virtual machine by as much as 75%. We discuss VM and language design decisions that our work shows are important in targeting embedded systems, supporting the long-term goal of a common VM infrastructure spanning from motes to large servers.

关键词： pre-initialization embedded systems persistence dead code elimination static compilation static analysis VM design VM modularity feature analysis

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Making design patterns explicit in FACE: A framework adaptive composition environment 6th

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6th European Software Engineering conference Held Jointly with 5th acm SIGSOFT Symposium on the Foundations of Software Engineering, ESEC/FSE 1997

作者： Meijler, Theo Dirk Demeyer, Serge Engel, Robert Baan Labs Groot Zonneoord PO Box 250 EdeNL-6710 BG Netherlands Software Composition Group University of Berne Neubrückstrasse 10 BerneCH-3012 Switzerland Washington University Computer Science Department Campus Box 1045 St. LouisMO63130 United States

ISBN: (纸本)3540635319

Tools incorporating design patterns combine the advantage of having a high-abstraction level of describing a system and the possibility of coupling these abstractions to some underlying implementation. Still, all current tools are based on generating source code in which the design patterns become implicit. After that, further extension and adaptation of the software is needed but this can no longer be supported at the same level of abstraction. This paper presents FACE, an environment based on an explicit representation of design patterns, sustaining an incremental development style without abandoning the higher-level design pattern abstraction. A visual composition tool for FACE has been developed in the Self programming language. © Springer-Verlag Berlin Heidelberg 1997.

关键词： Visual languages

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An Exploration Methodology for a Customizable OpenCL Stereo-Matching Application Targeted to an Industrial Multi-Cluster Architecture 12

An Exploration Methodology for a Customizable OpenCL Stereo-...

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10th acm International conference on Hardware/Software-Codesign and System Synthesis

作者： Paone, Edoardo Palermo, Gianluca Zaccaria, Vittorio Silvano, Cristina Melpignano, Diego Haugou, Germain Lepley, Thierry Politecn Milan Dipartimento Elettron & Informaz I-20133 Milan Italy STMicroelectronics Grenoble France

ISBN: (纸本)9781450314268

Open Computing language (OpenCL) is emerging as a standard for parallel programming of heterogeneous hardware accelerators. With respect to device specific languages, OpenCL enables application portability but does not guarantee performance portability, eventually requiring additional tuning of the implementation to a specific platform or to unpredictable dynamic workloads. In this paper, we present a methodology to analyze the customization space of an OpenCL application in order to improve performance portability and to support dynamic adaptation. We formulate our case study by implementing an OpenCL image stereo-matching application (which computes the relative depth of objects from a pair of stereo images) customized to the STMicroelectronics Platform 2012 many-core computing fabric. In particular, we use design space exploration techniques to generate a set of operating points that represent specific configurations of the parameters allowing different trade-offs between performance and accuracy of the algorithm itself. These points give detailed knowledge about the interaction between the application parameters, the underlying architecture and the performance of the system;they could also be used by a run-time manager software layer to meet dynamic Quality-of-Service (QoS) constraints. To analyze the customization space, we use cycle-accurate simulations for the target architecture. Since the profiling phase of each configuration takes a long simulation time, we designed our methodology to reduce the overall number of simulations by exploiting some important features of the application parameters;our analysis also enables the identification of the parameters that could be explored on a high-level simulation model to reduce the simulation time. The resulting methodology is one order of magnitude more efficient than an exhaustive exploration and, given its randomized nature, it increases the probability to avoid sub-optimal trade-offs.

关键词： design Space Exploration OpenCL Runtime Monitoring

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Quantitative Network Monitoring with NetQRE 17

Quantitative Network Monitoring with NetQRE

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conference of the acm-Special-Interest-Group-on-Data-Communication (SIGCOMM)

作者： Yuan, Yifei Lin, Dong Mishra, Ankit Marwaha, Sajal Alur, Rajeev Loo, Boon Thau Univ Penn Philadelphia PA 19104 USA LinkedIn Inc Mountain View CA USA

ISBN: (纸本)9781450346535

In network management today, dynamic updates are required for traffic engineering and for timely response to security threats. Decisions for such updates are based on monitoring network traffic to compute numerical quantities based on a variety of network and application-level performance metrics. Today's state-of-the-art tools lack programming abstractions that capture application or session-layer semantics, and thus require network operators to specify and reason about complex state machines and interactions across layers. To address this limitation, we present the design and implementation of NetQRE, a high-level declarative toolkit that aims to simplify the specification and implementation of such quantitative network policies. NetQRE integrates regular-expression-like pattern matching at flow-level as well as application-level payloads with aggregation operations such as sum and average counts. We describe a compiler for NetQRE that automatically generates an efficient implementation with low memory footprint. Our evaluation results demonstrate that NetQRE allows natural specification of a wide range of quantitative network tasks ranging from detecting security attacks to enforcing application-layer network management policies. NetQRE results in high performance that is comparable with optimized manually-written low-level code and is significantly more efficient than alternative solutions, and can provide timely enforcement of network policies that require quantitative network monitoring.

关键词： NetQRE network monitoring language quantitative regular expression

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design and verification of real-time systems 2

Design and verification of real-time systems

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2nd International conference on Software Engineering, ICSE 1976

作者： Phillips, Jorge V. Bredt, Thomas H. Artificial Intelligence Laboratory Stanford University United States Digitai Systems Laboratory Stanford University Hewlett-Packard Company United States

This paper presents a methodology for the design and verification of a class of real-time systems frequently encountered in applications of digital control. These methodologies are described in the form of a design and informal verification of a system used for navigation control of airborne vehicles. The high reliability standards required for such tasks suggest the use of fault-tolerant hardware and software. A design is presented for both an abstract version of the system running in an ideal environment and for a version running in a non-ideal fault-prone one. A specification language for real-time systems is developed as an extension of the programming language PASCAL, that provides for concise and clear system descriptions while preserving the degree of efficiency and portability needed to qualify as a practical high-level system implementation language. An informal verification of both designs is given. © 1976 IEEE Computer Society. All rights reserved.

关键词： Real time systems

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proceedings of the International conference on APL, APL 1987

Proceedings of the International Conference on APL, APL 1987

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1987 International conference on APL, APL 1987

ISBN: (纸本)0897912268

The proceedings contain 65 papers. The topics discussed include: a three dimensional wire frame graphics system;on APL software for credibility theory;an object oriented extension to APL;system development methodology using LOGOS;control system development tools;techniques for extracting statistical data prom free-form text using APL;implementation of an APL-based spreadsheet manager;server networks communicating via inter-user shared variables;component file systems and the APL standard;APL2 implementations of unificatlon;managing APL public code for an in-house APL system (before and afterLOGOS);replicate each, anyone?;a full-screen front end for GRAPHPAK;FSM - a fullscreen manager;APL-to-ADA translator;screen management in the 'real world';why APL2: a discussion of design principles;an integrated microprogram development methodology based on APL;using the LOGOS programming environment a case history;solutions to logic problems in APL2;a second generation domino for statisticians;infinite loops and how to create them;a proposal for blocks and exits in APL;how graphics could be simplified in APL;recapturing the high ground use of APL in decision tree modelling;and investigation into the efficiency of using APL for the programming of an inference machine.

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