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38th acm sigplan conference on programming language design and implementation (PLDI)

作者： Feng, Yu Martins, Ruben Van Geffen, Jacob Dillig, Isil Chaudhuri, Swarat Univ Texas Austin Austin TX 78712 USA Rice Univ Houston TX 77251 USA

ISBN: (纸本)9781450349888

This paper presents a novel component-based synthesis algorithm that marries the power of type-directed search with lightweight SMT-based deduction and partial evaluation. Given a set of components together with their over-approximate first-order specifications, our method first generates a program sketch over a subset of the components and checks its feasibility using an SMT solver. Since a program sketch typically represents many concrete programs, the use of SMT-based deduction greatly increases the scalability of the algorithm. Once a feasible program sketch is found, our algorithm completes the sketch in a bottom-up fashion, using partial evaluation to further increase the power of deduction for rejecting partially-filled program sketches. We apply the proposed synthesis methodology for automating a large class of data preparation tasks that commonly arise in data science. We have evaluated our synthesis algorithm on dozens of data wrangling and consolidation tasks obtained from on-line forums, and we show that our approach can automatically solve a large class of problems encountered by R users.

关键词： Program synthesis programming by example data preparation Component-based synthesis SMT-based deduction

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The nesC language:: A holistic approach to networked embedded systems 03

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conference on programming language design and implementation

作者： Gay, D Levis, P von Behren, R Welsh, M Brewer, E Culler, D Univ Calif Berkeley EECS Dept Berkeley CA 94720 USA Intel Res Berkeley Berkeley CA 94704 USA

ISBN: (纸本)9781581136623

We present nesC, a programming language for networked embedded systems that represent a new design space for application developers. An example of a networked embedded system is a sensor network, which consists of (potentially) thousands of tiny, low-power "motes," each of which execute concurrent, reactive programs that must operate with severe memory and power constraints. nesC's contribution is to support the special needs of this domain by exposing a programming model that incorporates event-driven execution, a flexible concurrency model, and component-oriented application design. Restrictions on the programming model allow the nesC compiler to perform whole-program analyses, including data-race detection (which improves reliability) and aggressive function inlining (which reduces resource consumption). nesC has been used to implement TinyOS, a small operating system for sensor networks, as well as several significant sensor applications. nesC and TinyOS have been adopted by a large number of sensor network research groups, and our experience and evaluation of the language shows that it is effective at supporting the complex, concurrent programming style demanded by this new class of deeply networked systems.

关键词： programming languages C concurrency data races components modules first-order nesC TinyOS

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Effective sign extension elimination 02

Effective sign extension elimination

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conference on programming language design and implementation (PLDI 02)

作者： Kawahito, M Komatsu, H Nakatani, T IBM Tokyo Res Lab Kanagawa 2428502 Japan

ISBN: (纸本)9781581134636

Computer designs are shifting from 32-bit architectures to 64-bit architectures, while most of the programs available today are still designed for 32-bit architectures, Java(TM), for example, specifies the frequently used "int" as a 32-bit data type. If such Java programs are executed on a 64-bit architecture, many 32-bit values must be sign-extended to 64-bit values for integer operations. This causes serious performance overhead. In this paper, we present a fast and effective algorithm for eliminating sign extensions. We implemented this algorithm in the IBM Java Just-in-Time (JIT) compiler for IA-64(TM). Our experimental results show that our algorithm effectively eliminates the majority of sign extensions, They also show that it significantly improves performance, while it increases JIT compilation time by only 0.11%. We implemented our algorithm for programs in Java, but it can be applied to any language requiring sign extensions.

关键词： algorithms performance design experimentation sign extension 64-bit architectures Java JIT compilers IA-64

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Compiling Stan to Generative Probabilistic languages and Extension to Deep Probabilistic programming 2021

Compiling Stan to Generative Probabilistic Languages and Ext...

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42nd acm sigplan International conference on programming language design and implementation (PLDI)

作者： Baudart, Guillaume Burroni, Javier Hirzel, Martin Mandel, Louis Shinnar, Avraham PSL Univ Ecole Normale Super INRIA Paris Paris France UMass Amherst Amherst MA USA IBM Res MIT IBM Watson AI Lab Armonk NY USA

ISBN: (纸本)9781450383912

Stan is a probabilistic programming language that is popular in the statistics community, with a high-level syntax for expressing probabilistic models. Stan differs by nature from generative probabilistic programming languages like Church, Anglican, or Pyro. This paper presents a comprehensive compilation scheme to compile any Stan model to a generative language and proves its correctness. We use our compilation scheme to build two new backends for the Stanc3 compiler targeting Pyro and NumPyro. Experimental results show that the NumPyro backend yields a 2.3x speedup compared to Stan in geometric mean over 26 benchmarks. Building on Pyro we extend Stan with support for explicit variational inference guides and deep probabilistic models. That way, users familiar with Stan get access to new features without having to learn a fundamentally new language.

关键词： Probabilistic programming Semantics Stan Pyro

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The Essence of Bluespec A Core language for Rule-Based Hardware design 2020

The Essence of Bluespec A Core Language for Rule-Based Hardw...

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41st acm sigplan conference on programming language design and implementation (PLDI)

作者： Bourgeat, Thomas Pit-Claudel, Clement Chlipala, Adam Arvind MIT CSAIL 77 Massachusetts Ave Cambridge MA 02139 USA

ISBN: (纸本)9781450376136

The Bluespec hardware-description language presents a significantly higher-level view than hardware engineers are used to, exposing a simpler concurrency model that promotes formal proof, without compromising on performance of compiled circuits. Unfortunately, the cost model of Bluespec has been unclear, with performance details depending on a mix of user hints and opaque static analysis of potential concurrency conflicts within a design. In this paper we present Koika, a derivative of Bluespec that preserves its desirable properties and yet gives direct control over the scheduling decisions that determine performance. Koika has a novel and deterministic operational semantics that uses dynamic analysis to avoid concurrency anomalies. Our implementation includes Coq definitions of syntax, semantics, key metatheorems, and a verified compiler to circuits. We argue that most of the extra circuitry required for dynamic analysis can be eliminated by compile-time BSV-style static analysis.

关键词： HDL Semantics Compiler Correctness

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Defining the Undefinedness of C 15

Defining the Undefinedness of C

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36th acm sigplan conference on programming language design and implementation

作者： Hathhorn, Chris Ellison, Chucky Rosu, Grigore Univ Missouri Columbia MO 65211 USA Univ Illinois Urbana IL 61801 USA

ISBN: (纸本)9781450334686

We present a "negative" semantics of the C11 language-a semantics that does not just give meaning to correct programs, but also rejects undefined programs. We investigate undefined behavior in C and discuss the techniques and special considerations needed for formally specifying it. We have used these techniques to modify and extend a semantics of C into one that captures undefined behavior. The amount of semantic infrastructure and effort required to achieve this was unexpectedly high, in the end nearly doubling the size of the original semantics. From our semantics, we have automatically extracted an undefinedness checker, which we evaluate against other popular analysis tools, using our own test suite in addition to a third-party test suite. Our checker is capable of detecting examples of all 77 categories of core language undefinedness appearing in the C11 standard, more than any other tool we considered. Based on this evaluation, we argue that our work is the most comprehensive and complete semantic treatment of undefined behavior in C, and thus of the C language itself.

关键词： Undefined behavior programming language semantics C11 K Framework

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Jedd:: A BDD-based relational extension of Java

Jedd:: A BDD-based relational extension of Java

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conference on programming language design and implementation

作者： Lhoták, O Hendren, L McGill Univ Sch Comp Sci Sable Res Grp Montreal PQ Canada

In this paper we present Jedd, a language extension to Java that supports a convenient way of programming with Binary Decision Diagrams (BDDs). The Jedd language abstracts BDDs as database-style relations and operations on relations, and provides static type rules to ensure that relational operations are used correctly. The paper provides a description of the Jedd language and reports on the design and implementation of the Jedd translator and associated runtime system. Of particular interest is the approach to assigning attributes from the high-level relations to physical domains in the underlying BDDs, which is done by expressing the constraints as a SAT problem and using a modern SAT solver to compute the solution. Further, a runtime system is defined that handles memory management issues and supports a browsable profiling tool for tuning the key BDD operations. The motivation for designing Jedd was to support the development of whole program analyses based on BDDs, and we have used Jedd to express five key interrelated whole program analyses in our Soot compiler framework. We provide some examples of this application and discuss our experiences using Jedd.

关键词： binary decision diagrams relations language design Java program analysis Boolean formula satisfiability

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Associated Effects Flexible Abstractions for Effectful programming

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proceedings OF THE acm ON programming languageS-PacmPL 2024年第PLDI期8卷 394-416页

作者： Lutze, Matthew Madsen, Magnus Aarhus Univ Aarhus Denmark

We present associated effects, a programming language feature that enables type classes to abstract over the effects of their function signatures, allowing each type class instance to specify its concrete effects. Associated effects significantly increase the flexibility and expressive power of a programming language that combines a type and effect system with type classes. In particular, associated effects allow us to (i) abstract over total and partial functions, where partial functions may throw exceptions, (ii) abstract over immutable data structures and mutable data structures that have heap effects, and (iii) implement adaptors that combine type classes with algebraic effects. We implement associated effects as an extension of the Flix programming language and refactor the Flix Standard Library to use associated effects, significantly increasing its flexibility and expressive power. Specifically, we add associated effects to 11 type classes, which enables us to add 28 new type class instances.

关键词： effect systems associated effects associated types generic programming type classes type functions ad-hoc polymorphism

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First-class Runtime Generation of High-performance Types using Exotypes 14

First-class Runtime Generation of High-performance Types usi...

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35th acm sigplan conference on programming language design and implementation (PLDI)

作者： DeVito, Zachary Ritchie, Daniel Fisher, Matt Aiken, Alex Hanrahan, Pat Stanford Univ Stanford CA 94305 USA

ISBN: (纸本)9781450327848

We introduce exotypes, user-defined types that combine the flexibility of meta-object protocols in dynamically-typed languages with the performance control of low-level languages. Like objects in dynamic languages, exotypes are defined programmatically at runtime, allowing behavior based on external data such as a database schema. To achieve high performance, we use staged programming to define the behavior of an exotype during a runtime compilation step and implement exotypes in Terra, a low-level staged programming language. We show how exotype constructors compose, and use exotypes to implement high-performance libraries for serialization, dynamic assembly, automatic differentiation, and probabilistic programming. Each exotype achieves expressiveness similar to libraries written in dynamically-typed languages but implements optimizations that exceed the performance of existing libraries written in low-level statically-typed languages. Though each implementation is significantly shorter, our serialization library is 11 times faster than Kryo, and our dynamic assembler is 3-20 times faster than Google's Chrome assembler.

关键词： design Performance Lua Staged computation DSL

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Semantics Driven Hardware design, implementation, and Verification with ReWire 15

Semantics Driven Hardware Design, Implementation, and Verifi...

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acm sigplan/SIGBED conference on languages, Compilers and Tools for Embedded Systems (LCTES 15)

作者： Procter, Adam Harrison, William L. Graves, Ian Becchi, Michela Allwein, Gerard Univ Missouri Columbia MO 65211 USA US Naval Res Lab Stennis Space Ctr MS USA

ISBN: (纸本)9781450332576

There is no such thing as high assurance without high assurance hardware. High assurance hardware is essential, because any and all high assurance systems ultimately depend on hardware that conforms to, and does not undermine, critical system properties and invariants. And yet, high assurance hardware development is stymied by the conceptual gap between formal methods and hardware description languages used by engineers. This paper presents ReWire, a functional programming language providing a suitable foundation for formal verification of hardware designs, and a compiler for that language that translates high-level, semantics-driven designs directly into working hardware. ReWire's design and implementation are presented, along with a case study in the design of a secure multicore processor, demonstrating both ReWire's expressiveness as a programming language and its power as a framework for formal, high-level reasoning about hardware systems.

关键词： Formal verification

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