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Finding application errors and security flaws using PQL: a program query language

acm sigplan NOTICES 2005年第10期40卷 365-383页

作者： Martin, M Livshits, B Lam, MS Stanford Univ Dept Comp Sci Stanford CA 94305 USA

A number of effective error detection tools have been built in recent years to check if a program conforrns to certain design rules. An important class of design rules deals with sequences of events associated with a set of related objects. This paper presents a language called PQL (Program Query language) that allows programmers to express such questions easily in an application-specific context. A query looks like a code excerpt corresponding to the shortest amount of code that would violate a design rule. Details of the target application's precise implementation are abstracted away. The programmer may also specify actions to perform when a match is found, such as recording relevant information or even correcting an erroneous execution on the fly. We have developed both static and dynamic techniques to find solutions to PQL queries. Our static analyzer finds all potential matches conservatively using a context-sensitive, flow-insensitive, inclusion-based pointer alias analysis. Static results are also useful in reducing the number of instrumentation points for dynamic analysis. Our dynamic analyzer instruments the source program to catch all violations precisely as the program runs and to optionally perform user-specified actions. We have implemented the techniques described in this paper and found 206 errors in 6 large real-world open-source Java applications containing a total of nearly 60,000 classes. These errors are important security flaws, resource leaks, and violations of consistency invariants. The combination of static and dynamic analysis proves effective at addressing a wide range of debugging and program comprehension queries. We have found that dynamic analysis is especially suitable for preventing errors such as security vulnerabilities at runtime.

关键词： languages security reliability program traces pattern matching web applications SQL injection resource leaks bug finding

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Input Responsiveness: Using Canary Inputs to Dynamically Steer Approximation

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acm sigplan NOTICES 2016年第6期51卷 161-176页

作者： Laurenzano, Michael A. Hill, Parker Samadi, Mehrzad Mahlke, Scott Mars, Jason Tang, Lingjia Univ Michigan Dept Elect Engn & Comp Sci Ann Arbor MI 48109 USA

This paper introduces Input Responsive Approximation ( IRA), an approach that uses a canary input - a small program input carefully constructed to capture the intrinsic properties of the original input - to automatically control how program approximation is applied on an input-by-input basis. Motivating this approach is the observation that many of the prior techniques focusing on choosing how to approximate arrive at conservative decisions by discounting substantial differences between inputs when applying approximation. The main challenges in overcoming this limitation lie in making the choice of how to approximate both effectively (e.g., the fastest approximation that meets a particular accuracy target) and rapidly for every input. With IRA, each time the approximate program is run, a canary input is constructed and used dynamically to quickly test a spectrum of approximation alternatives. Based on these runtime tests, the approximation that best fits the desired accuracy constraints is selected and applied to the full input to produce an approximate result. We use IRA to select and parameterize mixes of four approximation techniques from the literature for a range of 13 image processing, machine learning, and data mining applications. Our results demonstrate that IRA significantly outperforms prior approaches, delivering an average of 10.2x speedup over exact execution while minimizing accuracy losses in program outputs.

关键词： Performance Runtime Systems Compilers Approximate Computing Performance Experimentation design

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Toward Compositional Verification of Interruptible OS Kernels and Device Drivers

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acm sigplan NOTICES 2016年第6期51卷 431-447页

作者： Chen, Hao Wu, Xiongnan (Newman) Shao, Zhong Lockerman, Joshua Gu, Ronghui Univ Elect Sci & Technol China UESTC Chengdu Peoples R China Yale Univ New Haven CT 06520 USA

An operating system (OS) kernel forms the lowest level of any system software stack. The correctness of the OS kernel is the basis for the correctness of the entire system. Recent efforts have demonstrated the feasibility of building formally verified general-purpose kernels, but it is unclear how to extend their work to verify the functional correctness of device drivers, due to the non-local effects of interrupts. In this paper, we present a novel compositional framework for building certified interruptible OS kernels with device drivers. We provide a general device model that can be instantiated with various hardware devices, and a realistic formal model of interrupts, which can be used to reason about interruptible code. We have realized this framework in the Coq proof assistant. To demonstrate the effectiveness of our new approach, we have successfully extended an existing verified non-interruptible kernel with our framework and turned it into an interruptible kernel with verified device drivers. To the best of our knowledge, this is the first verified interruptible operating system with device drivers.

关键词： Verification Reliability Security languages design Program Verification Certified OS Kernels Interrupts Device Drivers Abstraction Layer Modularity

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Riposte: A Trace-Driven Compiler and Parallel VM for Vector Code in R 12

Riposte: A Trace-Driven Compiler and Parallel VM for Vector ...

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21st International conference on Parallel Architectures and Compilation Techniques (PACT)

作者： Talbot, Justin DeVito, Zachary Hanrahan, Pat Stanford Univ Stanford CA 94305 USA

ISBN: (纸本)9781450311823

There is a growing utilization gap between modern hardware and modern programming languages for data analysis. Due to power and other constraints, recent processor design has sought improved performance through increased SIMD and multi-core parallelism. At the same time, high-level, dynamically typed languages for data analysis have become popular. These languages emphasize ease of use and high productivity, but have, in general, low performance and limited support for exploiting hardware parallelism. In this paper, we describe Riposte, a new runtime for the R language, which bridges this gap. Riposte uses tracing, a technique commonly used to accelerate scalar code, to dynamically discover and extract sequences of vector operations from arbitrary R code. Once extracted, we can fuse traces to eliminate unnecessary memory traffic, compile them to use hardware SIMD units, and schedule them to run across multiple cores, allowing us to fully utilize the available parallelism on modern shared-memory machines. Our evaluation shows that Riposte can run vector R code near the speed of hand-optimized C, 5-50x faster than the open source implementation of R, and can also linearly scale to 32 cores for some tasks. Across 12 different workloads we achieve an overall average speed-up of over 150x without explicit programmer parallelization.

关键词： R language just-in-time compilation tracing data parallel

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Optimization-based manufacturing scheduling with multiple resources and setup requirements

Optimization-based manufacturing scheduling with multiple re...

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conference on Intelligent Systems in design and Manufacturing

作者： Chen, D Luh, PB Thakur, LS Moreno, J Univ Connecticut Dept Elect & Syst Engn Storrs CT 06269 USA

ISBN: (纸本)0819429783

The increasing demand for on-time delivery and low price forces manufacturer to seek effective schedules Co improve coordination of multiple resources and to reduce product internal costs associated with labor, setup and inventory. This study describes the design and implementation of a scheduling system for J. M. Product Inc. whose manufacturing is characterized by the need to simultaneously consider machines and operators while an operator may attend several operations at the same time, and the presence of machines requiring significant setup times. The scheduling problem with these characteristics are typical for many manufacturers, very difficult to be handled, and have not been adequately addressed in the literature. In this study, both machine and operators are modeled as resources with finite capacities to obtain efficient coordination between them, and an operator's time can be shared by several operations at the same time to make full use of the operator. Setups are explicitly modeled following our previous work, with additional penalties on excessive setups to reduce setup costs and avoid possible scraps. An integer formulation with a separable structure is developed to maximize on-time delivery of products, low inventory and small number of setups. Within the Lagrangian relaxation framework, the problem is decomposed into individual subproblems that are effectively solved by using dynamic programming with additional penalties embedded in state transitions. Heuristics is then developed to obtain a feasible schedule following on our previous work with new mechanism to satisfy operator capacity constraints. The method has been implemented using the object-oriented programming language C++ with a user-friendly interface, and numerical testing shows that the method generates high quality schedules in a timely fashion. Through simultaneous consideration of machines and operators, machines and operators are well coordinated to facilitate the smooth flow of parts

关键词： scheduling multiple resources setups Lagrange relaxation dynamic programming

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BIGMAC II: A FORTRAN language augmentation tool 4

BIGMAC II: A FORTRAN language augmentation tool

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4th International Workshop on Real-Time Ada Issues, IRTAW 1990

作者： Myers, Eugene W. Osterweil, Leon J. Department of Computer Science University of Colorado BoulderCO80309 United States

ISBN: (纸本)0897911466

This paper describes the motivation, design, implementation, and some preliminary performance characteristics of BIGMAC II, a macro definition capability for creating language enhancers and translators. BIGMAC II enables the user to specify transformations through STREX, a FORTRAN-like language, which enables the specification of macros which are then used to interpretively alter incoming programs. BIGMAC II is specially adapted to the processing of FORTRAN programs. This paper shows how it can be used as a deprocedurizer (or flattener), a dialect-to-dialect translator, a portability and version control aid, and a device for creating language enhancements as sophisticated as new control structures and abstract data types. © 1981 IEEE Computer Society. All rights reserved.

关键词： FORTRAN (programming language)

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Fast RMWs for TSO: Semantics and implementation 13

Fast RMWs for TSO: Semantics and Implementation

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acm sigplan conference on programming language design and implementation

作者： Bharghava Rajaram Vijay Nagarajan Susmit Sarkar Marco Elver University of Edinburgh University of St Andrews

ISBN: (纸本)9781450320146

Read-Modify-Write (RMW) instructions are widely used as the building blocks of a variety of higher level synchronization constructs, including locks, barriers, and lock-free data structures. Unfortunately, they are expensive in architectures such as x86 and SPARC which enforce (variants of) Total-Store-Order (TSO). A key reason is that RMWs in these architectures are ordered like a memory barrier, incurring the cost of a write-buffer drain in the critical path. Such strong ordering semantics are dictated by the requirements of the strict atomicity definition (type-1) that existing TSO RMWs use. Programmers often do not need such strong semantics. Besides, weakening the atomicity definition of TSO RMWs, would also weaken their ordering - thereby leading to more efficient hardware implementations. In this paper we argue for TSO RMWs to use weaker atomicity definitions - we consider two weaker definitions: type-2 and type-3, with different relaxed ordering differences. We formally specify how such weaker RMWs would be ordered, and show that type-2 RMWs, in particular, can seamlessly replace existing type-1 RMWs in common synchronization idioms - except in situations where a type-1 RMW is used as a memory barrier. Recent work has shown that the new C/C++11 concurrency model can be realized by generating conventional (type-1) RMWs for C/C++11 SC-atomic-writes and/or SC-atomic-reads. We formally prove that this is equally valid using the proposed type-2 RMWs; type-3 RMWs, on the other hand, could be used for SC-atomic-reads (and optionally SC-atomic-writes). We further propose efficient microarchitectural implementations for type-2 (type-3) RMWs - simulation results show that our implementation reduces the cost of an RMW by up to 58.9% (64.3%), which translates into an overall performance improvement of up to 9.0% (9.2%) on a set of parallel programs, including those from the SPLASH-2, PARSEC, and STAMP benchmarks.

关键词： Read-Modify-Write (RMW) Total-Store-Order (TSO) Atomics design Performance Experimentation

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Modular interprocedural pointer analysis using access paths: design, implementation, and evaluation 00

Modular interprocedural pointer analysis using access paths:...

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proceedings of the acm sigplan 2000 conference on programming language design and implementation

作者： Ben-Chung Cheng Wen-Mei W. Hwu Department of Computer Science University of Illinois Department of Electrical and Computer Engineering University of Illinois

ISBN: (纸本)9781581131994

In this paper we present a modular interprocedural pointer analysis algorithm based on access-paths for C programs. We argue that access paths can reduce the overhead of representing context-sensitive transfer functions and effectively distinguish non-recursive heap objects. And when the modular analysis paradigm is used together with other techniques to handle type casts and function pointers, we are able to handle significant programs like those in the SPECcint92 and SPECcint95 suites. We have implemented the algorithm and tested it on a Pentium II 450 PC running Linux. The observed resource consumption and performance improvement are very encouraging.

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SKILL: A CAD system extension language 90

SKILL: A CAD system extension language

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proceedings of the 27th acm/IEEE design Automation conference

作者： Timothy J. Barnes Cadence Design Systems Inc. 555 River Oaks Parkway San Jose California

ISBN: (纸本)9780897913638

SKILL is a programming language that supports both command entry and procedural customization in OpusTM design FrameworkTM. After briefly considering some related work, we examine the requirements that motivate the provision of a programming language available to the user and describe some of the technical characteristics of the language design and implementation. Finally, we describe our experience with the language and outline future work. A number of programming examples are appended.

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The design of a class mechanism for Moby 99

The design of a class mechanism for Moby

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proceedings of the acm sigplan 1999 conference on programming language design and implementation

作者： Kathleen Fisher John Reppy AT&T Labs Research Bell Labs Lucent Technologies

ISBN: (纸本)9781581130942

Typical class-based languages, such as C++ and JAVA, provide complex class mechanisms but only weak module systems. In fact, classes in these languages incorporate many of the features found in richer module mechanisms. In this paper, we describe an alternative approach to designing a language that has both classes and modules. In our design, we rely on a rich ML-style module system to provide features such as visibility control and parameterization, while providing a minimal class mechanism that includes only those features needed to support inheritance. Programmers can then use the combination of modules and classes to implement the full range of class-based features and idioms. Our approach has the advantage that it provides a full-featured module system (useful in its own right), while keeping the class mechanism quite *** have incorporated this design in MOBY, which is an ML-style language that supports class-based object-oriented programming. In this paper, we describe our design via a series of simple examples, show how various class-based features and idioms are realized in MOBY, compare our design with others, and sketch its formal semantics.

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