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35th Annual Hawaii International conference on System Sciences, HICSS 2002

作者： Johnstone, A. Scott, E. Department of Computer Science Royal Holloway University of London Egham SurreyTW20 0EX United Kingdom

ISBN: (纸本)0769514359

Domain specific languages should support syntax that is comfortable,for specialist users. We discuss the impact of the standard deterministic parsing techniques such as LALR(1) and LL(1) on the design of programming languages and the desirability of more flexible parsers in a development environment. We present a new bottom-up nondeterministic parsing algorithm (GRMLR) that combines a modified notion of reduction with a Tomita-style breadth-first search of parallel parsing stacks. We give experimental results,for standard programming language grammars and LR(0), SLR(1) and LR(1) tables;the weaker tables generate significant amounts of nondeterminism. We show that GRMLR parsing corrects errors in the standard Tomita algorithm without incurring the performance overheads associated with other published solutions. We also demonstrate that the performance of GRMLR is upper-bounded by the performance of Tomita's algorithm, and that,for once realistic language grammar GRMLR only needs to search around 74% of the nodes. Our heavily instrumented development version of the algorithm achieves parsing rates of around 4000-10000 tokens per second on a 400 MHz Pentium II processor. Proof of correctness and details of our implementation are omitted here for space reasons but are available in an accompanying technical report. © 2002 IEEE.

关键词： Error correction

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Dynamic software replacement model and its Ada implementation

Dynamic software replacement model and its Ada implementatio...

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1991 conference on TRI-Ada: Today's Accomplishments;Tomorrow's Expectations, TRI-Ada 1991

作者： De Vicente, Belén Alonso, Alejandro Amador, Jorge Teice Control General Rodrigo 6 5th MadridE-28003 Spain E.T.S.I de Telecomunicación Ciudad Universitaria Universidad Politécnica Madrid MadridE-28040 Spain GMV S.A. PTM Tres Cantos MadridE-28760 Spain

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Automatic volume management for programmable microfluidics

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acm sigplan NOTICES 2008年第6期43卷 56-67页

作者： Amin, Ahmed M. Thottethodi, Mithuna Vijaykumar, T. N. Wereley, Steven Jacobson, Stephen C. Purdue Univ Sch Elect & Comp Engn W Lafayette IN 47907 USA Purdue Univ Sch Mech Engn W Lafayette IN 47907 USA Indiana Univ Dept Chem Bloomington IN 47405 USA

Microfluidics has enabled lab-on-a-chip technology to miniaturize and integrate biological and chemical analyses to a single chip comprising channels, valves, mixers, heaters, separators, and sensors. Recent papers have proposed programmable labs-on-a-chip as an alternative to traditional application-specific chips to reduce design effort, time, and cost. While these previous papers provide the basic support for programmability, this paper identifies and addresses a practical issue, namely, fluid volume management. Volume management addresses the problem that the use of a fluid depletes it and unless the given volume of a fluid is distributed carefully among all its uses, execution may run out of the fluid before all its uses are complete. Additionally, fluid volumes should not overflow (i.e., exceed hardware capacity) or underflow (i.e., fall below hardware resolution). We show that the problem can be formulated as a linear programming problem ( LP). Because LP's complexity and slow execution times in practice may be a concern, we propose another approach, called DAGSolve, which over-constrains the problem to achieve linear complexity while maintaining good solution quality. We also propose two optimizations, called cascading and static replication, to handle cases involving extreme mix ratios and numerous fluid uses which may defeat both LP and DAGSolve. Using some real-world assays, we show that our techniques produce good solutions while being faster than LP.

关键词： algorithms design microfluidics programmable lab-on-a-chip fluid volume management

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End-to-End Verification of Information-Flow Security for C and Assembly Programs

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acm sigplan NOTICES 2016年第6期51卷 648-664页

作者： Costanzo, David Shao, Zhong Gu, Ronghui Yale Univ New Haven CT 06520 USA

Protecting the confidentiality of information manipulated by a computing system is one of the most important challenges facing today's cybersecurity community. A promising step toward conquering this challenge is to formally verify that the end-to-end behavior of the computing system really satisfies various information-flow policies. Unfortunately, because today's system software still consists of both C and assembly programs, the end-to-end verification necessarily requires that we not only prove the security properties of individual components, but also carefully preserve these properties through compilation and cross-language linking. In this paper, we present a novel methodology for formally verifying end-to-end security of a software system that consists of both C and assembly programs. We introduce a general definition of observation function that unifies the concepts of policy specification, state indistinguishability, and whole-execution behaviors. We show how to use different observation functions for different levels of abstraction, and how to link different security proofs across abstraction levels using a special kind of simulation that is guaranteed to preserve state indistinguishability. To demonstrate the effectiveness of our new methodology, we have successfully constructed an end-to-end security proof, fully formalized in the Coq proof assistant, of a nontrivial operating system kernel (running on an extended CompCert x86 assembly machine model). Some parts of the kernel are written in C and some are written in assembly;we verify all of the code, regardless of language.

关键词： Verification Security Reliability languages design Information Flow Control Security Policy Specification Security-Preserving Simulation Program Verification Certified OS Kernels

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design and implementation of the Cortex visualization system

Design and implementation of the Cortex visualization system

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proceedings of the 1994 IEEE Visualization conference

作者： Banerjee, Deb Morley, Chris Smith, Wayne Fluent Inc Lebanon United States

Cortex has been designed for interactive analysis and display of simulation data generated by CFD applications based on unstructured-grid solvers. Unlike post-processing visualization environments, Cortex is designed to work in co-processing mode with the CFD application. This significantly reduces data storage and data movement requirements for visualization and also allows users to interactively steer the application. Further, Cortex supports high-performance by running on massively parallel computers and workstation clusters. An important goal for Cortex is to provide visualization to a variety of solvers which differ in their solution methodologies and supported flow models. Coupled with the co-processing requirement, this has required the development of a well defined programming interface to the CFD solver that lets the visualization system communicate efficiently with the solver, and requires minimal programming effort for porting to new solvers. Further, the requirement for targeting multiple solvers and application niches demands that the visualization system be rapidly and easily modifiable. Such flexibility is attained in Cortex by using the high-level, interpreted language Scheme for implementing user-interfaces and high-level visualization functions. By making the Scheme interpreter available from the Cortex text interface, the user can also customize and extend the visualization system.

关键词： Computer systems

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acm International conference Proceeding Series

ACM International Conference Proceeding Series

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8th Workshop on Network Simulator (ns-3), WNS3 2016

ISBN: (纸本)9781450342162

The proceedings contain 18 papers. The topics discussed include: design and implementation of the traffic control module in ns-3;implementation and evaluation of proportional integral controller enhanced (PIE) algorithm in ns-3;an implementation of scalable, Vegas, Veno, and YeAH congestion control algorithms in ns-3;TCP evaluation suite for ns-3;OFSwitch13: enhancing ns-3 with OpenFlow 1.3 support;analysis of programming language overhead in DCE;implementation and validation of an IEEE 802.11ah module for ns-3;implementation and evaluation of a WLAN IEEE 802.11ad model in ns-3;investigation and improvements to the OFDM Wi-Fi physical layer abstraction in ns-3;LL SimpleWireless: a controlled MAC/PHY wireless model to enable network protocol research;a realistic MAC and energy model for 802.15.4;a framework for end-to-end evaluation of 5G mmWave cellular networks in ns-3;ns-3 web-based user interface - power grid communications planning and modeling tool;getting Kodo: network coding for the ns-3 simulator;improving ns-3 emulation performance for fast prototyping of network protocols;ns-3 based framework for simulating communication based train control (CBTC) systems;implementation of 3d obstacle compliant mobility models for UAV networks in ns-3;and topology simulation for aeronautical communication protocols with ns-3 and DCE.

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A dynamic optimization framework for a Java just-in-time compiler 01

A dynamic optimization framework for a Java just-in-time com...

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acm sigplan conference on Object-oriented programming, Systems, languages, and Applications

作者： Toshio Suganuma Toshiaki Yasue Motohiro Kawahito Hideaki Komatsu Toshio Nakatani IBM Tokyo Research Laboratory 1623-14 Shimoturuma Yamato-shi Kanagawa 242-8502 Japan

ISBN: (纸本)1581133359

The high performance implementation of Java Virtual Machines (JVM) and just-in-time (JIT) compilers is directed toward adaptive compilation optimizations on the basis of online runtime profile information. This paper describes the design and implementation of a dynamic optimization framework in a production-level Java JIT compiler. Our approach is to employ a mixed mode interpreter and a three level optimizing compiler, supporting quick, full, and special optimization, each of which has a different set of tradeoffs between compilation overhead and execution speed. a lightweight sampling profiler operates continuously during the entire program's exectuion. When necessary, detailed information on runtime behavior is collected by dynmiacally generating instrumentation code which can be installed to and uninstalled from the specified recompilation target code. Value profiling with this instrumentation mechanism allows fully automatic code specialization to be performed on the basis of specific parameter values or global data at the highest optimization level. The experimental results show that our approach offers high performance and a low code expansion ratio in both program startup and steady state measurements in comparison to the compile-only approach, and that the code specialization can also contribute modest performance improvement

关键词： just in time compiler Java Java programming language HIGH-PERFORMANCE tradeoffs performance boost Runtime Codes Collected papers

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XMem: Type-safe, transparent, shared memory for cross-runtime communication and coordination

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acm sigplan NOTICES 2008年第6期43卷 327-338页

作者： Wegiel, Michal Krintz, Chandra Univ Calif Santa Barbara Dept Comp Sci Santa Barbara CA 93106 USA

Developers commonly build contemporary enterprise applications using type-safe, component-based platforms, such as J2EE, and architect them to comprise multiple tiers, such as a web container, application server, and database engine. Administrators increasingly execute each tier in its own managed runtime environment (MRE) to improve reliability and to manage system complexity through the fault containment and modularity offered by isolated MRE instances. Such isolation, however, necessitates expensive cross-tier communication based on protocols such as object serialization and remote procedure calls. Administrators commonly co-locate communicating MREs on a single host to reduce communication overhead and to better exploit increasing numbers of available processing cores. However, state-of-the-art MREs offer no support for more efficient communication between co-located MREs, while fast inter-process communication mechanisms, such as shared memory, are widely available as a standard operating system service on most modern platforms. To address this growing need, we present the design and implementation of XMem - type-safe, transparent, shared memory support for co-located MREs. XMem guarantees type-safety through coordinated, parallel, multi-process class loading and garbage collection. To avoid introducing any level of indirection, XMem manipulates virtual memory mapping. In addition, object sharing in XMem is fully transparent: shared objects are identical to local objects in terms of field access, synchronization, garbage collection, and method invocation, with the only difference being that shared-to-private pointers are disallowed. XMem facilitates easy integration and use by existing communication technologies and software systems, such as RMI, JNDI, JDBC, serialization/XML, and network sockets. We have implemented XMem in the open-source, production-quality HotSpot Java Virtual Machine. Our experimental evaluation, based on core communication technologies un

关键词： design experimentation languages management measurement performance interprocess communication managed runtimes shared memory transparent type-safe garbage collection synchronization class loading parallel

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TRANSIT: Specifying Protocols with Concolic Snippets 13

TRANSIT: Specifying Protocols with Concolic Snippets

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acm sigplan conference on programming language design and implementation

作者： Abhishek Udupa Sela Mador-Haim Arun Raghavan Milo M. K. Martin Jyotirmoy V. Deshmukh Rajeev Alur University of Pennsylvania Toyota Technical Center

ISBN: (纸本)9781450320146

With the maturing of technology for model checking and constraint solving, there is an emerging opportunity to develop programming tools that can transform the way systems are specified. In this paper, we propose a new way to program distributed protocols using concolic snippets. Concolic snippets are sample execution fragments that contain both concrete and symbolic values. The proposed approach allows the programmer to describe the desired system partially using the traditional model of communicating extended finite-state-machines (EFSM), along with high-level invariants and concrete execution fragments. Our synthesis engine completes an EFSM skeleton by inferring guards and updates from the given fragments which is then automatically analyzed using a model checker with respect to the desired invariants. The counterexamples produced by the model checker can then be used by the programmer to add new concrete execution fragments that describe the correct behavior in the specific scenario corresponding to the counterexample. We describe TRANSIT, a language and prototype implementation of the proposed specification methodology for distributed protocols. Experimental evaluations of TRANSIT to specify cache coherence protocols show that (1) the algorithm for expression inference from concolic snippets can synthesize expressions of size 15 involving typical operators over commonly occurring types, (2) for a classical directory-based protocol, TRANSIT automatically generates, in a few seconds, a complete implementation from a specification consisting of the EFSM structure and a few concrete examples for every transition, and (3) a published partial description of the SGI Origin cache coherence protocol maps directly to symbolic examples and leads to a complete implementation in a few iterations, with the programmer correcting counterexamples resulting from underspecified transitions by adding concrete examples in each iteration.

关键词： Program Synthesis Distributed Protocol Synthesis Cache Coherence Protocols programming by Example

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Scannerless NSLR(1) parsing of programming languages 89

Scannerless NSLR(1) parsing of programming languages

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proceedings of the acm sigplan 1989 conference on programming language design and implementation

作者： D. J. Salomon G. V. Cormack Department of Computer Science University of Waterloo Waterloo Ontario Canada

ISBN: (纸本)9780897913065

The disadvantages of traditional two-phase parsing (a scanner phase preprocessing input for a parser phase) are discussed. We present metalanguage enhancements for context-free grammars that allow the syntax of programming languages to be completely described in a single grammar. The enhancements consist of two new grammar rules, the exclusion rule, and the adjacency-restriction rule. We also present parser construction techniques for building parsers from these enhanced grammars, that eliminate the need for a scanner phase.

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