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检索条件"任意字段=Proceedings of the ACM SIGPLAN 2002 conference on Programming language design and implementation"

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A compiler approach to fast hardware design space exploration in FPGA-based systems 02

A compiler approach to fast hardware design space exploratio...

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proceedings of the acm sigplan 2002 conference on programming language design and implementation

作者： Byoungro So Mary W. Hall Pedro C. Diniz University of Southern California Marina del Rey California

ISBN: (纸本)9781581134636

The current practice of mapping computations to custom hardware implementations requires programmers to assume the role of hardware designers. In tuning the performance of their hardware implementation, designers manually apply loop transformations such as loop unrolling. designers manually apply loop transformations. For example, loop unrolling is used to expose instruction-level parallelism at the expense of more hardware resources for concurrent operator evaluation. Because unrolling also increases the amount of data a computation requires, too much unrolling can lead to a memory bound implementation where resources are idle. To negotiate inherent hardware space-time trade-offs, designers must engage in an iterative refinement cycle, at each step manually applying transformations and evaluating their impact. This process is not only error-prone and tedious but also prohibitively expensive given the large search spaces and with long synthesis times. This paper describes an automated approach to hardware design space exploration, through a collaboration between parallelizing compiler technology and high-level synthesis tools. We present a compiler algorithm that automatically explores the large design spaces resulting from the application of several program transformations commonly used in application-specific hardware designs. Our approach uses synthesis estimation techniques to quantitatively evaluate alternate designs for a loop nest computation. We have implemented this design space exploration algorithm in the context of a compilation and synthesis system called DEFACTO, and present results of this implementation on five multimedia kernels. Our algorithm derives an implementation that closely matches the performance of the fastest design in the design space, and among implementations with comparable performance, selects the smallest design. We search on average only 0.3% of the design space. This technology thus significantly raises the level of abstraction fo

关键词： design space exploration data dependence analysis reuse analysis loop transformations

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Teapot: language support for writing memory coherence protocols 96

Teapot: language support for writing memory coherence protoc...

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proceedings of the acm sigplan 1996 conference on programming language design and implementation

作者： Satish Chandra Brad Richards James R. Larus Computer Sciences Department University of Wisconsin-Madison 1210 West Dayton St. Madison WI

ISBN: (纸本)9780897917957

Recent shared-memory parallel computer systems offer the exciting possibility of customizing memory coherence protocols to fit an application's semantics and sharing patterns. Custom protocols have been used to achieve message-passing performance---while retaining the convenient programming model of a global address space---and to implement high-level language constructs. Unfortunately, coherence protocols written in a conventional language such as C are difficult to write, debug, understand, or modify. This paper describes Teapot, a small, domain-specific language for writing coherence protocols. Teapot uses continuations to help reduce the complexity of writing protocols. Simple static analysis in the Teapot compiler eliminates much of the overhead of continuations and results in protocols that run nearly as fast as hand-written C code. A Teapot specification can be compiled both to an executable coherence protocol and to input for a model checking system, which permits the specification to be verified. We report our experiences coding and verifying several protocols written in Teapot, along with measurements of the overhead incurred by writing a protocol in a higher-level language.

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The implementation and evaluation of fusion and contraction in array languages 98

The implementation and evaluation of fusion and contraction ...

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proceedings of the acm sigplan 1998 conference on programming language design and implementation

作者： E. Christopher Lewis Calvin Lin Lawrence Snyder University of Washington Seattle WA University of Texas Austin TX

ISBN: (纸本)9780897919876

Array languages such as Fortran 90, HPF and ZPL have many benefits in simplifying array-based computations and expressing data parallelism. However, they can suffer large performance penalties because they introduce intermediate arrays---both at the source level and during the compilation process---which increase memory usage and pollute the cache. Most compilers address this problem by simply scalarizing the array language and relying on a scalar language compiler to perform loop fusion and array contraction. We instead show that there are advantages to performing a form of loop fusion and array contraction at the array level. This paper describes this approach and explains its advantages. Experimental results show that our scheme typically yields runtime improvements of greater than 20% and sometimes up to 400%. In addition, it yields superior memory use when compared against commercial compilers and exhibits comparable memory use when compared with scalar languages. We also explore the interaction between these transformations and communication optimizations.

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8th International conference on Object-Oriented Information Systems, OOIS 2002

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8th International conference on Object-Oriented Information Systems, OOIS 2002

ISBN: (纸本)9783540440888

The proceedings contain 34 papers. The special focus in this conference is on Object-Oriented Information Systems. The topics include: Reuse in object-oriented information systems design;software reuse with use case patterns;promoting reuse through the capture of system description;a specification-oriented framework for information system user interfaces;the role of pattern languages in the instantiation of object-oriented frameworks;IS components with hyperclasses;Collaborative simulation by reuse of COTS simulators with a reflexive XML middleware1;efficient web-based information systems;semantic integration and query optimization of heterogeneous data sources*: (Invited Paper);“Real World” as an argument for covariant specialization in programming and modeling;extracting information from semi-structured web documents;object-oriented mediator queries to internet search engines;Warp-edge optimization in XPath;A caching system for web content generated from XML sources using XSLT;finding similar queries to satisfy searches based on query traces;WOnDA: An extensible multi-platform hypermedia design model;model-driven approaches to software development;executable and symbolic conformance tests for implementation models (position paper);object-oriented theories for model driven architecture;systems engineering foundations of software systems integration;maintaining class membership information;Using the model paradigm for real-time systems development: ACCORD/UML;generating enterprise applications from models;tool support for aspect-oriented design;model-driven architecture;model-based development of embedded systems;hierarchies in object oriented conceptual modeling;specialization/generalization in object-oriented analysis: Strengthening and multiple partitioning;towards a new role paradigm for object-oriented modeling;analysing object-oriented application frameworks using concept analysis;using both specialisation and generalisation in a programming language: Why and

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pHluid: the design of a parallel functional language implementation on workstations 96

pHluid: the design of a parallel functional language impleme...

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proceedings of the first acm sigplan international conference on Functional programming

作者： Cormac Flanagan Rishiyur S. Nikhil Rice University Department of Computer Science Houston Texas Digital Equipment Corp. Cambridge Research Laboratory One Kendall Square Bldg. 700 Cambridge Massachusetts

ISBN: (纸本)9780897917704

This paper describes the distributed memory implementation of a shared memory parallel functional language. The language is Id, an implicitly parallel, mostly functional language that is currently evolving into a dialect of Haskell. The target is a distributed memory machine, because we expect these to be the most widely available parallel platforms in the future. The difficult problem is to bridge the gap between the shared memory language model and the distributed memory machine model. The language model assumes that all data is uniformly accessible, whereas the machine has a severe memory hierarchy: a processor's access to remote memory (using explicit communication) is orders of magnitude slower than its access to local memory. Thus, avoiding communication is crucial for good performance. The Id language, and its general dataflow-inspierd compilation to multithreaded code are described elsewhere. In this paper, we focus on our new parallel runtime system and its features for avoiding communication and for tolerating its latency when necessary: multithreading, scheduling and load balancing; the distributed heap model and distributed coherent cacheing, and parallel garbage collection. We have completed the first implementation, and we present some preliminary performance mearsurements.

关键词： data flow parallel and distributed implementations garbage collection and run-time systems

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Compiler support for garbage collection in a statically typed language 92

Compiler support for garbage collection in a statically type...

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proceedings of the acm sigplan 1992 conference on programming language design and implementation

作者： Amer Diwan Eliot Moss Richard Hudson

ISBN: (纸本)9780897914758

We consider the problem of supporting compacting garbage collection in the presence of modern compiler optimizations. Since our collector may move any heap object, it must accurately locate, follow, and update all pointers and values derived from pointers. To assist the collector, we extend the compiler to emit tables describing live pointers, and values derived from pointers, at each program location where collection may occur. Significant results include identification of a number of problems posed by optimizations, solutions to those problems, a working compiler, and experimental data concerning table sizes, table compression, and time overhead of decoding tables during collection. While gc support can affect the code produced, our sample programs show no significant changes, the table sizes are a modest fraction of the size of the optimized code, and stack tracing is a small fraction of total gc time. Since the compiler enhancements are also modest, we conclude that the approach is practical.

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1st International conference on Web-Based Learning, ICWL 2002

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1st International conference on Web-Based Learning, ICWL 2002

ISBN: (纸本)3540440410

The proceedings contain 35 papers. The special focus in this conference is on System Modeling, Architecture, Distance Learning System Engineering, Collaborative Systems and Experiences in Distance Learning. The topics include: An open framework for smart and personalized distance learning;a metadata framework for description of learning objects;a web-based motivation-supporting model for effective teaching-learning;the design and implementation of a web-based teaching-learning model for information communication technology application education;on analysis and modeling of student browsing behavior in web-based asynchronous learning environments;conceptual network based courseware navigation and web presentation mechanisms;web-based knowledge-based system on liquid retaining structure design as instructional tool;creating a revolutionary real-time interactive distance learning system;critical success factors for web-based organizational IT training systems;application of quality assurance in web-based laboratories;an educational community using collaborative virtual environments;a component-based architecture for adaptive, collaborative web-based learning;virtual programming lab for online distance learning;experiences in running a flexible, web-based, and self-paced course;virtual teaching and learning based on multimedia techniques;experiences in developing a large-scale school IT project;a web-based lecture video database system with flexible indexing method using action logs;design and evaluation of lecture support functions for question databases;web-based video indexing and retrieval for teaching and learning;multimedia knowledge exploitation for E-learning and web-based interactive 3D visualization for computer graphics education.

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A logic programming tool for qualitative system design 86

A logic programming tool for qualitative system design

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proceedings of the international conference on APL

作者： Gert L. Moller Bang & Olufsen DK - 7600 Struer Denmark

ISBN: (纸本)9780901865359

Introducing a geometrical approach to propositional divalent logic with the truth-tables of the Boolean connectives as the geometrical objects, we can make a simple operational implementation in APL of basic inference methods. This is the basis for a logic programming tool used for preliminary product design at the Danish company Bang&Olufsen.

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Practical program analysis using general purpose logic programming systems—a case study 96

Practical program analysis using general purpose logic progr...

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proceedings of the acm sigplan 1996 conference on programming language design and implementation

作者： Steven Dawson C. R. Ramakrishnan David S. Warren SRI International 333 Ravenswood Ave. Menlo Park CA and Department of Computer Science SUNY at Stony Brook Stony Brook NY Department of Computer Science SUNY at Stony Brook Stony Brook NY

ISBN: (纸本)9780897917957

Many analysis problems can be cast in the form of evaluating minimal models of a logic program. Although such formulations are appealing due to their simplicity and declarativeness, they have not been widely used in practice because, either existing logic programming systems do not guarantee completeness, or those that do have been viewed as too inefficient for integration into a compiler. The objective of this paper is to re-examine this issue in the context of recent advances in implementation technologies of logic programming *** find that such declarative formulations can indeed be used in practical systems, when combined with the appropriate tool for evaluation. We use existing formulations of analysis problems --- groundness analysis of logic programs, and strictness analysis of functional programs --- in this case study, and the XSB system, a table-based logic programming system, as the evaluation tool of choice. We give experimental evidence that the resultant groundness and strictness analysis systems are practical in terms of both time and space. In terms of implementation effort, the analyzers took less than 2 man-weeks (in total), to develop, optimize and evaluate. The analyzer itself consists of about 100 lines of tabled Prolog code and the entire system, including the components to read and preprocess input programs and to collect the analysis results, consists of about 500 lines of code.

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design and implementation of a python-based active network platform for network management and control 1

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4th International Working conference on Active Networks

作者： Baumgartner, F Braun, T Bhargava, B Purdue Univ Dept Comp Sci W Lafayette IN 47907 USA Purdue Univ Ctr Educ & Res Informat Assurance & Secur W Lafayette IN 47907 USA Univ Bern Inst Appl Math & Sci Comp Bern Switzerland

ISBN: (数字)9783540361992

ISBN: (纸本)3540002235

Active networks can provide lightweight solutions for network management-related tasks. Specific requirements for these tasks have to be met, while at the same time several issues crucial for active networks can be solved rather easily. A system addressing especially network management was developed and implemented. It provides a flexible environment for rapid development using the platform-independent programming language Python, and also supports platform dependent native code. By allowing to add new functions to network devices it improves the performance of Internet routers, and simplifies the introduction and maintenance of new services. To show the capabilities of the approach, two different quality of service related applications, that is a simple multicast algorithm and an approach to automatically set up tunnels, have been implemented. The evaluation of these services shows the advantages of the architecture, and its benefits for the task of network and quality of service management.

关键词： Quality of service

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