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Ziria: A DSL for wireless systems programming 15

Ziria: A DSL for wireless systems programming

proceedings of the Twentieth International conference on Architectural Support for programming languages and Operating Systems

作者： Stewart, Gordon Gowda, Mahanth Mainland, Geoffrey Radunović, Božidar Vytiniotis, Dimitrios Agulló, Cristina Luengo Princeton University United States UIUC United States Drexel University United States MSR Cambridge United States Universitat Politècnica de Catalunya Spain

ISBN: (纸本)9781450328357

Software-defined radio (SDR) brings the flexibility of software to wireless protocol design, promising an ideal platform for innovation and rapid protocol deployment. However, implementing modern wireless protocols on existing SDR platforms often requires careful hand-tuning of low-level code, which can undermine the advantages of software. Ziria is a new domain-specific language (DSL) that offers programming abstractions suitable for wireless physical (PHY) layer tasks while emphasizing the pipeline reconfiguration aspects of PHY programming. The Ziria compiler implements a rich set of specialized optimizations, such as lookup table generation and pipeline fusion. We also offer a novel-due to pipeline reconfiguration-algorithm to optimize the data widths of computations in Ziria pipelines. We demonstrate the programming flexibility of Ziria and the performance of the generated code through a detailed evaluation of a line-rate Ziria WiFi 802.11a/g implementation that is on par and in many cases outperforms a hand-tuned state-of-the-art C++ implementation on commodity CPUs. Copyright © 2015 acm.

关键词： Table lookup

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Workshop preview of the 2015 workshop on reactive and event-based languages & systems (REBLS 2015)

Workshop preview of the 2015 workshop on reactive and event-...

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acm sigplan International conference on Systems, programming, languages and Applications: Software for Humanity, SPLASH 2015

作者： Salvaneschi, Guido De Meuter, Wolfgang Eugster, Patrick Ziarek, Lukasz Technische Universität Darmstadt Germany Vrije Universiteit Brussel Belgium Purdue University United States State University of New York United States

ISBN: (纸本)9781450337229

Reactive programming and event-based programming are two closely related programming styles that are becoming ever more important with the advent of advanced HCI technology and the ever increasing requirement for applications to run on the web or on collaborating mobile devices. A number of publications about middleware and language design - so-called reactive and event-based languages and systems - have already seen the light, but the field still raises several questions. For example, the interaction with mainstream language concepts is poorly understood, implementation technology is in its infancy and modularity mechanisms are almost totally lacking. Moreover, large applications are still to be developed and patterns and tools for developing reactive applications is an area that is vastly unexplored. This workshop gathers researchers in reactive and event-based languages and systems. The goal of the workshop is to exchange new technical research results and to define better the field by coming up with taxonomies and overviews of the existing work.

关键词： Object oriented programming

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Cross-Layer Memory Management for Managed language Applications 2015

Cross-Layer Memory Management for Managed Language Applicati...

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acm sigplan International conference on Object-Oriented programming, Systems, languages, and Applications (OOPSLA)

作者： Jantz, Michael R. Robinson, Forrest J. Kulkarni, Prasad A. Doshi, Kshitij A. Univ Tennessee Knoxville TN 37996 USA Univ Kansas Lawrence KS 66045 USA Intel Corp Santa Clara CA 95051 USA

ISBN: (纸本)9781450336895

Performance and energy efficiency in memory have become critically important for a wide range of computing domains. However, it is difficult to control and optimize memory power and performance because these effects depend upon activity across multiple layers of the vertical execution stack. To address this challenge, we construct a novel and collaborative framework that employs object placement, cross-layer communication, and page-level management to effectively distribute application objects in the DRAM hardware to achieve desired power/performance goals. In this work, we describe the design and implementation of our framework, which is the first to integrate automatic object profiling and analysis at the application layer with fine-grained management of memory hardware resources in the operating system. We demonstrate the utility of our framework by employing it to more effectively control memory power consumption. We design a custom memory-intensive workload to show the potential of our approach. Next, we develop sampling and profiling-based analyses and modify the code generator in the HotSpot VM to understand object usage patterns and automatically determine and control the placement of hot and cold objects in a partitioned VM heap. This information is communicated to the operating system, which uses it to map the logical application pages to the appropriate DRAM ranks according to user-defined provisioning goals. We evaluate our framework and find that it achieves our test goal of significant DRAM energy savings across a variety of workloads, without any source code modifications or recompilations.

关键词： design Experimentation Performance Cross-layer Power Efficiency DRAM HotSpot

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PolyMage: Automatic Optimization for Image Processing Pipelines 15

PolyMage: Automatic Optimization for Image Processing Pipeli...

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20th International conference on Architectural Support for programming languages and Operating Systems (ASPLOS)

作者： Mullapudi, Ravi Teja Vasista, Vinay Bondhugula, Uday Indian Inst Sci Dept Comp Sci & Automat Bangalore 560012 Karnataka India

ISBN: (纸本)9781450328357

This paper presents the design and implementation of PolyMage, a domain-specific language and compiler for image processing pipelines. An image processing pipeline can be viewed as a graph of interconnected stages which process images successively. Each stage typically performs one of point-wise, stencil, reduction or data-dependent operations on image pixels. Individual stages in a pipeline typically exhibit abundant data parallelism that can be exploited with relative ease. However, the stages also require high memory bandwidth preventing effective utilization of parallelism available on modern architectures. For applications that demand high performance, the traditional options are to use optimized libraries like OpenCV or to optimize manually. While using libraries precludes optimization across library routines, manual optimization accounting for both parallelism and locality is very tedious. The focus of our system, PolyMage, is on automatically generating high-performance implementations of image processing pipelines expressed in a high-level declarative language. Our optimization approach primarily relies on the transformation and code generation capabilities of the polyhedral compiler framework. To the best of our knowledge, this is the first model-driven compiler for image processing pipelines that performs complex fusion, tiling, and storage optimization automatically. Experimental results on a modern multicore system show that the performance achieved by our automatic approach is up to 1.81x better than that achieved through manual tuning in Halide, a state-of-the-art language and compiler for image processing pipelines. For a camera raw image processing pipeline, our performance is comparable to that of a hand-tuned implementation.

关键词： Domain-specific language image processing polyhedral optimization locality parallelism tiling multicores vectorization

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design and implementation of the LogicBlox System 15

Design and Implementation of the LogicBlox System

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acm SIGMOD International conference on Management of Data

作者： Aref, Molham ten Cate, Balder Green, Todd J. Kimelfeld, Benny Olteanu, Dan Pasalic, Emir Veldhuizen, Todd L. Washburn, Geoffrey LogicBlox Inc Atlanta GA 30309 USA

ISBN: (纸本)9781450327589

The LogicBlox system aims to reduce the complexity of software development for modern applications which enhance and automate decision-making and enable their users to evolve their capabilities via a "self-service" model. Our perspective in this area is informed by over twenty years of experience building dozens of missioncritical enterprise applications that are in use by hundreds of large enterprises across industries such as retail, telecommunications, banking, and government. We designed and built LogicBlox to be the system we wished we had when developing those applications. In this paper, we discuss the design considerations behind the LogicBlox system and give an overview of its implementation, highlighting innovative aspects. These include: LogiQL, a unified and declarative language based on Datalog;the use of purely functional data structures;novel join processing strategies;advanced incremental maintenance and live programming facilities;a novel concurrency control scheme;and built-in support for prescriptive and predictive analytics.

关键词： LogicBlox LogiQL Datalog Leapfrog Triejoin Incremental Maintenance Transaction Repair Live programming Predictive Analytics

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Beyond the PDP-11: Architectural support for a memory-safe C abstract machine 15

Beyond the PDP-11: Architectural support for a memory-safe C...

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20th International conference on Architectural Support for programming languages and Operating Systems (ASPLOS)

作者： Chisnall, David Rothwell, Colin Watson, Robert N. M. Woodruff, Jonathan Vadera, Munraj Moore, Simon W. Roe, Michael Davis, Brooks Neumann, Peter G. Univ Cambridge Cambridge CB2 1TN England SRI Int Princeton NJ USA

ISBN: (纸本)9781450328357

We propose a new memory-safe interpretation of the C abstract machine that provides stronger protection to benefit security and debugging. Despite ambiguities in the specification intended to provide implementation flexibility, contemporary implementations of C have converged on a memory model similar to the PDP-11, the original target for C. This model lacks support for memory safety despite well-documented impacts on security and reliability. Attempts to change this model are often hampered by assumptions embedded in a large body of existing C code, dating back to the memory model exposed by the original C compiler for the PDP-11. Our experience with attempting to implement a memory-safe variant of C on the CHERI experimental microprocessor led us to identify a number of problematic idioms. We describe these as well as their interaction with existing memory safety schemes and the assumptions that they make beyond the requirements of the C specification. Finally, we refine the CHERI ISA and abstract model for C, by combining elements of the CHERI capability model and fat pointers, and present a softcore CPU that implements a C abstract machine that can run legacy C code with strong memory protection guarantees.

关键词： capabilities processor design compilers memory protection C language security memory safety bounds checking

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From network interface to multithreaded web applications : A case study in modular program verification 15

From network interface to multithreaded web applications : A...

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42nd Annual acm sigplan-SIGACT Symposium on Principles of programming languages, POPL 2015

作者： Chlipala, Adam MIT CSAIL United States

ISBN: (纸本)9781450333009

Many verifications of realistic software systems are monolithic, in the sense that they define single global invariants over complete system state. More modular proof techniques promise to support reuse of component proofs and even reduce the effort required to verify one concrete system, just as modularity simplifies standard software development. This paper reports on one case study applying modular proof techniques in the Coq proof assistant. To our knowledge, it is the first modular verification certifying a system that combines infrastructure with an application of interest to end users. We assume a nonblocking API for managing TCP networking streams, and on top of that we work our way up to certifying multithreaded, database-backed Web applications. Key verified components include a cooperative threading library and an implementation of a domain-specific language for XML processing. We have deployed our case-study system on mobile robots, where it interfaces with off-the-shelf components for sensing, actuation, and control. Copyright © 2015 by the Association for Computing Machinery, Inc. (acm).

关键词： Software design

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implementation of real-time WiFi receiver in Ziria, language for rapid prototyping of wireless PHY 21

Implementation of real-time WiFi receiver in Ziria, language...

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21st Annual International conference on Mobile Computing and Networking, MobiCom 2015

作者： Stewart, Gordon Gowda, Mahanth Mainland, Geoffrey Radunović, Božidar Vytiniotis, Dimitrios Ohio University United States UIUC United States Drexel United States Microsoft Research United States

ISBN: (纸本)9781450336192

Software-defined radios (SDR) have the potential to bring major innovation in wireless networking design. However, their impact so far has been limited due to complex programming tools. Most of the existing tools are either too slow to achieve the full line speeds of contemporary wireless PHYs or are too complex to master. In this demo we present our novel SDR programming environment called Ziria. Ziria consists of a novel programming language and an optimizing compiler. The compiler is able to synthesize very efficient SDR code from high-level PHY descriptions written in Ziria language. To illustrate its potential, we present the design of an LTE-like PHY layer in Ziria. We run it on the Sora SDR platform and demonstrate on a test-bed that it is able to operate in real-time.

关键词： Software radio

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acm International conference Proceeding Series

ACM International Conference Proceeding Series

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11th Central and Eastern European Software Engineering conference in Russia, CEE-SECR 2015

ISBN: (纸本)9781450341301

The proceedings contain 11 papers. The topics discussed include: securing outsourced database: architecture for protected web resource;implementation of request switch in PleskFS file system;automatic request analyzer for QoS enabled storage system;aspect markup of a source code for quick navigating a project;on development of static analysis tools for string-embedded languages;some aspects of a modern common-purpose programming language design;CPU utilization prediction methods overview;discovering clones in software: from complex algorithms to everyday desktop tool;justification of the choice of neural networks learning algorithms for indoor mobile positioning;BDD by example: Russian Bylina written in gherkin language;and usage of design patterns as a kind of components of software architecture.

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EXPLORER : Query- and Demand-Driven Exploration of Interprocedural Control Flow Properties

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acm sigplan NOTICES 2015年第10期50卷 520-534页

作者： Feng, Yu Wang, Xinyu Dillig, Isil Lin, Calvin Univ Texas Austin Austin TX 78712 USA

This paper describes a general framework-and its implementation in a tool called EXPLORER-for statically answering a class of interprocedural control flow queries about Java programs. EXPLORER allows users to formulate queries about feasible callstack configurations using regular expressions, and it employs a precise, demand-driven algorithm for answering such queries. Specifically, EXPLORER constructs an automaton A that is iteratively refined until either the language accepted by A is empty (meaning that the query has been refuted) or until no further refinement is possible based on a precise, context-sensitive abstraction of the program. We evaluate EXPLORER by applying it to three different program analysis tasks, namely, (1) analysis of the observer design pattern in Java, (2) identification of a class of performance bugs, and (3) analysis of inter-component communication in Android applications. Our evaluation shows that EXPLORER is both efficient and precise.

关键词： Algorithms languages Program analysis Demand-driven analysis points-to analysis query language control flow properties

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