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检索条件"任意字段=Proceedings of the ACM SIGPLAN 2002 conference on Programming language design and implementation"

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Meta optimization: Improving compiler heuristics with machine learning 03

引用

conference on programming language design and implementation

作者： Stephenson, M Amarasinghe, S Martin, M O'Reilly, UM MIT Comp Sci Lab Cambridge MA 02139 USA MIT Artificial Intelligence Lab Cambridge MA 02139 USA

ISBN: (纸本)9781581136623

Compiler writers have crafted many heuristics over the years to approximately solve NP-hard problems efficiently. Finding a heuristic that performs well on a broad range of applications is a tedious and difficult process. This paper introduces Meta Optimization, a methodology for automatically fine-tuning compiler heuristics. Meta Optimization uses machine-learning techniques to automatically search the space of compiler heuristics. Our techniques reduce compiler design complexity by relieving compiler writers of the tedium of heuristic tuning. Our machine-learning system uses an evolutionary algorithm to automatically find effective compiler heuristics. We present promising experimental results. In one mode of operation Meta Optimization creates application-specific heuristics which often result in impressive speedups. For hyperblock formation, one optimization we present in this paper, we obtain an average speedup of 23% (up to 73%) for the applications in our suite. Furthermore, by evolving a compiler's heuristic over several benchmarks, we can create effective, general-purpose heuristics. The best general-purpose heuristic our system found for hyperblock formation improved performance by an average of 25% on our training set, and 9% on a completely unrelated test set. We demonstrate the efficacy of our techniques - on three different optimizations in this paper: hyperblock formation, register allocation, and data prefetching.

关键词： machine learning priority functions genetic programming compiler heuristics

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A region-based compilation technique for a Java just-in-time compiler 03

引用

conference on programming language design and implementation

作者： Suganuma, T Yasue, T Nakatani, T IBM Japan Ltd Tokyo Res Lab Yamato 2428502 Japan

ISBN: (纸本)9781581136623

Method inlining and data flow analysis are two major optimization components for effective program transformations, however they often suffer from the existence of rarely or never executed code contained in the target method. One major problem lies in the assumption that the compilation unit is partitioned at method boundaries. This paper describes the design and implementation of a region-based compilation technique in our dynamic compilation system, in which the compiled regions are selected as code portions without rarely executed code. The key part of this technique is the region selection, partial inlining, and region exit handling. For region selection, we employ both static heuristics and dynamic profiles to identify rare sections of code. The region selection process and method inlining decision are interwoven, so that method inlining exposes other targets for region selection, while the region selection in the inline target conserves the inlining budget, leading to more method inlining. Thus the inlining process can be performed for parts of a method, not for the entire body of the method. When the program attempts to exit from a region boundary, we trigger recompilation and then rely on on-stack replacement to continue the execution from the corresponding entry point in the recompiled code. We have implemented these techniques in our Java JIT compiler, and conducted a comprehensive evaluation. The experimental results show that the approach of region-based compilation achieves approximately 5% performance improvement on average, while reducing the compilation overhead by 20 to 30%, in comparison to the traditional function-based compilation techniques.

关键词： performance design experimentation measurement languages region-based compilation dynamic compilers partial inlining on-stack replacement

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A compiler framework for speculative analysis and optimizations 03

引用

conference on programming language design and implementation

作者： Lin, J Chen, T Hsu, WC Ju, RDC Ngai, TF Yew, PC Chan, S Univ Minnesota Dept Comp Sci & Engn Minneapolis MN 55455 USA Intel Corp Microproc Res Lab Santa Clara CA 95052 USA

ISBN: (纸本)9781581136623

Speculative execution, such as control speculation and data speculation, is an effective way to improve program performance. Using edge/path profile information or simple heuristic rules, existing compiler frameworks can adequately incorporate and exploit control speculation. However, very little has been done so far to allow existing compiler frameworks to incorporate and exploit data speculation effectively in various program transformations beyond instruction scheduling. This paper proposes a speculative SSA form to incorporate information from alias profiling and/or heuristic rules for data speculation, thus allowing existing program analysis frameworks to be easily extended to support both control and data speculation. Such a general framework is very useful for EPIC architectures that provide checking (such as advanced load address table (ALAT) [10]) on data speculation to guarantee the correctness of program execution. We use SSAPRE [2 1] as one example to illustrate how to incorporate data speculation in those important compiler optimizations such as partial redundancy elimination (PRE), register promotion, strength reduction and linear function test replacement. Our extended framework allows both control and data speculation to be performed on top of SSAPRE and, thus, enables more aggressive speculative optimizations. The proposed framework has been implemented on Intel's Open Research Compiler (ORC). We present experimental data on some SPEC2000 benchmark programs to demonstrate the usefulness of this framework and how data speculation benefits partial redundancy elimination.

关键词： algorithms performance design experimentation speculative SSA form speculative weak update data speculation partial redundancy elimination register promotion

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Compile-time dynamic voltage scaling settings: Opportunities and limits 03

引用

conference on programming language design and implementation

作者： Xie, F Martonosi, M Malik, S Princeton Univ Dept Elect Engn Princeton NJ 08544 USA

ISBN: (纸本)9781581136623

With power-related concerns becoming dominant aspects of hardware and software design, significant research effort has been devoted towards system power minimization. Among run-time power-management techniques, dynamic voltage scaling (DVS) has emerged as an important approach, with the ability to provide significant power savings. DVS exploits the ability to control the power consumption by varying a processor's supply voltage (V) and clock frequency (f). DVS controls energy by scheduling different parts of the computation to different (V, f) pairs;the goal is to minimize energy while meeting performance needs. Although processors like the Intel XScale and Transmeta Crusoe allow software DVS control, such control has thus far largely been used at the process/task level under operating system control. This is mainly because the energy and time overhead for switching DVS modes is considered too large and difficult to manage within a single program. In this paper we explore the opportunities and limits of compile-time DVS scheduling. We derive an analytical model for the maximum energy savings that can be obtained using DVS given a few known program and processor parameters. We use this model to determine scenarios where energy consumption benefits from compile-time DVS and those where there is no benefit. The model helps us extrapolate the benefits of compile-time DVS into the future as processor parameters change. We then examine how much of these predicted benefits can actually be achieved through optimal settings of DVS modes. This is done by extending the existing Mixed-integer Linear Program (MILP) formulation for this problem by accurately accounting for DVS energy switching overhead, by providing finer-grained control on settings and by considering multiple data categories in the optimization. Overall, this research provides a comprehensive view of compile-time DVS management, providing both practical techniques for its immediate deployment as well theoretical

关键词： low power compiler dynamic voltage scaling Mixed-Integer Linear programming analytical model

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Duce: An XML-centric general-purpose language

Duce: An XML-centric general-purpose language

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proceedings of the 2003 acm sigplan International conference on Functional programming

作者： Benzaken, Véronique Castagna, Giuseppe Frisch, Alain Université Paris-Sud 91405 Orsay France CNRS Département d'Informatique École Normale Superieure 45 Rue d'Ulm Paris France Département d'Informatique École Normale Superieure 45 Rue d'Ulm Paris France

We present the functional language Duce, discuss some design issues, and show its adequacy for working with XML documents. Distinctive features of Duce are a powerful pattern matching, first class functions, overloaded functions, a very rich type system (arrows, sequences, pairs, records, intersections, unions, differences), precise type inference for patterns and error localization, and a natural interpretation of types as sets of values. We also outline some important implementation issues;in particular, a dispatch algorithm that demonstrates how static type information can be used to obtain very efficient compilation schemas.

关键词： XML

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A comparison of empirical and model-driven optimization 03

引用

acm sigplan conference on programming language design and implementation

作者： K., Yotov X., Li G., Ren M., Cibulskis G., DeJong M., Garzaran D., Padua K., Pingali P., Stodghill P., Wu Univ. Illinois at Urbana-Champaign Urbana-Champaign IL United States IBM T.J. Watson Research Center Yorktown Heights NY United States

ISBN: (纸本)9781581136623

Empirical program optimizers estimate the values of key optimization parameters by generating different program versions and running them on the actual hardware to determine which values give the best performance. In contrast, conventional compilers use models of programs and machines to choose these parameters. It is widely believed that model-driven optimization does not compete with empirical optimization, but few quantitative comparisons have been done to date. To make such a comparison, we replaced the empirical optimization engine in ATLAS (a system for generating a dense numerical linear algebra library called the BLAS) with a model-driven optimization engine that used detailed models to estimate values for optimization parameters, and then measured the relative performance of the two systems on three different hardware platforms. Our experiments show that model-driven optimization can be surprisingly effective, and can generate code whose performance is comparable to that of code generated by empirical optimizers for the BLAS.

关键词： Computer programming

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Component-based DSL development

引用

2nd International conference on Generative programming and Component Engineering

作者： Cleenewerck, T Free Univ Brussels Programming Technol Lab B-1050 Brussels Belgium

ISBN: (纸本)3540201025

Domain specific languages (DSLs) have proven to be a very adequate mechanism to encapsulate and hide the complex implementation details of component-based software development. Since evolution lies at the heart of any software system the DSLs that were built around them must evolve as well. In this paper we identify important issues that cause a DSL implementation to be very rigid in which all phases are tightly coupled and highly dependent upon one another. To increase the poor evolvability of current day DSL development environments a new development environment Keyword based programming (KBP) is proposed where DSLs are built by using a language specification to compose and glue loosely coupled and independent language components (called keywords).

关键词： Software design

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Why software writing is difficult and will remain so

Why software writing is difficult and will remain so

引用

Joint European conference on Theory and Practice of Software (ETAPS 2003)

作者： Jackson, M London NW8 9QY 101 Hamilton Terrace United Kingdom

Software writing is difficult for many reasons. One important reason is the interplay between the formal world of the computer and its programming language with the informal world where the problem to be solved is located. In this paper some of the direct and indirect consequences of this interplay are briefly discussed, both for software specification and design generally and for the composition of independently identified and specified subproblems. (C) 2003 Elsevier B.V. All rights reserved.

关键词： safety/security in digital systems software design and implementation software engineering

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language support for lightweight transactions

Language support for lightweight transactions

引用

18th Annual conference on Object-Oriented programming, Systems, languages and Applications (OOPSLA 2003)

作者： Harris, T Fraser, K Univ Cambridge Comp Lab Cambridge CB3 0FD England

Concurrent programming is notoriously difficult. Current abstractions are intricate and make it hard to design computer systems that are reliable and scalable. We argue that these problems can be addressed by moving to a declarative style of concurrency control in which programmers directly indicate the safety properties that they require. In our scheme the programmer demarks sections of code which execute within lightweight software-based transactions that commit atomically and exactly once. These transactions can update shared data, instantiate objects, invoke library features and so on. They can also block, waiting for arbitrary boolean conditions to become true. Transactions which do not access the same shared memory locations can commit concurrently. Furthermore, in general, no performance penalty is incurred for memory accesses outside transactions. We present a detailed design of this proposal along with an implementation and evaluation. We argue that the resulting system (i) is easier for mainstream programmers to use, (ii) prevents lock-based priority-inversion and deadlock problems and (iii) can offer performance advantages.

关键词： concurrency conditional critical regions transactions non-blocking systems

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Executable computational logics: Combining formal methods and programming language based system design 1

Executable computational logics: Combining formal methods an...

引用

1st acm/IEEE International conference on Formal Methods and Models for Co-design (MEMOCODE 03)

作者： Meseguer, J Univ Illinois Dept Comp Sci Urbana IL 61801 USA

ISBN: (纸本)0769519237

An executable computational logic can provide the desired bridge between formal system properties and formal methods to verify them on the one hand, and executable models of system designs based on programming languages on the other. However, not all such logics are equally well suited for the task. This paper gives some requirements that seem important for a computational logic to be suitable in practice, and discusses the experience with rewriting logic, its Maude language implementation, and its formal tool environment, concluding that they seem to meet well those requirements.

关键词： Bridges Computer languages Computer science Convergence Hardware Logic design Logic programming Mathematical model Mathematics Military computing

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