Today, parallel programming is dominated by message passing libraries such as MPI. Algorithmic skeletons intend to simplify parallel programming by increasing the expressive power. The idea is to offer typical paralle...
详细信息
ISBN:
(纸本)3540440496
Today, parallel programming is dominated by message passing libraries such as MPI. Algorithmic skeletons intend to simplify parallel programming by increasing the expressive power. The idea is to offer typical parallel programming patterns as polymorphic higher-order functions which are efficiently implemented in parallel. The approach presented here integrates the main features of existing skeleton systems. Moreover, it does not come along with a new programminglanguage or language extension, which parallel programmers may hesitate to learn, but it is offered in form of a library, which can easily be used by e.g. C and C++ programmers. A major technical difficulty is to simulate the main requirements for a skeleton implementation, namely higher-order functions, partial applications, and polymorphism as efficiently as possible in an imperative programminglanguage. Experimental results based on a draft implementation of the suggested skeleton library show that this can be achieved without a significant performance penalty.
Complex systems-on-chip present one of the most challenging design problems of today. To meet this challenge, new designlanguages capable to model such heterogeneous, dynamic systems are needed. For implementation of...
详细信息
ISBN:
(纸本)0769514723
Complex systems-on-chip present one of the most challenging design problems of today. To meet this challenge, new designlanguages capable to model such heterogeneous, dynamic systems are needed. For implementation of such a language, the use of an object oriented C++ class library has proven to be a promising approach, since new classes dealing with design- and platform-specific problems can be added in a conceptual and seamlessly reusable way. This paper shows the development of such an extension aimed to provide a platform-independent high-level structured storage object through hiding of the low-level implementation details. It results in a completely virtualised, user-extendible component, suitable for use in heterogeneous systems.
The development of application specific instruction set processors comprises several design phases: architecture exploration, software tools design, system verification and designimplementation. The LISA processor de...
详细信息
ISBN:
(纸本)0769514413
The development of application specific instruction set processors comprises several design phases: architecture exploration, software tools design, system verification and designimplementation. The LISA processor design platform (LPDP) based on machine descriptions in the LISA language provides one common environment for these design phases. Required software tools for architecture exploration and application development can be generated from one sole specification. This paper focuses on the implementation phase and the generation of synthesizable HDL code from a LISA model. The derivation of the architectural structure, decoder and even approaches for the implementation of the data path are presented. Moreover the synthesis results of a generated and a handwritten implementation of a low-power DVB-T post processing unit are compared.
This article describes the Balboa component integration environment that is composed of three parts: a script language interpreter, compiled C++ components, and a set of Split-Level Interfaces to link the interpreted ...
详细信息
ISBN:
(纸本)0769514723
This article describes the Balboa component integration environment that is composed of three parts: a script language interpreter, compiled C++ components, and a set of Split-Level Interfaces to link the interpreted domain to the compiled domain. The environment applies the notion of split-level programming to relieve system engineers of software engineering concerns and to let them focus on system architecture. The script language is a Component Integration language because it implements a component model with introspection and loose typing capabilities. Component wrappers use split-level interfaces that implement the composition rules, dynamic type determination and type inference algorithms. Using an interface description language compiler automatically generates the split-level interfaces. The contribution of this work is twofold: an active code generation technique, and a three-layer environment that keeps the C++ components intact for reuse. We present an overview of the environment;demonstrate our approach by building three simulation models for an adaptive memory controller, and comment on code generation ratios.
A strength of agent architectures such as PRS and dMARS, which are based on stored plan execution, is that their plan languages offer an easily understood, visual representation of behaviour that permits their underly...
详细信息
ISBN:
(纸本)9781581134803
A strength of agent architectures such as PRS and dMARS, which are based on stored plan execution, is that their plan languages offer an easily understood, visual representation of behaviour that permits their underlying architectural complexity to be partially abstracted and effectively exploited. Unlike visual representations of behaviour used in methodologies such as UML for programming in Object Oriented languages such as Java, plan graphs constitute a direct, executable specification of agent behaviour rather than a model which guides implementation refinement. Previously, such languages have lacked a formal semantic basis. This paper presents key elements of a new visual programminglanguage ViP which has a complete and exact semantics based upon a recently described agent process algebra - the ψ calculus.
This paper describes the port of the ZPL parallel array language to the Mercury-RACE, a multicomputing system designed for embedded real-Time applications. We discuss the design of the language runtime system and our ...
详细信息
ISBN:
(纸本)1581135777
This paper describes the port of the ZPL parallel array language to the Mercury-RACE, a multicomputing system designed for embedded real-Time applications. We discuss the design of the language runtime system and our strategy on mapping ZPL operators to hardware communication. We also show performance results of the ZPL parallel matrix inverse algorithm on the target architecture.
Agent-oriented programming is a programming model proposed to design complex programs. To simplify the implementation of agent systems, several new agent-oriented programminglanguages (AOPL) have been proposed. Usual...
详细信息
ISBN:
(纸本)9781581134803
Agent-oriented programming is a programming model proposed to design complex programs. To simplify the implementation of agent systems, several new agent-oriented programminglanguages (AOPL) have been proposed. Usually, these languages are developed using informal techniques and implemented in an "ad hoc" manner. The lack of formal methods and adequate analysis tools makes the design of these languages a hard and error prone task. This paper shows the advantages of using action semantics and related tools in the project of new AOPLs. Action semantics is a formalism used to describe programminglanguages that produces specifications that can be easily extended and reused in new projects. To demonstrate this action semantics approach, we have developed a specification of some basic agent concepts as well as a tool that aids the validation and execution of action semantics specifications. Using this approach, the programminglanguagedesigner obtains a powerful design environment to propose and test new kinds of agent concepts, components and constructors.
Satisfiability of complex word-level formulas often arises as a problem in formal verification of hardware designs described at the register transfer level (RTL). Even though most designs are described in a hardware d...
详细信息
ISBN:
(纸本)0769514413
Satisfiability of complex word-level formulas often arises as a problem in formal verification of hardware designs described at the register transfer level (RTL). Even though most designs are described in a hardware description language (HDL), like Verilog or VHDL, usually, this problem is solved in the Boolean domain, using Boolean solvers. These engines often show a poor performance for data path verification. Instead of solving the problem at the bit-level, a method is proposed to transform conjunctions of bitvector equalities and inequalities into sets of integer linear arithmetic constraints. It is shown that it is possible to correctly model the modulo semantics of HDL operators as linear constraints. Integer linear constraint solvers are used as a decision procedure for bitvector arithmetic. In the implementation we focus on verification of arithmetic properties of Verilog-HDL designs. Experimental results show considerable performance advantages over high-end Boolean SAT solver approaches. The speed-up on the benchmarks studied is several orders of magnitude.
Collaborative design review is an important part of architectural design work. The Space Pen system supports annotation and drawing on (and inside) 3D VRML/Java models using a regular Web browser to exchange text and ...
详细信息
ISBN:
(纸本)1581134541
Collaborative design review is an important part of architectural design work. The Space Pen system supports annotation and drawing on (and inside) 3D VRML/Java models using a regular Web browser to exchange text and sketched annotations for review.
暂无评论