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Input Responsiveness: Using Canary Inputs to Dynamically Steer Approximation

acm sigplan NOTICES 2016年第6期51卷 161-176页

作者： Laurenzano, Michael A. Hill, Parker Samadi, Mehrzad Mahlke, Scott Mars, Jason Tang, Lingjia Univ Michigan Dept Elect Engn & Comp Sci Ann Arbor MI 48109 USA

This paper introduces Input Responsive Approximation ( IRA), an approach that uses a canary input - a small program input carefully constructed to capture the intrinsic properties of the original input - to automatically control how program approximation is applied on an input-by-input basis. Motivating this approach is the observation that many of the prior techniques focusing on choosing how to approximate arrive at conservative decisions by discounting substantial differences between inputs when applying approximation. The main challenges in overcoming this limitation lie in making the choice of how to approximate both effectively (e.g., the fastest approximation that meets a particular accuracy target) and rapidly for every input. With IRA, each time the approximate program is run, a canary input is constructed and used dynamically to quickly test a spectrum of approximation alternatives. Based on these runtime tests, the approximation that best fits the desired accuracy constraints is selected and applied to the full input to produce an approximate result. We use IRA to select and parameterize mixes of four approximation techniques from the literature for a range of 13 image processing, machine learning, and data mining applications. Our results demonstrate that IRA significantly outperforms prior approaches, delivering an average of 10.2x speedup over exact execution while minimizing accuracy losses in program outputs.

关键词： Performance Runtime Systems Compilers Approximate Computing Performance Experimentation design

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Fault-tolerant typed assembly language

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acm sigplan NOTICES 2007年第6期42卷 42-53页

作者： Perry, Frances Mackey, Lester Reis, George A. Ligatti, Jay August, David I. Walker, David Princeton Univ Dept Comp Sci & Elect Engn Princeton NJ 08544 USA Univ S Florida Dept Comp Sci & Comp Engn Tampa FL 33620 USA

A transient hardware fault occurs when an energetic particle strikes a transistor, causing it to change state. Although transient faults do not permanently damage the hardware, they may corrupt computations by altering stored values and signal transfers. In this paper, we propose a new scheme for provably safe and reliable computing in the presence of transient hardware faults. In our scheme, software computations are replicated to provide redundancy while special instructions compare the independently computed results to detect errors before writing critical data. In stark contrast to any previous efforts in this area, we have analyzed our fault tolerance scheme from a formal, theoretical perspective. To be specific, first, we provide an operational semantics for our assembly language, which includes a precise formal definition of our fault model. Second, we develop an assembly-level type system designed to detect reliability problems in compiled code. Third, we provide a formal specification for program fault tolerance under the given fault model and prove that all well-typed programs are indeed fault tolerant. In addition to the formal analysis, we evaluate our detection scheme and show that it only takes 34% longer to execute than the unreliable version.

关键词： languages reliability theory verification transient hardware faults soft faults fault tolerance type systems typed assembly language

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Parametric polymorphism for Java: a reflective solution 98

Parametric polymorphism for Java: a reflective solution

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proceedings of the 13th acm sigplan conference on Object-oriented programming, systems, languages, and applications

作者： Jose H. Solorzano Suad Alagić Computer Science Department Wichita State University Wichita KS

ISBN: (纸本)9781581130058

A number of inadequacies of existing implementation techniques for extending Java™ with parametric polymorphism are revealed. Homogeneous translations are the most space-efficient but they are not compatible with reflection, some models of persistence, and multiple dispatch. Heterogeneous translations, on the other hand, can potentially produce large amounts of redundant information. implementation techniques that address these concerns are developed. In languages that support run-time reflection, an adequate implementation of parametric, bounded and F-bounded polymorphism is shown to require (reflective) run-time support. In Java, extensions to the core classes are needed. This is in spite of the fact that parametric polymorphism is intended to be managed statically.

关键词： language design and implementation reflection persistence

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Mdspan in C++: A Case Study in the Integration of Performance Portable Features into International language Standards

Mdspan in C++: A Case Study in the Integration of Performanc...

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2019 IEEE/acm International Workshop on Performance, Portability and Productivity in HPC, P3HPC 2019

作者： Hollman, David Lelbach, Bryce Edwards, H. Carter Hoemmen, Mark Sunderland, Daniel Trott, Christian R. Scalable Modeling and Analysis Sandia National Laboratories LivermoreCA United States NVIDIA Corp. Santa ClaraCA United States Engineering Sciences Sandia National Laboratories AlbuquerqueNM United States Center for Computing Research Sandia National Laboratories AlbuquerqueNM United States

ISBN: (纸本)9781728160030

Multi-dimensional arrays are ubiquitous in high-performance computing (HPC), but their absence from the C++ language standard is a long-standing and well-known limitation of their use for HPC. This paper describes the design and implementation of mdspan, a proposed C++ standard multidimensional array view (planned for inclusion in C++23). The proposal is largely inspired by work done in the Kokkos project - a C++ performance-portable programming model de- ployed by numerous HPC institutions to prepare their code base for exascale-class supercomputing systems. This paper describes the final design of mdspan af- ter a five-year process to achieve consensus in the C++ community. In particular, we will lay out how the design addresses some of the core challenges of performance-portable programming, and how its cus- tomization points allow a seamless extension into areas not currently addressed by the C++ Standard but which are of critical importance in the heterogeneous computing world of today's systems. Finally, we have provided a production-quality implementation of the proposal in its current form. This work includes several benchmarks of this implementation aimed at demon- strating the zero-overhead nature of the modern design. © 2019 IEEE.

关键词： C++ (programming language)

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Cross-Layer Memory Management for Managed language Applications

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acm sigplan NOTICES 2015年第10期50卷 488-504页

作者： Jantz, Michael R. Robinson, Forrest J. Kulkarni, Prasad A. Doshi, Kshitij A. Univ Tennessee Knoxville TN 37996 USA Univ Kansas Lawrence KS 66045 USA Intel Corp Santa Clara CA 95051 USA

Performance and energy efficiency in memory have become critically important for a wide range of computing domains. However, it is difficult to control and optimize memory power and performance because these effects depend upon activity across multiple layers of the vertical execution stack. To address this challenge, we construct a novel and collaborative framework that employs object placement, cross-layer communication, and page-level management to effectively distribute application objects in the DRAM hardware to achieve desired power/performance goals. In this work, we describe the design and implementation of our framework, which is the first to integrate automatic object profiling and analysis at the application layer with fine-grained management of memory hardware resources in the operating system. We demonstrate the utility of our framework by employing it to more effectively control memory power consumption. We design a custom memory-intensive workload to show the potential of our approach. Next, we develop sampling and profiling-based analyses and modify the code generator in the HotSpot VM to understand object usage patterns and automatically determine and control the placement of hot and cold objects in a partitioned VM heap. This information is communicated to the operating system, which uses it to map the logical application pages to the appropriate DRAM ranks according to user-defined provisioning goals. We evaluate our framework and find that it achieves our test goal of significant DRAM energy savings across a variety of workloads, without any source code modifications or recompilations.

关键词： design Experimentation Performance Cross-layer Power Efficiency DRAM HotSpot

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BIGMAC II: A FORTRAN language augmentation tool 4

BIGMAC II: A FORTRAN language augmentation tool

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4th International Workshop on Real-Time Ada Issues, IRTAW 1990

作者： Myers, Eugene W. Osterweil, Leon J. Department of Computer Science University of Colorado BoulderCO80309 United States

ISBN: (纸本)0897911466

This paper describes the motivation, design, implementation, and some preliminary performance characteristics of BIGMAC II, a macro definition capability for creating language enhancers and translators. BIGMAC II enables the user to specify transformations through STREX, a FORTRAN-like language, which enables the specification of macros which are then used to interpretively alter incoming programs. BIGMAC II is specially adapted to the processing of FORTRAN programs. This paper shows how it can be used as a deprocedurizer (or flattener), a dialect-to-dialect translator, a portability and version control aid, and a device for creating language enhancements as sophisticated as new control structures and abstract data types. © 1981 IEEE Computer Society. All rights reserved.

关键词： FORTRAN (programming language)

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Optimising AspectJ

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acm sigplan NOTICES 2005年第6期40卷 117-128页

作者： Avgustinov, P Christensen, AS Hendren, L Kuzins, S Lhoták, J Lhoták, O de Moor, O Sereni, D Sittampalam, G Tibble, J Univ Oxford Programming Tools Grp Oxford OX1 2JD England Univ Aarhus Aarhus Denmark McGill Univ Sable Res Grp Montreal PQ Canada

AspectJ, an aspect-oriented extension of Java, is becoming increasingly popular. However, not much work has been directed at optimising compilers for AspectJ. Optimising AOP languages provides many new and interesting challenges for compiler writers, and this paper identifies and addresses three such challenges. First, compiling around advice efficiently is particularly challenging. We provide a new code generation strategy for around advice, which (unlike previous implementations) both avoids the use of excessive inlining and the use of closures. We show it leads to more compact code, and can also improve run-time performance. Second, woven code sometimes includes run-time tests to determine whether advice should execute. One important case is the cflow pointcut which uses information about the dynamic calling context. Previous techniques for cflow were very costly in terms of both time and space. We present new techniques to minimise or eliminate the overhead of cflow using both intra- and inter-procedural analyses. Third, we have addressed the general problem of how to structure an optimising compiler so that traditional analyses can be easily adapted to the AOP setting. We have implemented all of the techniques in this paper in abc, our AspectBench Compiler for AspectJ, and we demonstrate significant speedups with empirical results. Some of our techniques have already been integrated into the production AspectJ compiler, ajc 1.2.

关键词： AspectJ optimization aspect-oriented programming language cflow pointcut around advice

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The implementation of the Cilk-5 multithreaded language 98

The implementation of the Cilk-5 multithreaded language

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proceedings of the acm sigplan 1998 conference on programming language design and implementation

作者： Matteo Frigo Charles E. Leiserson Keith H. Randall MIT Laboratory for Computer Science 545 Technology Square Cambridge Massachusetts

ISBN: (纸本)9780897919876

The fifth release of the multithreaded language Cilk uses a provably good "work-stealing" scheduling algorithm similar to the first system, but the language has been completely redesigned and the runtime system completely reengineered. The efficiency of the new implementation was aided by a clear strategy that arose from a theoretical analysis of the scheduling algorithm: concentrate on minimizing overheads that contribute to the work, even at the expense of overheads that contribute to the critical path. Although it may seem counterintuitive to move overheads onto the critical path, this "work-first" principle has led to a portable Cilk-5 implementation in which the typical cost of spawning a parallel thread is only between 2 and 6 times the cost of a C function call on a variety of contemporary machines. Many Cilk programs run on one processor with virtually no degradation compared to equivalent C programs. This paper describes how the work-first principle was exploited in the design of Cilk-5's compiler and its runtime system. In particular, we present Cilk-5's novel "two-clone" compilation strategy and its Dijkstra-like mutual-exclusion protocol for implementing the ready deque in the work-stealing scheduler.

关键词： parallel computing programming language runtime system critical path multithreading work

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Fast RMWs for TSO: Semantics and implementation 13

Fast RMWs for TSO: Semantics and Implementation

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acm sigplan conference on programming language design and implementation

作者： Bharghava Rajaram Vijay Nagarajan Susmit Sarkar Marco Elver University of Edinburgh University of St Andrews

ISBN: (纸本)9781450320146

Read-Modify-Write (RMW) instructions are widely used as the building blocks of a variety of higher level synchronization constructs, including locks, barriers, and lock-free data structures. Unfortunately, they are expensive in architectures such as x86 and SPARC which enforce (variants of) Total-Store-Order (TSO). A key reason is that RMWs in these architectures are ordered like a memory barrier, incurring the cost of a write-buffer drain in the critical path. Such strong ordering semantics are dictated by the requirements of the strict atomicity definition (type-1) that existing TSO RMWs use. Programmers often do not need such strong semantics. Besides, weakening the atomicity definition of TSO RMWs, would also weaken their ordering - thereby leading to more efficient hardware implementations. In this paper we argue for TSO RMWs to use weaker atomicity definitions - we consider two weaker definitions: type-2 and type-3, with different relaxed ordering differences. We formally specify how such weaker RMWs would be ordered, and show that type-2 RMWs, in particular, can seamlessly replace existing type-1 RMWs in common synchronization idioms - except in situations where a type-1 RMW is used as a memory barrier. Recent work has shown that the new C/C++11 concurrency model can be realized by generating conventional (type-1) RMWs for C/C++11 SC-atomic-writes and/or SC-atomic-reads. We formally prove that this is equally valid using the proposed type-2 RMWs; type-3 RMWs, on the other hand, could be used for SC-atomic-reads (and optionally SC-atomic-writes). We further propose efficient microarchitectural implementations for type-2 (type-3) RMWs - simulation results show that our implementation reduces the cost of an RMW by up to 58.9% (64.3%), which translates into an overall performance improvement of up to 9.0% (9.2%) on a set of parallel programs, including those from the SPLASH-2, PARSEC, and STAMP benchmarks.

关键词： Read-Modify-Write (RMW) Total-Store-Order (TSO) Atomics design Performance Experimentation

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The design of a class mechanism for Moby 99

The design of a class mechanism for Moby

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proceedings of the acm sigplan 1999 conference on programming language design and implementation

作者： Kathleen Fisher John Reppy AT&T Labs Research Bell Labs Lucent Technologies

ISBN: (纸本)9781581130942

Typical class-based languages, such as C++ and JAVA, provide complex class mechanisms but only weak module systems. In fact, classes in these languages incorporate many of the features found in richer module mechanisms. In this paper, we describe an alternative approach to designing a language that has both classes and modules. In our design, we rely on a rich ML-style module system to provide features such as visibility control and parameterization, while providing a minimal class mechanism that includes only those features needed to support inheritance. Programmers can then use the combination of modules and classes to implement the full range of class-based features and idioms. Our approach has the advantage that it provides a full-featured module system (useful in its own right), while keeping the class mechanism quite *** have incorporated this design in MOBY, which is an ML-style language that supports class-based object-oriented programming. In this paper, we describe our design via a series of simple examples, show how various class-based features and idioms are realized in MOBY, compare our design with others, and sketch its formal semantics.

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