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proceedings of the 1998 Annual acm sigplan conference on programming language design and implementation, PLDI

作者： Diwan, Amer McKinley, Kathryn S. Moss, J.Eliot B. Stanford Univ Stanford CA United States

ISBN: (纸本)9780897919876

This paper evaluates three alias analyses based on programming language types. The first analysis uses type compatibility to determine aliases. The second extends the first by using additional high-level information such as field names. The third extends the second with a flow-insensitive analysis. Although other researchers suggests using types to disambiguate memory references, none evaluates its effectiveness. We perform both static and dynamic evaluations of type-based alias analyses for Modula-3, a statically-typed type-safe language. The static analysis reveals that type compatibility alone yields a very imprecise alias analysis, but the other two analyses significantly improve alias precision. We use redundant load elimination (RLE) to demonstrate the effectiveness of the three alias algorithms in terms of the opportunities for optimization, the impact on simulated execution times, and to compute an upper bound on what a perfect alias analysis would yield. We show modest dynamic improvements for (RLE), and more surprisingly, that on average our alias analysis is within 2.5% of a perfect alias analysis with respect to RLE on 8 Modula-3 programs. These results illustrate that to explore thoroughly the effectiveness of alias analyses, researchers need static, dynamic, and upper-bound analysis. In addition, we show that for type-safe languages like Modula-3 and Java, a fast and simple alias analysis may be sufficient for many applications.

关键词： Computer systems programming

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Multiprocessor smalltalk: A case study of a multiprocessor-based programming environment 88

Multiprocessor smalltalk: A case study of a multiprocessor-b...

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acm sigplan conference on programming language design and implementation, PLDI 1988

作者： Pallas, Joseph Ungar, David Computer Systems Laboratory Stanford University StanfordCA94305 United States

ISBN: (纸本)0897912691

We have adapted an interactive programming system (Smalltalk) to a multiprocessor (the Firefly). The task was not as difficult as might be expected, thanks to the application of three basic strategies: serialization, replication, and reorganization. Serialization of access to resources disallows concurrent access. Replication provides multiple instances of resources when they cannot or should not be serialized. Reorganization allows us to restructure part of the system when the other two strategies cannot be applied. We serialized I/O, memory allocation, garbage collection, and scheduling, we replicated the interpreter process, software caches, and a free-list, and we reorganized portions of the scheduling system to deal with some deep-seated assumptions. Our changes yielded a fairly low static overhead. We attribute our success to the choice of a small, flexible operating system, a set of constraints which simplified the problem, and the versatility of the three strategies for dealing with concurrency. The current system has a moderate amount of overhead when parallelism is being used-25% to 65%. It is acceptable, but we believe it can be improved. © 1988 acm.

关键词： Scheduling

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GYPSY: A language for specification and implementation of verifiable programs

GYPSY: A language for specification and implementation of ve...

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acm conference on language design for Reliable Software 1977

作者： Ambler, Allen L. Good, Donald I. Browne, James C. Burger, Wilhelm F. Cohen, Richard M. Hoch, Charles G. Wells, Robert E. Amdahl Corporation United States University of Texas at Austin United States

An introduction to the Gypsy programming and specification language is given. Gypsy is a high-level programming language with facilities for general programming and also for systems programming that is oriented toward communications processing. This includes facilities for concurrent processes and process synchronization. Gypsy also contains facilities for detecting and processing errors that are due to the actual running of the program in an imperfect environment. The specification facilities give a precise way of expressing the desired properties of the Gypsy programs. All of the features of Gypsy are fully verifiable, either by formal proof or by validation at run time. An overview of the language design and a detailed example program are given. © 1977 Association for Computing Machinery. All rights reserved.

关键词： Formal specification

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A region-based compilation technique for dynamic compilers

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acm TRANSACTIONS ON programming languageS AND SYSTEMS 2006年第1期28卷 134-174页

作者： Suganuma, T Yasue, T Nakatani, T IBM Japan Ltd Tokyo Res Lab Yamato 2428502 Japan

Method inlining and data flow analysis are two major optimization components for effective program transformations, but they often suffer from the existence of rarely or never executed code contained in the target method. One major problem lies in the assumption that the compilation unit is partitioned at method boundaries. This article describes the design and implementation of a region-based compilation technique in our dynamic optimization framework, in which the compiled regions are selected as code portions without rarely executed code. The key parts of this technique are the region selection, partial inlining, and region exit handling. For region selection, we employ both static heuristics and dynamic profiles to identify and eliminate rare sections of code. The region selection process and method inlining decisions are interwoven, so that method inlining exposes other targets for region selection, while the region selection in the inline target conserves the inlining budget, allowing more method inlining to be performed. The inlining process can be performed for parts of a method, not just for the entire body of the method. When the program attempts to exit from a region boundary, we trigger recompilation and then use on-stack replacement to continue the execution from the corresponding entry point in the recompiled code. We have implemented these techniques in our Java JIT compiler, and conducted a comprehensive evaluation. The experimental results show that our region-based compilation approach achieves approximately 4% performance improvement on average, while reducing the compilation overhead by 10% to 30%, in comparison to the traditional method-based compilation techniques.

关键词： performance design experimentation region-based compilation dynamic compilation partial inlining on-stack replacement JIT compiler

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A different kind of programming languages course

A different kind of programming languages course

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OOPSLA 2009 Companion - 24th Annual acm conference on Object-Oriented programming, Systems, languages and Applications, OOPSLA 2009

作者： Yeager, Dorian P. Grove City College Grove City PA United States

ISBN: (纸本)9781605587660

The complexity of the well-explored regions of the programming language design space has increased substantially in the last twenty-five years with the addition of a large number of object-oriented programming languages (OOPLs). This design domain was already known to be large and complex before OOPLs came on the scene, and many offerings of the standard programming languages course before that time did not even mention the object-oriented programming (OOP) paradigm. Now that OOP has become mainstream, undergraduate programs which include a course on programming language design and implementation have responded by expanding their existing course or by jettisoning some of the alternative ideas in favor of expanded coverage of OOPLs. There are two facts, however, which must be confronted as we consider what information we would like to pass on to our students in this fascinating area of our discipline. The first is that the design space represented by OOPLs is large enough to justify a separate course, and the second is that a large number of ideas from other language paradigms appear in subsets of well-known languages for OOP. This paper presents a course in the design and implementation of programming languages that (as OOP itself did in the late eighties) turns some accepted notions "inside out" by proposing that the entire course be presented from the OOP point of view. Such a course has been offered by Grove City College for a decade and has matured into a very effective means of communicating essential programming language design and implementation ideas to our students. The course could be offered as the only advanced course in the area, as one course in a two-semester sequence, or as an alternative to the traditional course. Copyright © 2009 acm.

关键词： Object oriented programming

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A formal concurrency model based architecture description language for synthesis of software development tools 04

A formal concurrency model based architecture description la...

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conference on languages, Compilers and Tools for Embedded Systems

作者： Qin, W Rajagopalan, S Malik, S Princeton Univ Dept Elect Engn Princeton NJ 08544 USA

ISBN: (纸本)9781581138061

Rapidly increasing design and manufacturing non-recurring engineering (NRE) costs are prompting a shift in electronic design from hardwired application specific integrated circuits (ASICs) to the use of software on programmable platforms. However, in order to minimize the power and performance overhead of such processors, we are seeing the introduction of domain or application specific processors such as network and communication processors. The design of such specialized processors requires software development tools such as simulators and compilers. In order to quickly develop these tools for multiple design points under consideration, it is highly desirable to have them synthesized from formal processor descriptions written in Architecture Description languages (ADLs). In this paper, we present the Mescal Architecture Description language (MADL). MADL features a two-layer structure, a core layer and an annotation layer. The core layer is based on a formal and flexible microprocessor model-the operation state machine (OSM), which enables MADL to express the concurrency at the operation execution level for a wide range of architectures. We address the challenges faced in designing the core layer to combine the OSM model with techniques for achieving compact processor descriptions. The annotation layer features a generic syntax that allows creating annotation schemes to specify implementation dependent or tool specific information. To show the effectiveness of MADL, we present an MADL-based simulator synthesis framework that has been used to generate efficient cycle accurate simulators and instruction set simulators with very low development effort. We also describe our annotation schemes that enable the extraction of architecture properties for use in instruction scheduling and integer-linear-programming based register allocation. Our experimental results demonstrate the efficacy of MADL as a practical and promising language for the development of programmable plat

关键词： design languages verification

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SWOOP: Software-Hardware Co-design for Non-speculative, Execute-Ahead, In-Order Cores 2018

SWOOP: Software-Hardware Co-design for Non-speculative, Exec...

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39th acm sigplan conference on programming language design and implementation (PLDI)

作者： Tran, Kim-Anh Jimborean, Alexandra Carlson, Trevor E. Koukos, Konstantinos Sjalander, Magnus Kaxiras, Stefanos Uppsala Univ Uppsala Sweden Natl Univ Singapore Singapore Singapore Norwegian Univ Sci & Technol NTNU Trondheim Norway

ISBN: (纸本)9781450356985

Increasing demands for energy eiciency constrain emerging hardware. These new hardware trends challenge the established assumptions in code generation and force us to rethink existing software optimization techniques. We propose a cross-layer redesign of the way compilers and the underlying microarchitecture are built and interact, to achieve both performance and high energy eiciency. In this paper, we address one of the main performance bottlenecksDlast-level cache misses-through a software-hardware co-design. Our approach is able to hide memory latency and attain increased memory and instruction level parallelism by orchestrating a non-speculative, execute-ahead paradigm in software (SWOOP). While out-of-order (OoO) architectures attempt to hide memory latency by dynamically reordering instructions, they do so through expensive, power-hungry, speculative mechanisms. We aim to shift this complexity into software, and we build upon compilation techniques inherited from VLIW, software pipelining, modulo scheduling, decoupled access-execution, and software prefetching. In contrast to previous approaches we do not rely on either software or hardware speculation that can be detrimental to eiciency. Our SWOOP compiler is enhanced with lightweight architectural support, thus being able to transform applications that include highly complex control-low and indirect memory accesses. The efectiveness of our software-hardware co-design is proven on the most limited but energy-eicient micro-architectures, non-speculative, in-order execution (InO) cores, which rely entirely on compile-time instruction scheduling. We show that (1) our approach achieves its goal in hiding the latency of the last-level cache misses and improves performance by 34% and energy eiciency by 23% over the baseline InO core, competitive with an oracle InO core with a perfect last-level cache;(2) can even exceed the performance of the oracle core, by exposing a higher degree of memory and instruction level

关键词： hardware-software co-design compilers memory level parallelism

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A Lightweight Polyglot Code Transformation language

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proceedings OF THE acm ON programming languageS-PacmPL 2024年第PLDI期8卷 1288-1312页

作者： Ketkar, Ameya Ramos, Daniel Clapp, Lazaro Barik, Raj Ramanathan, Murali Krishna Gitar Inc San Mateo CA 94403 USA Carnegie Mellon Univ Pittsburgh PA 15213 USA Univ Lisbon INESC ID IST Lisbon Portugal Amazon Web Serv Santa Clara CA USA Uber Technol Inc San Francisco CA USA

In today's software industry, large-scale, multi-language codebases are the norm. This brings substantial challenges in developing automated tools for code maintenance tasks such as API migration or dead code cleanup. Tool builders often find themselves caught between two less-than-ideal tooling options: (1) language-specific code rewriting tools or (2) generic, lightweight match-replace transformation tools with limited expressiveness. The former leads to tool fragmentation and a steep learning curve for each language, while the latter forces developers to create ad-hoc, throwaway scripts to handle realistic tasks. To fill this gap, we introduce a new declarative domain-specific language (DSL) for expressing interdependent multi-language code transformations. Our key insight is that we can increase the expressiveness and applicability of lightweight match-replace tools by extending them to support for composition, ordering, and flow. We implemented an open-source tool for our language, called PolyglotPiranha, and deployed it in an industrial setting. We demonstrate its effectiveness through three case studies, where it deleted 210K lines of dead code and migrated 20K lines, across 1611 pull requests. We compare our DSL against state-of-the-art alternatives, and show that the tools we developed are faster, more concise, and easier to maintain.

关键词： Source-code rewriting Automated refactoring Code cleanup

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Prefetch injection based on hardware monitoring and object metadata

Prefetch injection based on hardware monitoring and object m...

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proceedings of the 2004 acm sigplan conference on programming language design and implementation (PLDI'04)

作者： Adl-Tabatabai, Ali-Reza Hudson, Richard L. Serrano, Mauricio J. Subramoney, Sreenivas Programming Systems Laboratory Microprocessor Technology Laboratory Intel Corporation Santa Clara CA United States

Cache miss stalls hurt performance because of the large gap between memory and processor speeds - for example, the popular server benchmark SPEC JBB2000 spends 45% of its cycles stalled waiting for memory requests on the Itanium® 2 processor. Traversing linked data structures causes a large portion of these stalls. Prefetching for linked data structures remains a major challenge because serial data dependencies between elements in a linked data structure preclude the timely materialization of prefetch addresses. This paper presents Mississippi Delta (MS Delta), a novel technique for prefetching linked data structures that closely integrates the hardware performance monitor (HPM), the garbage collector's global view of heap and object layout, the type-level metadata inherent in type-safe programs, and JIT compiler analysis. The garbage collector uses the HPM's data cache miss information to identify cache miss intensive traversal paths through linked data structures, and then discovers regular distances (deltas) between these linked objects. JIT compiler analysis injects prefetch instructions using deltas to materialize prefetch addresses. We have implemented MS Delta in a fully dynamic profile-guided optimization system: the StarJIT dynamic compiler and the ORP Java virtual machine, We demonstrate a 28-29% reduction in stall cycles attributable to the high-latency cache misses targeted by MS Delta and a speedup of 11-14% on the cache miss intensive SPEC JBB2000 benchmark.

关键词： Cache memory

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How to invent distributed implementation schemes of an object-based concurrent language - A transformational approach 88

How to invent distributed implementation schemes of an objec...

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1988 conference on Object-Oriented programming Systems, languages and Applications, OOPSLA 1988

作者： Shibayama, Etsuya Department of Information Science Tokyo Institute of Technology Oh-Okayama Meguro-ku Tokyo152 Japan

ISBN: (纸本)0897912845

A design and verification technique for implementation schemes of distributed software is presented. In this technique, first, the specification is modelled by a concurrent object system, that is, one which is constituted of computational agents with capability of concurrent execution and message passing. Then, such a concurrent object system is transformed into another concurrent object system, which models a sophisticated implementation scheme. Our transformation technique is mainly based on fusing and splitting concurrent objects. The correctness of transformation rules can be proven formally.

关键词： Message passing

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