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acm sigplan NOTICES 2007年第6期42卷 266-277页

作者： Gotsman, Alexey Berdine, Josh Cook, Byron Sagiv, Mooly Univ Cambridge Cambridge CB2 1TN England Microsoft Corp Redmond WA 98052 USA

We present the first shape analysis for multithreaded programs that avoids the explicit enumeration of execution-interleavings. Our approach is to automatically infer a resource invariant associated with each lock that describes the part of the heap protected by the lock. This allows us to use a sequential shape analysis on each thread. We show that resource invariants of a certain class can be characterized as least fixed points and computed via repeated applications of shape analysis only on each individual thread. Based on this approach, we have implemented a thread-modular shape analysis tool and applied it to concurrent heap-manipulating code from Windows device drivers.

关键词： abstract interpretation concurrent programming shape analysis static analysis

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The JastAdd Extensible Java Compiler

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acm sigplan NOTICES 2007年第10期42卷 1-17页

作者： Ekman, Torbjorn Hedin, Gorel Univ Oxford Programming Tools Grp Oxford England Lund Univ Dept Comp Sci S-22100 Lund Sweden

The JastAdd Extensible Java Compiler is a high quality Java compiler that is easy to extend in order to build static analysis tools for Java, and to extend Java with new language constructs. It is built modularly, with a Java 1.4 compiler that is extended to a Java 5 compiler. Example applications that are built as extensions include an alternative backend that generates Jimple, an extension of Java with AspectJ constructs, and the implementation of a pluggable type system for non-null checking and inference. The system is implemented using JastAdd, a declarative Java-like language. We describe the compiler architecture, the major design ideas for building and extending the compiler, in particular, for dealing with complex extensions that affect name and type analysis. Our extensible compiler compares very favorably concerning quality, speed and size with other extensible Java compiler frameworks. It also compares favorably in quality and size compared with traditional non-extensible Java compilers, and it runs within a factor of three compared to javac.

关键词： design languages OOP compilers extensibility declarative frameworks modularity Java

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Reliable and efficient programming abstractions for wireless sensor networks

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acm sigplan NOTICES 2007年第6期42卷 200-210页

作者： Kothari, Nupur Gummadi, Ramakrishna Millstein, Todd Govindan, Ramesh Univ So Calif Los Angeles CA 90089 USA Univ Calif Los Angeles Los Angeles CA 90024 USA

It is currently difficult to build practical and reliable programming systems out of distributed and resource-constrained sensor devices. The state of the art in today's sensornet programming is centered around a component-based language called nesC. nesC is a node-level language-a program is written for an individual node in the network-and nesC programs use the services of an operating system called TinyOS. We are pursuing an approach to programming sensor networks that significantly raises the level of abstraction over this practice. The critical change is one of perspective: rather than writing programs from the point of view of an individual node, programmers implement a central program that conceptually has access to the entire network. This approach pushes to the compiler the task of producing node-level programs that implement the desired behavior. We present the Pleiades programming language, its compiler, and its runtime. The Pleiades language extends the C language with constructs that allow programmers to name and access node-local state within the network and to specify simple forms of concurrent execution. The compiler and runtime system cooperate to implement Pleiades programs efficiently and reliably. First, the compiler employs a novel program analysis to translate Pleiades programs into message-efficient units of work implemented in nesC. The Pleiades runtime system orchestrates execution of these units, using TinyOS services, across a network of sensor nodes. Second, the compiler and runtime system employ novel locking, deadlock detection, and deadlock recovery algorithms that guarantee serializability in the face of concurrent execution. We illustrate the readability, reliability and efficiency benefits of the Pleiades language through detailed experiments, and demonstrate that the Pleiades implementation of a realistic application performs similar to a hand-coded nesC version that contains more than ten times as much code.

关键词： performance design languages reliability experimentation wireless sensor networks macroprogramming energy efficiency serializability deadlocks

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A type directed translation of MLF to system F

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acm sigplan NOTICES 2007年第9期42卷 111-122页

作者： Leijen, Daan Microsoft Research

The MLF type system by Le Botlan and Remy (2003) is a natural extension of Hindley-Milner type inference that supports full first-class polymorphism, where types can be of higher-rank and impredicatively instantiated. Even though MLF is theoretically very attractive, it has not seen widespread adoption. We believe that this partly because it is unclear how the rich language of MLF types relate to standard System F types. In this article we give the first type directed translation of MLF terms to System F terms. Based on insight gained from this translation, we also define "Rigid MLF" (MLF=), a restriction of MLF where all bound values have a System F type. The expressiveness of MLF= is the same as that of boxy types, but MLF= needs fewer annotations and we give a detailed comparison between them.

关键词： languages design theory first-class polymorphism system F MLF

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Automatic inversion generates divide-and-conquer parallel programs

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acm sigplan NOTICES 2007年第6期42卷 146-155页

作者： Morita, Kazutaka Morihata, Akimasa Matsuzaki, Kiminori Hu, Zhenjiang Takeichi, Masato Univ Tokyo Grad Sch Informat Sci & Technol Tokyo Japan

Divide-and-conquer algorithms are suitable for modern parallel machines, tending to have large amounts of inherent parallelism and working well with caches and deep memory hierarchies. Among others, list homomorphisms are a class of recursive functions on lists, which match very well with the divide-and-conquer paradigm. However, direct programming with list homomorphisms is a challenge for many programmers. In this paper, we propose and implement a novel system that can automatically derive cost-optimal list homomorphisms from a pair of sequential programs, based on the third homomorphism theorem. Our idea is to reduce extraction of list homomorphisms to derivation of weak right inverses. We show that a weak right inverse always exists and can be automatically generated from a wide class of sequential programs. We demonstrate our system with several nontrivial examples, including the maximum prefix sum problem, the prefix sum computation, the maximum segment sum problem, and the line-of-sight problem. The experimental results show practical efficiency of our automatic parallelization algorithm and good speedups of the generated parallel programs.

关键词： algorithms design languages divide-and-conquer parallelism inversion program transformation third homomorphism theorem

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Valgrind: A framework for heavyweight dynamic binary instrumentation

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acm sigplan NOTICES 2007年第6期42卷 89-100页

作者： Nethercote, Nicholas Seward, Julian Natl ICT Australia Melbourne Vic Australia OpenWorks LLP Cambridge England

Dynamic binary instrumentation (DBI) frameworks make it easy to build dynamic binary analysis (DBA) tools such as checkers and profilers. Much of the focus on DBI frameworks has been on performance;little attention has been paid to their capabilities. As a result, we believe the potential of DBI has not been fully exploited. In this paper we describe Valgrind, a DBI framework designed for building heavyweight DBA tools. We focus on its unique support for shadow values - a powerful but previously little-studied and difficult-to-implement DBA technique, which requires a tool to shadow every register and memory value with another value that describes it. This support accounts for several crucial design features that distinguish Valgrind from other DBI frameworks. Because of these features, lightweight tools built with Valgrind run comparatively slowly, but Valgrind can be used to build more interesting, heavyweight tools that are difficult or impossible to build with other DBI frameworks such as Pin and DynamoRIO.

关键词： design performance experimentation Valgrind Memcheck dynamic binary instrumentation dynamic binary analysis shadow values

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The exo VM system for automatic VM and application reduction

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acm sigplan NOTICES 2007年第6期42卷 352-362页

作者： Titzer, Ben L. Auerbach, Joshua Bacon, David F. Palsberg, Jens Univ Calif Los Angeles Compilers Grp Los Angeles CA 90025 USA

Embedded systems pose unique challenges to Java application developers and virtual machine designers. Chief among these challenges is the memory footprint of both the virtual machine and the applications that run within it. With the rapidly increasing set of features provided by the Java language, virtual machine designers are often forced to build custom implementations that make various tradeoffs between the footprint of the virtual machine and the subset of the Java language and class libraries that are supported. In this paper, we present the Exo VM, a system in which an application is initialized in a fully featured virtual machine, and then the code, data, and virtual machine features necessary to execute it are packaged into a binary image. Key to this process is feature analysis, a technique for computing the reachable code and data of a Java program and its implementation inside the VM simultaneously. The Exo VM reduces the need to develop customized embedded virtual machines by reusing a single VM infrastructure and automatically eliding the implementation of unused Java features on a per-program basis. We present a constraint-based instantiation of the analysis technique, an implementation in IBM's J9 Java VM, experiments evaluating our technique for the EEMBC benchmark suite, and some discussion of the individual costs of some of Java's features. Our evaluation shows that our system can reduce the non-heap memory allocation of the virtual machine by as much as 75%. We discuss VM and language design decisions that our work shows are important in targeting embedded systems, supporting the long-term goal of a common VM infrastructure spanning from motes to large servers.

关键词： pre-initialization embedded systems persistence dead code elimination static compilation static analysis VM design VM modularity feature analysis

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iTasks: Executable specifications of interactive work flow systems for the web

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acm sigplan NOTICES 2007年第9期42卷 141-152页

作者： Plasmeijer, Rinus Achten, Peter Koopman, Pieter Radboud Univ Nijmegen Inst Comp & Informat Sci Software Technol Dept NL-6525 ED Nijmegen Netherlands

In this paper we introduce the iTask system: a set of combinators to specify work flows in a pure functional language at a very high level of abstraction. Work flow systems are automated systems in which tasks are coordinated that have to be executed by humans and computers. The combinators that we propose support work flow patterns commonly found in commercial work flow systems. Compared with most of these commercial systems, the iTask system offers several advantages: tasks are statically typed, tasks can be higher order, the combinators are fully compositional, dynamic and recursive work flows can be specified, and last but not least, the specification is used to generate an executable web-based multi-user work flow application. With the iTask system, useful work flows can be defined which cannot be expressed in other systems: work can be interrupted and subsequently directed to other workers for further processing. The implementation is special as well. It is based on the Clean iData toolkit which makes it possible to create fully dynamic, interactive, thin client web applications. Thanks to the generic programming techniques used in the iData toolkit, the programming effort is reduced significantly: state handling, form rendering, user interaction, and storage management is handled automatically. The iTask system allows a task to be regarded as a special kind of persistent redex being reduced by the application user via task completion. The combinators control the order in which these redexes are made available to the application user. The system rewrites the persistent task redexes in a similar way as functions are rewritten in lazy functional languages.

关键词： design languages clean iData iTask

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Sketching stencils

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acm sigplan NOTICES 2007年第6期42卷 167-178页

作者： Solar-Lezama, Armando Arnold, Gilad Tancau, Liviu Bodik, Rastislav Saraswat, Vijay Seshia, Sanjit IBM Corp TJ Watson Res Ctr Armonk NY 10504 USA Univ Calif Berkeley Berkeley CA 94720 USA

Performance of stencil computations can be significantly improved through smart implementations that improve memory locality, computation reuse, or parallelize the computation. Unfortunately, efficient implementations are hard to obtain because they often involve non-traditional transformations, which means that they cannot be produced by optimizing the reference stencil with a compiler. In fact, many stencils are produced by code generators that were tediously handcrafted. In this paper, we show how stencil implementations can be produced with sketching. Sketching is a software synthesis approach where the programmer develops a partial implementation a sketch-and a separate specification of the desired functionality given by a reference (unoptimized) stencil. The synthesizer then completes the sketch to behave like the specification, filling in code fragments that are difficult to develop manually. Existing sketching systems work only for small finite programs, i.e., programs that can be represented as small Boolean circuits. In this paper, we develop a sketching synthesizer that works for stencil computations, a large class of programs that, unlike circuits, have unbounded inputs and outputs, as well as an unbounded number of computations. The key contribution is a reduction algorithm that turns a stencil into a circuit, allowing us to synthesize stencils using an existing sketching synthesizer.

关键词： languages design performance sketching stencil SAT

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Enforcing isolation and ordering in STM

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acm sigplan NOTICES 2007年第6期42卷 78-88页

作者： Shpeisman, Tatiana Menon, Vijay Adl-Tabatabai, Ali-Reza Balensiefer, Steven Grossman, Dan Hudson, Richard L. Moore, Katherine F. Saha, Bratin Intel Corp Programming Syst Lab Santa Clara CA 95054 USA Univ Washington Dept Comp Sci & Engn Seattle WA 98195 USA

Transactional memory provides a new concurrency control mechanism that avoids many of the pitfalls of lock-based synchronization. High-performance software transactional memory (STM) implementations thus far provide weak atomicity: Accessing shared data both inside and outside a transaction can result in unexpected, implementation-dependent behavior. To guarantee isolation and consistent ordering in such a system, programmers are expected to enclose all shared-memory accesses inside transactions. A system that provides strong atomicity guarantees isolation even in the presence of threads that access shared data outside transactions. A strongly-atomic system also orders transactions with conflicting non-transactional memory operations in a consistent manner. In this paper, we discuss some surprising pitfalls of weak atomicity, and we present an STM system that avoids these problems via strong atomicity. We demonstrate how to implement non-transactional data accesses via efficient read and write barriers, and we present compiler optimizations that further reduce the overheads of these barriers. We introduce a dynamic escape analysis that differentiates private and public data at runtime to make barriers cheaper and a static not-accessed-in-transaction analysis that removes many barriers completely. Our results on a set of Java programs show that strong atomicity can be implemented efficiently in a high-performance STM system.

关键词： algorithms measurement performance design experimentation languages transactional memory strong atomicity weak atomicity isolation ordering escape analysis compiler optimizations code generation virtual machines

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