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检索条件"任意字段=Proceedings of the ACM Sigplan 2003 Conference on Programming Language Design and Implementation"

共 1290 条记录，以下是681-690 订阅

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Cloning-based context-sensitive pointer alias analysis using binary decision diagrams

Cloning-based context-sensitive pointer alias analysis using...

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proceedings of the 2004 acm sigplan conference on programming language design and implementation (PLDI'04)

作者： Whaley, John Lam, Monica S. Computer Science Department Stanford University Stanford CA 94305 United States

This paper presents the first scalable context-sensitive, inclusion-based pointer alias analysis for Java programs. Our approach to context sensitivity is to create a clone of a method for every context of interest, and run a context-insensitive algorithm over the expanded call graph to get context-sensitive results. For precision, we generate a clone for every acyclic path through a program's call graph, treating methods in a strongly connected component as a single node. Normally, this formulation is hopelessly intractable as a call graph often has 1014 acyclic paths or more. We show that these exponential relations can be computed efficiently using binary decision diagrams (BDDs). Key to the scalability of the technique is a context numbering scheme that exposes the commonalities across contexts. We applied our algorithm to the most popular applications available on Sourceforge, and found that the largest programs, with hundreds of thousands of Java bytecodes, can be analyzed in under 20 minutes. This paper shows that pointer analysis, and many other queries and algorithms, can be described succinctly and declaratively using Datalog, a logic programming language. We have developed a system called bddbddb that automatically translates Datalog programs into highly efficient BDD implementations. We used this approach to develop a variety of context-sensitive algorithms including side effect analysis, type analysis, and escape analysis.

关键词： Java programming language

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Min-cut program decomposition for thread-level speculation

Min-cut program decomposition for thread-level speculation

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proceedings of the 2004 acm sigplan conference on programming language design and implementation (PLDI'04)

作者： Johnson, Troy A. Eigenmann, Rudolf Vijaykumar, T.N. Sch. of Elec. and Comp. Engineering Purdue University West Lafayette IN 47907 United States

With billion-transistor chips on the horizon, single-chip multiprocessors (CMPs) are likely to become commodity components. Speculative CMPs use hardware to enforce dependence, allowing the compiler to improve performance by speculating on ambiguous dependences without absolute guarantees of independence. The compiler is responsible for decomposing a sequential program into speculatively parallel threads, while considering multiple performance overheads related to data dependence, load imbalance, and thread prediction. Although the decomposition problem lends itself to a min-cut-based approach, the over-heads depend on the thread size, requiring the edge weights to be changed as the algorithm progresses. The changing weights make our approach different from graph-theoretic solutions to the general problem of task scheduling. One recent work uses a set of heuristics, each targeting a specific overhead in isolation, and gives precedence to thread prediction, without comparing the performance of the threads resulting from each heuristic. By contrast, our method uses a sequence of balanced min-cuts that give equal consideration to all the overheads, and adjusts the edge weights after every cut. This method achieves an (geometric) average speedup of 74% for floating-point programs and 23% for integer programs on a four-processor chip, improving on the 52% and 13% achieved by the previous heuristics.

关键词： Computer programming

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Parametric analysis for adaptive computation offloading

Parametric analysis for adaptive computation offloading

引用

conference on programming language design and implementation

作者： Wang, C Li, ZY Purdue Univ Dept Comp Sci W Lafayette IN 47907 USA

Many programs can be invoked under different execution options;input parameters and data files. Such different execution contexts may lead to strikingly different execution instances. The optimal code generation may be sensitive to the execution instances. In this paper, we show how to use parametric program analysis to deal with this issue for the optimization problem of computation offloading. Computation offloading has been shown to be an effective way to improve performance and energy saving on mobile devices. Optimal program partitioning for computation offloading depends on the tradeoff between the computation workload and the communication cost. The computation workload and communication requirement may change with different execution instances. Optimal decisions on program partitioning must be made at run time when sufficient information about workload and communication requirement becomes available. Our cost analysis obtains program computation workload and communication cost expressed as functions of run-time parameters, and our parametric partitioning algorithm finds the optimal program partitioning corresponding to different ranges of run-time parameters. At run time, the transformed program self-schedules its tasks on either the mobile device or the server, based on the optimal program partitioning that corresponds to the current values of run-time parameters. Experimental results on an HP IPAQ handheld device show that different run-time parameters can lead to quite different program partitioning decisions.

关键词： algorithms design experimentation measurement performance program partitioning program analysis program transformation computation offloading program profiling handheld devices adaptive optimization distributed system

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Mirrors: design principles for meta-level facilities of object-oriented programming languages

Mirrors: Design principles for meta-level facilities of obje...

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19th conference on Object-Oriented programming, Systems, languages, and Applications

作者： Bracha, G Ungar, D Sun Microsyst Inc Santa Clara CA 95054 USA Sun Microsyst Inc Mountain View CA 94043 USA

ISBN: (纸本)1581138318

We identify three design principles for reflection and metaprogramming facilities in object oriented programming languages. Encapsulation: meta-level facilities must encapsulate their implementation. Stratification: meta-level facilities must be separated from base-level functionality. Ontological correspondence: the ontology of meta-level facilities should correspond to the ontology of the language they manipulate. Traditional/mainstream reflective architectures do not follow these precepts. In contrast, reflective APIs built around the concept of mirrors are characterized by adherence to these three principles. Consequently, mirror-based architectures have significant advantages with respect to distribution, deployment and general purpose metaprogramming.

关键词： design languages reflection metaprogramming mirrors Java self smalltalk

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Scalable lock-free dynamic memory allocation

Scalable lock-free dynamic memory allocation

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proceedings of the 2004 acm sigplan conference on programming language design and implementation (PLDI'04)

作者： Michael, Maged M. IBM Thomas J. Watson Research Center P.O. Box 218 Yorktown Heights NY 10598 United States

Dynamic memory allocators (malloc/free) rely on mutual exclusion locks for protecting the consistency of their shared data structures under multithreading. The use of locking has many disadvantages with respect to performance, availability, robustness, and programming flexibility. A lock-free memory allocator guarantees progress regardless of whether some threads are delayed or even killed and regardless of scheduling policies. This paper presents a completely lock-free memory allocator. It uses only widely-available operating system support and hardware atomic instructions. It offers guaranteed availability even under arbitrary thread termination and crash-failure, and it is immune to dead-lock regardless of scheduling policies, and hence it can be used even in interrupt handlers and real-time applications without requiring special scheduler support. Also, by leveraging some high-level structures from Hoard, our allocator is highly scalable, limits space blowup to a constant factor, and is capable of avoiding false sharing. In addition, our allocator allows finer concurrency and much lower latency than Hoard. We use PowerPC shared memory multiprocessor systems to compare the performance of our allocator with the default AIX 5.1 libc malloc, and two widely-used multithread allocators, Hoard and Ptmalloc. Our allocator outperforms the other allocators in virtually all cases and often by substantial margins, under various levels of parallelism and allocation patterns. Furthermore, our allocator also offers the lowest contention-free latency among the allocators by significant margins.

关键词： Computer programming

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Prefetch injection based on hardware monitoring and object metadata

Prefetch injection based on hardware monitoring and object m...

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proceedings of the 2004 acm sigplan conference on programming language design and implementation (PLDI'04)

作者： Adl-Tabatabai, Ali-Reza Hudson, Richard L. Serrano, Mauricio J. Subramoney, Sreenivas Programming Systems Laboratory Microprocessor Technology Laboratory Intel Corporation Santa Clara CA United States

Cache miss stalls hurt performance because of the large gap between memory and processor speeds - for example, the popular server benchmark SPEC JBB2000 spends 45% of its cycles stalled waiting for memory requests on the Itanium® 2 processor. Traversing linked data structures causes a large portion of these stalls. Prefetching for linked data structures remains a major challenge because serial data dependencies between elements in a linked data structure preclude the timely materialization of prefetch addresses. This paper presents Mississippi Delta (MS Delta), a novel technique for prefetching linked data structures that closely integrates the hardware performance monitor (HPM), the garbage collector's global view of heap and object layout, the type-level metadata inherent in type-safe programs, and JIT compiler analysis. The garbage collector uses the HPM's data cache miss information to identify cache miss intensive traversal paths through linked data structures, and then discovers regular distances (deltas) between these linked objects. JIT compiler analysis injects prefetch instructions using deltas to materialize prefetch addresses. We have implemented MS Delta in a fully dynamic profile-guided optimization system: the StarJIT dynamic compiler and the ORP Java virtual machine, We demonstrate a 28-29% reduction in stall cycles attributable to the high-latency cache misses targeted by MS Delta and a speedup of 11-14% on the cache miss intensive SPEC JBB2000 benchmark.

关键词： Cache memory

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A cost-driven compilation framework for speculative parallelization of sequential programs

A cost-driven compilation framework for speculative parallel...

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proceedings of the 2004 acm sigplan conference on programming language design and implementation (PLDI'04)

作者： Du, Zhao-Hui Yang, Chen Lim, Chu-Cheow Zhao, Qingyu Li, Xiao-Feng Ngai, Tin-Fook Intel China Research Center Intel China Ltd. Beijing China Programming Systems Lab Intel Corporation Santa Clara California United States

The emerging hardware support for thread-level speculation opens new opportunities to parallelize sequential programs beyond the traditional limits. By speculating that many data dependences are unlikely during runtime, consecutive iterations of a sequential loop can be executed speculatively in parallel. Runtime parallelism is obtained when the speculation is correct. To take full advantage of this new execution model, a program needs to be programmed or compiled in such a way that it exhibits high degree of speculative thread-level parallelism. We propose a comprehensive cost-driven compilation framework to perform speculative parallelization. Based on a misspeculation cost model, the compiler aggressively transforms loops into optimal speculative parallel loops and selects only those loops whose speculative parallel execution is likely to improve program performance. The framework also supports and uses enabling techniques such as loop unrolling, software value prediction and dependence profiling to expose more speculative parallelism. The proposed framework was implemented on the ORC compiler. Our evaluation showed that the cost-driven speculative parallelization was effective. Our compiler was able to generate good speculative parallel loops in ten Spec2000Int benchmarks, which currently achieve an average 8% speedup. We anticipate an average 15.6% speedup when all enabling techniques are in place.

关键词： Parallel processing systems

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A formal concurrency model based architecture description language for synthesis of software development tools 04

A formal concurrency model based architecture description la...

引用

conference on languages, Compilers and Tools for Embedded Systems

作者： Qin, W Rajagopalan, S Malik, S Princeton Univ Dept Elect Engn Princeton NJ 08544 USA

ISBN: (纸本)9781581138061

Rapidly increasing design and manufacturing non-recurring engineering (NRE) costs are prompting a shift in electronic design from hardwired application specific integrated circuits (ASICs) to the use of software on programmable platforms. However, in order to minimize the power and performance overhead of such processors, we are seeing the introduction of domain or application specific processors such as network and communication processors. The design of such specialized processors requires software development tools such as simulators and compilers. In order to quickly develop these tools for multiple design points under consideration, it is highly desirable to have them synthesized from formal processor descriptions written in Architecture Description languages (ADLs). In this paper, we present the Mescal Architecture Description language (MADL). MADL features a two-layer structure, a core layer and an annotation layer. The core layer is based on a formal and flexible microprocessor model-the operation state machine (OSM), which enables MADL to express the concurrency at the operation execution level for a wide range of architectures. We address the challenges faced in designing the core layer to combine the OSM model with techniques for achieving compact processor descriptions. The annotation layer features a generic syntax that allows creating annotation schemes to specify implementation dependent or tool specific information. To show the effectiveness of MADL, we present an MADL-based simulator synthesis framework that has been used to generate efficient cycle accurate simulators and instruction set simulators with very low development effort. We also describe our annotation schemes that enable the extraction of architecture properties for use in instruction scheduling and integer-linear-programming based register allocation. Our experimental results demonstrate the efficacy of MADL as a practical and promising language for the development of programmable plat

关键词： design languages verification

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The liberty structural specification language: A high-level modeling language for component reuse

The liberty structural specification language: A high-level ...

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conference on programming language design and implementation

作者： Vachharajani, M Vachharajani, N August, DI Princeton Univ Dept Comp Sci & Elect Engn Princeton NJ 08544 USA

Rapid exploration of the design space with simulation models is essential for quality hardware systems research and development. Despite striking commonalities across hardware systems, designers routinely fail to achieve high levels of reuse across models constructed in existing general-purpose and domain-specific languages. This lack of reuse adversely impacts hardware system design by slowing the rate at which ideas are evaluated. This paper presents an examination of existing languages to reveal their fundamental limitations regarding reuse in hardware modeling. With this understanding, a solution is described in the context of the design and implementation of the Liberty Structural Specification language (LSS), the input language for a publicly available high-level digital-hardware modeling tool called the Liberty Simulation Environment. LSS is the first language to enable low-overhead reuse by simultaneously supporting static inference based on hardware structure and flexibility via parameterizable structure. Through LSS, this paper also introduces a new type inference algorithm and a new programming language technique, called use-based specialization, which. in a manner analogous to type inference, customizes reusable components by statically inferring structural properties that otherwise would have had to have been specified manually.

关键词： Liberty Simulation Environment (LSE) Liberty Structural Specification (LSS) component reuse simulator construction structural modeling type inference use-based specialization

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Concrete syntax for objects - Domain-specific language embedding and assimilation without restrictions

Concrete syntax for objects - Domain-specific language embed...

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19th conference on Object-Oriented programming, Systems, languages, and Applications

作者： Bravenboer, M Visser, E Univ Utrecht Inst Comp & Informat Sci NL-3508 TB Utrecht Netherlands

ISBN: (纸本)1581138318

Application programmer's interfaces give access to domain knowledge encapsulated in class libraries without providing the appropriate notation for expressing domain composition. Since object-oriented languages are designed for extensibility and reuse, the language constructs are often sufficient for expressing domain abstractions at the semantic level. However, they do not provide the right abstractions at the syntactic level. In this paper we describe META BORG, a method for providing concrete syntax for domain abstractions to application programmers. The method consists of embedding domain-specific languages in a general purpose host language and assimilating the embedded domain code into the surrounding host code. Instead of extending the implementation of the host language, the assimilation phase implements domain abstractions in terms of existing APIs leaving the host language undisturbed. Indeed, META-BORG can be considered a method for promoting APIs to the language level. The method is supported by proven and available technology, i.e. the syntax definition formalism SDF and the program transformation language and toolset Stratego/XT. We illustrate the method with applications in three domains: code generation, XML generation, and user-interface construction.

关键词： languages design METABORG stratego SDF embedded languages syntax extension extensible syntax domain-specific languages rewriting meta programming concrete object syntax

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