The FEDERATE and HAL4SDV projects aim to address the growing importance of software in the automotive industry, positioning europe as a leader in the software-defined vehicle (SDV) domain. FEDERATE focuses on building...
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In this paper, there are many troubles in the study of secondary collision of flexible structures, and it is not enough to rely on the support of theoretical knowledge. Equivalent experiments and data analysis and cal...
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Ternary content addressable memory (TCAM), widely used in network routers and high-associativity caches, is gaining popularity in machine learning and data-analytic applications. Ferroelectric FETs (FeFETs) are a prom...
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ISBN:
(纸本)9798350323481
Ternary content addressable memory (TCAM), widely used in network routers and high-associativity caches, is gaining popularity in machine learning and data-analytic applications. Ferroelectric FETs (FeFETs) are a promising candidate for implementing TCAM owing to their high ON/OFF ratio, non-volatility, and CMOS compatibility. However, conventional single-gate FeFETs (SG-FeFETs) suffer from relatively high write voltage, low endurance, potential read disturbance, and face scaling challenges. Recently, a double-gate FeFET (DG-FeFET) has been proposed and outperforms SG-FeFETs in many aspects. This paper investigates TCAM design challenges specific to DG-FeFETs and introduces a novel 1.5T1Fe TCAM design based on DG-FeFETs. A 2-step search with early termination is employed to reduce the cell area and improve energy efficiency. A shared driver design is proposed to reduce the peripherals area. Detailed analysis and SPICE simulation show that the 1.5T1Fe DG-TCAM leads to superior search speed and energy efficiency. The 1.5T1Fe TCAM design can also be built with SG-FeFETs, which achieve search latency and energy improvement compared with 2FeFET TCAM.
The Mont-Blanc 2020 (MB2020) project has triggered the development of the next generation industrial processor for Big Data and High Performance Computing (HPC). MB2020 is paving the way to the future low-power europe...
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ISBN:
(纸本)9783981926354
The Mont-Blanc 2020 (MB2020) project has triggered the development of the next generation industrial processor for Big Data and High Performance Computing (HPC). MB2020 is paving the way to the future low-power european processor for exascale, defining the System-on-Chip (SoC) architecture and implementing new critical building blocks to be integrated in such an SoC. In this paper, we first present an overview of the MB2020 project, then we describe our experimental infrastructure, the requirements of relevant applications, and the IP blocks developed in the project. Finally, we present our emulation-based final demonstrator and explain how it integrates within our first generation of HPC processors.
With the ever increasing volume of private data residing on the cloud, privacy is becoming a major concern. Often times, sensitive information is leaked during a querying process between a client and an online server ...
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ISBN:
(纸本)9783981926354
With the ever increasing volume of private data residing on the cloud, privacy is becoming a major concern. Often times, sensitive information is leaked during a querying process between a client and an online server hosting a database;The query may leak information about the element the client is looking up, while sensitive details about the contents of its database can leak on the server side. The ability to check if an element is included in a database while maintaining both the client's and the server's privacy is known as the Private Membership test. In this context, we propose a method to privately query a database with computational complexity O(1) using Bloom filters and Homomorphic Encryption. The proposed methodology also enables post-encryption insertions and deletions without requiring a new setup. Experimental results show that our proposed solution has practical setup, insertion and deletion times for databases of up to a few million entries, with constant query time less than 0.3s, considering a false positive rate lower than 10(-3). We instantiate our methodology for a URL denylisting service, and demonstrate that it can provide solid security guarantees without affecting the user experience.
In advanced technology nodes, transistor performance is increasingly impacted by different types of design-time and run-time degradation. First, variation is inherent to the manufacturing process and is constant over ...
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ISBN:
(纸本)9781665421355
In advanced technology nodes, transistor performance is increasingly impacted by different types of design-time and run-time degradation. First, variation is inherent to the manufacturing process and is constant over the lifetime. Second, aging effects degrade the transistor over its whole life and can cause failures later on. Both effects impact the underlying electrical properties of which the threshold voltage is the most important. To estimate the degradation-induced changes in the transistor performance for a whole circuit, extensive SPICE simulations have to be performed. However, for large circuits, the computational effort of such simulations can become infeasible very quickly. Furthermore, the SPICE simulations cannot be delegated to circuit designers, since the required underlying transistor models cannot be shared due to their high confidentiality for the foundry. In this paper, we tackle these challenges at multiple levels, ranging from transistor to memory to circuit level. We employ machine learning and brain-inspired algorithms to overcome computational infeasibility and confidentiality problems, paving the way towards design close to the edge.
The proceedings contain 364 papers. The topics discussed include: research on access scheme for distributed photovoltaic cluster based on wireless communication;drone application in typical indoor warehouses during ep...
ISBN:
(纸本)9798350339161
The proceedings contain 364 papers. The topics discussed include: research on access scheme for distributed photovoltaic cluster based on wireless communication;drone application in typical indoor warehouses during epidemic spread;drug-target binding affinity prediction by combination graph neural network and BiLSTM;study on the influence of signboard on spatial signal of GlidePath;research on design method of subject of equipment operational test;research on day-ahead optimal dispatch of wind power-photovoltaic-thermal power-pumped storage combined power generation system;a new method for detecting the inner wall of water pipeline;and YOLOv5 for enhanced small object detection in paired IR and depth images.
Transistor aging is one of the major concerns that challenges designers in advanced technologies. It profoundly degrades the reliability of circuits during its lifetime as it slows down transistors resulting in errors...
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ISBN:
(纸本)9783981926354
Transistor aging is one of the major concerns that challenges designers in advanced technologies. It profoundly degrades the reliability of circuits during its lifetime as it slows down transistors resulting in errors due to timing violations unless large guardbands are included, which leads to considerable performance losses. When it comes to Neural Processing Units (NPUs), where increasing the inference speed is the primary goal, such performance losses cannot be tolerated. In this work, we are the first to propose a reliability-aware quantization to eliminate aging effects in NPUs while completely removing guardbands. Our technique delivers a graceful inference accuracy degradation over time while compensating for the aging-induced delay increase of the NPU. Our evaluation, over ten state-of-the-art neural network architectures trained on the ImageNet dataset, demonstrates that for an entire lifetime of 10 years, the average accuracy loss is merely 3%. In the meantime, our technique achieves 23% higher performance due to the elimination of the aging guardband.
Specifications for complex designs and their consistency are always a headache. Automated specification mining - including but not limited to generative AI - offers attractive solutions, but there are also various unm...
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ISBN:
(数字)9783982674100
ISBN:
(纸本)9798331534646
Specifications for complex designs and their consistency are always a headache. Automated specification mining - including but not limited to generative AI - offers attractive solutions, but there are also various unmet needs.
To increase the capacity of existing railway infras-tructure, the european Train Control System (ETCS) allows the introduction of virtual subsections. As of today, the planning of such systems is mainly done by hand. ...
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ISBN:
(数字)9783981926385
ISBN:
(纸本)9798350348606
To increase the capacity of existing railway infras-tructure, the european Train Control System (ETCS) allows the introduction of virtual subsections. As of today, the planning of such systems is mainly done by hand. Previous designautomation methods suffer from long runtimes in certain instances. However, late breaking results show that these methods can highly benefit from an iterative approach. An initial implementation of the resulting method is available in open-source as part of the Munich Train Control Toolkit at https://***/cda-tum/rntct.
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