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Compression of colour images by inter-band compensated prediction

iee proceedings-VISION image AND SIGNAL processing 2006年第2期153卷 237-243页

作者： Benierbah, S. Khamadja, M. Mentouri Univ Constantine Dept Elect SP Lab Constantine 250001 Algeria

A new technique, called inter-band compensated prediction, for coding colour and multispectral images is presented. It is suitable to use for coding any spectral domain and can code colour and multispectral images with any number of bands. This technique is based on the same principles as the very efficient motion compensated prediction largely used in video coding. Thus, each band is predicted in the spectral direction by compensating the differences in the neighbouring bands and then coding the prediction error spatially by another method. This is a forward adaptive prediction and the information used for compensation is coded as side information with prediction error. The comparison of the coding results with the state-of-the-art coding algorithms, based on spectral transformations, proves that this technique is very efficient and can even outperform them. In addition, compensation can be combined with any spatial coder that allows lossless, lossy and scalable coding of any spectral content of the image. It has also the advantages of being simple to implement and to use with parallel architectures.

关键词： image compression CODING theory ALGORITHMS SPECTRAL theory (Mathematics) TRANSFORMATIONS (Mathematics) MATHEMATICS

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parallel optical interconnects with mixed-signal OEIC and fibre arrays for high-speed communication

Parallel optical interconnects with mixed-signal OEIC and fi...

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Conference on Micro-Optics, VCSELs, and Photonic Interconnects

作者： Fey, D Hoppe, L Loos, A Förtsch, M Zimmermann, H Univ Jena Inst Comp Sci D-07743 Jena Germany

ISBN: (纸本)0819453765

We present a system for direct parallel optical data communication between integrated circuits on neighboured printed circuit boards based on a monolithic integrated CMOS smart pixel array, fibre arrays, and VCSELs. The advantage of our system versus backplane systems is the direct data transfer through the space avoiding planar and area consuming interconnections. The detector chip allows a data rate of 625 Mbit/s per link and is cycled by an optical clock. A simulation of the chip layout showed 260 % more performance versus electrical off-chip interconnects. In principle an 8x8 data transfer is feasible allowing a data rate of 40 Gbit/s. The detector combines an optical receiver array with a digital processor array which executes image processing algorithms. The optical receiver is formed by a PIN photodiode with a diameter of 40 mum, a transimpedance amplifier (TIA) and a decision-making postamplifier. The measured responsivity of the photodiode without antireflection coating is R=0.382 A/W at an optical wavelength of 670 nm. The TIA consists of a CMOS inverter and a PMOS transistor forming the feedback resistor. Together with the postamplifier, formed by a chain of five CMOS inverters and attaining digital CMOS levels, a data rate of 625 Mbit/s is achieved.

关键词： photonic interconnects smart pixel architectures fibre arrays CMOS photodetectors optoelectronic VLSI

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A VLSI architecture of EBCOT encoder for JPEG2000 5

A VLSI architecture of EBCOT encoder for JPEG2000

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5th International Conference on ASIC

作者： Liu, LB Li, DJ Zhang, L Wang, ZH Chen, HY Tsinghua Univ Inst Microelect Beijing 100084 Peoples R China

ISBN: (纸本)078037889X

Embedded Block Coding with Optimized Truncation (EBCOT) algorithm plays a basic and crucial part in JPEG2000 still image compression system. This paper proposes a VLSI architecture of EBCOT, in which a Dynamic Memory Control (DMC) strategy is used to reduce 60% scale of the on-chip wavelet coefficients storage. A parallel architecture is proposed to speed-up the coding process. This architecture can be used as a compact and efficient IP core for JPEG2000 VLSI implementation and various real-time image&video applications.

关键词： VLSI data compression digital signal processing chips encoding parallel architectures video coding

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Cellular architecture for Euclidean distance transformation

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iee proceedings-COMPUTERS AND DIGITAL TECHNIQUES 2000年第5期147卷 335-342页

作者： Sudha, N Nandi, S Sridharan, K Indian Inst Technol Dept Comp Sci & Engn Guwahati India Nanyang Technol Univ Sch Comp Engn Singapore 639798 Singapore

The Euclidean distance transform (EDT) is an important tool in image analysis. Previous work on computation of EDT is limited to sequential algorithms and parallel algorithms on general purpose architectures. The authors develop a fast parallel algorithm that is amenable for VLSI implementation. The VLSI architecture is presented. Results of implementation of the VLSI design in a commercial package are also presented, and confirm the speed and suitability of the new method for real-time applications.

关键词： parallel algorithm VLSI implementation parallel algorithms VLSI architecture VLSI Euclidean distance transformation image processing Optical, image and video signal processing Semiconductor integrated circuits image analysis Computer vision and image processing techniques parallel programming

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Efficient algorithm for 3-D image reconstruction over parallel and distributed architectures

Efficient algorithm for 3-D image reconstruction over parall...

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proceedings of the 1999 7th International Conference on image processing and its Applications

作者： Lakshminarayanan, S. Vijay, P. Mal, Sardar Padmanabhan, K. Indian Inst of Technology Madras India

In this paper, we have designed an efficient parallel algorithm for performing 3 D image reconstruction. In our framework, we have considered 3 D image to be reconstructed from a series of 2 D images, produced using Ultrasonography, Computer Tomography, etc. The paper discusses a general parallel algorithm for 3 D image reconstruction over CRCW, CREW and EREW PRAM models. We have developed efficient implementations of this algorithm over a vector machines, a distributed system comprising of a cluster of Work Stations and various interconnection network like mesh network and reconfigurable bus network. The performance of the above algorithms are tested using simulation experiments performed for 3 D image reconstruction of the vitreous region of the eye using ophthalmic ultrasonograms. A novel approximation scheme has also been proposed for a drastic improvement in performance for specific kinds of image. Results indicate the time complexities of the algorithms are in resonance with expected theoretical values and image obtained has a uncompromising level of accuracy.

关键词： image reconstruction

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proceedings of the 1998 iee colloquium on High Performance architectures for Real-Time image processing

Proceedings of the 1998 IEE Colloquium on High Performance A...

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proceedings of the 1998 iee colloquium on High Performance architectures for Real-Time image processing

The proceedings contains 15 papers from the iee colloquium on High Performance architectures for Real-time image processing. Topics discussed include: three dimensional reconfigurable image processing elements;processor architecture exploiting instruction level parallelism (ILP) with reduced instruction word;generic scalable image processing architectures;real-time multiscale convolution;discrete cosine transform cores;optical-flow detection;embedded image processing;specific pole placement techniques;real-time face recognition;real-time domain detection;real-time color transformation architecture;interactive medical image processing systems;and feature extraction algorithms.

关键词： image processing

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image and signal processing on the SIMD DAP Gamma II

Image and signal processing on the SIMD DAP Gamma II

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proceedings of the 1998 iee colloquium on High Performance architectures for Real-Time image processing

作者： Reddaway, Stewart F. Cambridge Parallel Processing Ltd Bracknell United Kingdom

The DAP Gamma II is a single instruction multiple data (SIMD) computer of either 1024 or 4096 processors which can be used as a component in a real-time system. The DAP can be programmed in a mix of high level languages (Fortran Plus and C++), low level languages, and library functions. For easy development and signal applications, there is also a development system based on Khoros. Various high-speed I/O interfaces are supported, however, the DAP contains a sufficiently large memory to allow sequences of whole-image operations to be performed without any intermediate I/O.

关键词： image processing

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Generic scaleable image processing architecture for real-time military applications

Generic scaleable image processing architecture for real-tim...

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proceedings of the 1998 iee colloquium on High Performance architectures for Real-Time image processing

作者： Smith, R.W.M. Defence Evaluation and Research Agency Malvern United Kingdom

This paper presents the design of a general-purpose, real-time image processing architecture, required for developing proof of principle demonstrations of military image processing applications. The main requirements of the architecture are to provide a scaleable, modular parallel processing framework, with very high bandwidth (at least 64 MByte s-1) point to point interprocessor communications. The architecture is heterogeneous, and a particular combination of processors may be chosen according to the application. A strong emphasis has been placed on the use of open standards, both for the hardware and software, and, where possible, COTS products are used.

关键词： image processing

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Interactive medical image processing system based on a hybrid computer architecture

Interactive medical image processing system based on a hybri...

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proceedings of the 1998 iee colloquium on High Performance architectures for Real-Time image processing

作者： O'Connor, K.B.R. Stewart, W.R. Ware, J.A. Univ Hospital of Wales United Kingdom

The paper presents an interactive segmentation system that uses a parallel processing architecture. Poor contrasts, variable tissue properties and complex-shaped structures make the isolation of meaningful regions of interest difficult. The interactive approach uses the human user's knowledge base to assist in image segmentation. The measurement of regions of interest enable the resultant output image to be quantified for clinical purposes. The graphical user interface - developed under Microsoft Windows - incorporates a mouse driven interactive display. A transputer based parallel processing engine is provided for the computationally intensive tasks of the system. These modules of the system communicate with each other using the Windows Dynamic Data Exchange (DDE) model.

关键词： image segmentation

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proceedings of the iee colloquium on parallel architectures for image processing

Proceedings of the IEE Colloquium on Parallel Architectures ...

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proceedings of the iee colloquium on parallel architectures for image processing

The proceedings contain 10 papers. Among the topics discussed are: color image processing and its industrial and biomedical applications;microprocessor chips;character recognition;pattern recognition;algorithms;parallel processing systems;pipeline processing systems;optical signal processing;parallel volume rendering;and transputer networks.

关键词： image processing

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