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检索条件"任意字段=Proceedings of the IEEE Workshop on Advances in Parallel and Distributed Systems"

共 1088 条记录，以下是221-230 订阅

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proceedings of the 2010 11th ieee/ACM International Conference on Grid Computing, Grid 2010

Proceedings of the 2010 11th IEEE/ACM International Conferen...

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2010 11th ieee/ACM International Conference on Grid Computing, Grid 2010

ISBN: (纸本)9781424493487

The proceedings contain 51 papers. The topics discussed include: power consumption and efficiency of cooling in a data center;accurate energy accounting for shared virtualized environments using PMC-based power modeling techniques;conflict-minimizing dynamic load balancing for P2P desktop grid;DSFS: decentralized security for large parallel file systems;a distributed storage system allowing application users to reserve I/O performance in advance for achieving SLA;evaluating caching and storage options on the Amazon web services cloud;an information services algorithm to heuristically summarize IP addresses for a distributed, hierarchical directory service;the globus toolkit R-tree for partial spatial replica selection;using a grid platform for solving large sparse linear systems over GF(2);and dynamic cloud provisioning for scientific grid workflows.

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2010 ieee 11th International workshop on Signal Processing advances in Wireless Communications, SPAWC 2010

2010 IEEE 11th International Workshop on Signal Processing A...

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2010 ieee 11th International workshop on Signal Processing advances in Wireless Communications, SPAWC 2010

ISBN: (纸本)9781424469901

The proceedings contain 128 papers. The topics discussed include: how signal processing will revolutionize future wireless network designs;multi-armed bandits: history, theory, and applications;linear transceiver design for interference alignment: complexity and computation;a nearly optimal resource allocation algorithm for the downlink of OFDMA 2-D networks with multicell interference;closed-loop hybrid MIMO system with joint transmit antenna and mode selection based on capacity maximization;transmit beamforming for MISO frequency-selective channels with per-antenna power constraint and limited-rate feedback;performance analysis of best relay selection scheme for amplify-and-forward cooperative networks in identical Nakagami-m channels;progressive uplink base station cooperation for backhaul constrained cellular systems;and a simple method for the simulation of autocorrelated and arbitrarily distributed envelope fading processes.

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A parallel skeleton library for embedded multicores

A parallel skeleton library for embedded multicores

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International workshop on Scheduling and Resource Management for parallel and distributed systems

作者： Liu, Xin Zhou, Jingyu Zhang, Daqiang Shen, Yao Guo, Minyi Department of Computer Science MOE-MS Key Laboratory for Intelligent Computing and Intelligent Systems Shanghai Jiao Tong University 800 Dongchuan Road Shanghai 200240 China

ISBN: (纸本)9780769541570

Many SoCs adopt multicore architectures. As a result, embedded programmers are also facing the challenge of parallel programming. We propose a parallel skeleton library that can be used on embedded multicores. Our library is implemented in standard C++ using template features. We propose two parallel skeletons to support common program patterns on multicores. In our skeleton library, programmers can easily choose underlying parallel implementations with no code changes. Experimental results show that many applications can take advantage of these two skeletons for performance improvement, sometimes better than hand-parallelized code. © 2010 ieee.

关键词： C++ (programming language)

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4th workshop on recent advances in intrusion-tolerant systems WRAITS 2010

4th workshop on recent advances in intrusion-tolerant system...

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2010 ieee/IFIP International Conference on Dependable systems and Networks, DSN 2010

作者： Correia, Miguel Pal, Patha University of Lisboa Portugal

ISBN: (纸本)9781424475018

Design and operational vulnerabilities are accepted as inevitable in today's complex computer systems. The distributed and networked nature of the systems that are currently in use and being developed facilitate discovery and exploitation of these flaws in increasingly new and easier ways. Intrusion Tolerance acknowledges that it is impossible to completely prevent attacks and intrusions, and that it is often impossible to accurately detect the act of intrusion and stop it early enough. Intrusion Tolerance research therefore aims to develop technologies that enable computer systems to continue to operate correctly despite attacks, and deny the attacker/intruder the success they seek. For instance, an intrusion-tolerant system may suffer partial loss of service or resources due to the attack, but it will continue to provide critical services in a degraded mode or trigger automatic mechanisms to regain and recover the compromised services and resources. Similar goals are being pursued in Survivability, Byzantine Fault Tolerance, Self-regenerative and Autonomic systems. © 2010 ieee.

关键词： Fault tolerance

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An auto-tuning framework for parallel multicore stencil computations

An auto-tuning framework for parallel multicore stencil comp...

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24th ieee International parallel and distributed Processing Symposium, IPDPS 2010

作者： Kamil, Shoaib Chan, Cy Oliker, Leonid Shall, John Williams, Samuel CRD/NERSC Lawrence Berkeley National Laboratory Berkeley CA 94720 United States EECS Department University of California at Berkeley Berkeley CA 94720 United States CSAIL Massachusetts Institute of Technology Cambridge MA 02139 United States

ISBN: (纸本)9781424464432

Although stencil auto-tuning has shown tremendous potential in effectively utilizing architectural resources, it has hitherto been limited to single kernel instantiations;in addition, the large variety of stencil kernels used in practice makes this computation pattern difficult to assemble into a library. This work presents a stencil auto-tuning framework that significantly advances programmer productivity by automatically converting a straightforward sequential Fortran 95 stencil expression into tuned parallel implementations in Fortran, C, or CUDA, thus allowing performance portability across diverse computer architectures, including the AMD Barcelona, Intel Nehalem, Sun Victoria Falls, and the latest NVIDIA GPUs. Results show that our generalized methodology delivers significant performance gains of up to 22× speedup over the reference serial implementation. Overall we demonstrate that such domain-specific auto-tuners hold enormous promise for architectural efficiency, programmer productivity, performance portability, and algorithmic adaptability on existing and emerging multicore systems. © 2010 ieee.

关键词： Computer architecture

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Implementation of Cryptographic Algorithms on a Grid Infrastructure

Implementation of Cryptographic Algorithms on a Grid Infrast...

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ieee International Conference on Automation, Quality and Testing, Robotics (AQTR)

作者： Cebuc, E. Suciu, A. Marton, K. Dolha, S. Muresan, L. Tech Univ Cluj Napoca Cluj Napoca Romania

ISBN: (纸本)9781424467259

Cryptographic algorithms are the fundamental building blocks of information security systems and their strength generally relies on the concept of computational complexity. But the process of increasing the computational effort needed by an adversary in order to break the provided security has a dramatic impact on the performance of the cryptographic application and sets a severe limit to the proposed security level due to the computational and data intensive operations which require extensive processing power and storage resources. Our solution is to link cryptography to an architecture specially designed to satisfy these demands, namely Grid computing, which has known an increasing popularity in recent years. The wide majority of cryptographic algorithms are designed sequentially and are not ready to embrace the enhancement brought by advances in parallel and distributed computing technologies and hence can not take the plunge to a higher performance level through parallel execution without a proper adjustment process. This paper presents our results on adjusting and implementing several well known cryptographic algorithms on a Grid infrastructure focusing on the achieved performance improvements.

关键词： parallel execution cryptographic algorithms public key private key bloc cipher stream cipher hash function random number generator Grid gLite middleware

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Non-intrusive performance analysis of parallel hardware accelerated applications on hybrid architectures

Non-intrusive performance analysis of parallel hardware acce...

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International workshop on Scheduling and Resource Management for parallel and distributed systems

作者： Dietrich, Robert Ilsche, Thomas Juckeland, Guido Technische Universität Dresden Dresden Germany

ISBN: (纸本)9780769541570

New high performance computing (HPC) applications recently have to face scalability over an increasing number of nodes and the programming of special accelerator hardware. Hybrid composition of large computing systems leads to a new dimension in complexity of software development. This paper presents a novel approach to gain insight into accelerator interaction and utilization without any changes to the application. It leverages well established methods for performance analysis to accelerator hardware, allowing a holistic view on performance bottlenecks of hybrid applications. A general strategy is presented to get dynamic runtime information about hybrid program execution with minimal impact on the program flow. The achievable level of detail is exemplarily studied for the CUDA environment and the OpenCL framework. Combined with existing performance analysis techniques this facilitates obtaining the full potential of hybrid computing power. © 2010 ieee.

关键词： Computing power

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parallel job scheduling policies to improve fairness: A case study

Parallel job scheduling policies to improve fairness: A case...

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International workshop on Scheduling and Resource Management for parallel and distributed systems

作者： Leung, Vitus J. Sabin, Gerald Sadayappan, P. Sandia National Laboratories Albuquerque NM United States RNET Technologies Inc. Dayton OH United States Ohio State University Columbus OH United States

ISBN: (纸本)9780769541570

Balancing fairness, user performance, and system performance is a critical concern when developing and installing parallel schedulers. Sandia uses a customized scheduler to manage many of their parallel machines. A primary function of the scheduler is to ensure that the machines have good utilization and that users are treated in a "fair" manner. A separate compute process allocator (CPA) ensures that the jobs on the machines are not too fragmented in order to maximize throughput. Until recently, there has been no established technique to measure the fairness of parallel job schedulers. This paper introduces a "hybrid" fairness metric that is similar to recently proposed metrics. The metric uses the Sandia version of a "fairshare" queuing priority as the basis for fairness. The hybrid fairness metric is used to evaluate a Sandia workload. Using these results, multiple scheduling strategies are introduced to improve performance while satisfying user and system constraints. © 2010 ieee.

关键词： Scheduling

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Jedule: A tool for visualizing schedules of parallel applications

Jedule: A tool for visualizing schedules of parallel applica...

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International workshop on Scheduling and Resource Management for parallel and distributed systems

作者： Hunold, Sascha Hoffmann, Ralf Suter, Frédéric International Computer Science Institute Berkeley CA United States Department of Computer Science University of Bayreuth Germany IN2P3 Computing Center CNRS/IN2P3 Lyon-Villeurbanne France

ISBN: (纸本)9780769541570

Task scheduling is one of the most prominent problems in the era of parallel computing. We find scheduling algorithms in every domain of computer science, e.g., mapping multiprocessor tasks to clusters, mapping jobs to grid resources, or mapping fine-grained tasks to cores of multicore processors. Many tools exist that help understand or debug an application by presenting visual representations of a certain program run, e.g., visualizations of MPI traces. However, often developers want to get a global and abstract view of their schedules first. In this paper we introduce Jedule, a tool dedicated to visualize schedules of parallel applications. We demonstrate the effectiveness of Jedule by showing how it helped analyzing problems in several case studies. © 2010 ieee.

关键词： Mapping

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Optimizing service level agreements for autonomic cloud bursting schedulers

Optimizing service level agreements for autonomic cloud burs...

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International workshop on Scheduling and Resource Management for parallel and distributed systems

作者： Kailasam, Sriram Gnanasambandam, Nathan Dharanipragada, Janakiram Sharma, Naveen Distributed and Object Systems Lab Dept. of Comp. Sci. and Engg. IIT Madras Chennai 600036 India Xerox Research Center Webster Xerox Corporation Webster NY 14580 United States

ISBN: (纸本)9780769541570

The practice of computing across two or more data centers separated by the Internet is growing in popularity due to an explosion in scalable computing demands and payas- you-go schemes offered on the cloud. While cloud-bursting is addressing this process of scaling up and down across data centers (i.e. between private and public clouds), offering service level guarantees, is a challenge for inter-cloud computation, particularly for best-effort traffic and large files. The parallel workload we address is real-time and involves inter-cloud processing and analysis of images and documents. In our production printing domain, dedicated processing/network resources are cost-prohibitive. Further, the problem is exacerbated by data intensive computing - we encounter huge file sizes atypical of intercloud parallel processing. To address these problems we propose three flavors of autonomic cloud-bursting schedulers that offer probabilistic guarantees on service levels required by customers (such as speed-up and queue sequence preservation) by adapting to changing workload characteristics, variation in bandwidth and available resources. In particular, these opportunistic schedulers use a quadratic response surface model for processing time in concert with a time-of-day dependent bandwidth predictor to increase the throughput and utilization while simultaneously reducing out-of-sequence completions for a document processing workload. © 2010 ieee.

关键词： Bandwidth

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