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检索条件"任意字段=Proceedings of the International Conference on Hardware/Software Codesign and System Synthesis"

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Deriving process networks from weakly dynamic applications in system-level design 03

Deriving process networks from weakly dynamic applications i...

引用

international conference on hardware/software codesign and system synthesis (CODES)

作者： T. Stefanov E. Deprettere Leiden Embedded Research Center Leiden Institute of Advanced Computer Science Leiden University Netherlands

ISBN: (纸本)9781581137422

We present an approach to the automatic derivation of executable process network specifications from weakly dynamic applications. We introduce the notions of dynamic single assignment code, approximated dependence graph, and linearly bounded sets to model and capture weakly dynamic (data-dependent) behavior of applications at the task-level of abstraction. Process networks are simple parallel processing models that match the emerging multiprocessor architectures in the sense that the mapping of process network specifications of applications onto multiprocessor architectures can be done in a systematic and transparent way.

关键词： Intelligent networks system-level design Mathematical model Computational modeling Application software Concurrent computing Computer networks Computer science Embedded computing Design automation

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Bus architecture synthesis for hardware-software co-design of deep submicron systems on chip

Bus architecture synthesis for hardware-software co-design o...

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IEEE international conference on Computer Design: VLSI in Computers and Processors, (ICCD)

作者： N. Thepayasuwan Vaishali Damle A. Doboli Department of Electrical and Computer Engineering State University of New York Stony Brook Stony Brook NY USA

system level design always has a disadvantage of not possessing detailed knowledge of the communication subsystem. This is a crucial issue for system-on-chip design, where uncertainty in communication by very deep submicron effects cannot be neglected. We present a bus architecture (BA) synthesis algorithm for designing the communication subsystem of an SoC. The algorithm is part of a hardware-software codesign methodology for resource constrained embedded applications. BA synthesis includes finding the bus topology, and routing the individual buses so that various constraints, like bus length, topology complexity, potential for communication conflicts over time, are addressed. We present BA synthesis results for a network processor, and a JPEG SoC.

关键词： system-on-a-chip Routing Application software Computer architecture system-level design Algorithm design and analysis Network synthesis Network topology Analog-digital conversion Delay

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A case study of mapping a software-defined radio (SDR) application on a reconfigurable DSP core

A case study of mapping a software-defined radio (SDR) appli...

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international conference on hardware/software codesign and system synthesis (CODES)

作者： Behzad Mohebbi E.C. Filho F.J. Kurdahi Morpho Technologies Inc Irvine CA

We present a case study involving the implementation of a complete Wideband CDMA (WCDMA) digital receiver part of an AMR channel onto a reconfigurable core. WCDMA is one of the two major standards for the third generation (3G) cellular systems. Traditionally most of the receiver components were confined to ASIC implementation for performance, size and power consumption reasons. The MS1 reconfigurable DSP core provides both a microprocessor and reconfigurable fabric as well as a variety of peripherals. The various functions of the receiver were mapped onto different core components. The complete system was tested both in simulation as well as on a hardware platform comprising a silicon implementation of the MS1 DSP core.

关键词： Application software Digital signal processing Multiaccess communication Wideband Receivers Application specific integrated circuits Energy consumption Microprocessors Fabrics system testing

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Driving forces behind SoC development 03

Driving forces behind SoC development

引用

international conference on hardware/software codesign and system synthesis (CODES)

作者： M.C. Chian Mindspeed Technologies Sr. VP Core Technology

ISBN: (纸本)9781581137422

In this paper, we examine the vectors of cost, methodology, technology, and their interrelationship in SOC development. We stress that now, more than ever, methodology and technology choices for SoC design and implementation have to be economically driven. If the high mortality rate of small chip companies and depressed earnings of larger ones over the past three years are any indication, we see renewed interest in business fundamentals such as total available market (TAM) and return on investment (ROI). This is perhaps one of the most vivid changes we will all experience in the post bubble era.

关键词： Packaging Design automation Costs Design engineering Strontium Technological innovation system-on-a-chip Stress Companies Investments

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Web-based system for sequential machines decomposition 2

Web-based system for sequential machines decomposition

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international conference on Computer as a Tool

作者： Devadze, S Fomina, E Kruus, M Sudnitson, A Tallinn Univ Technol EE-12618 Tallinn Estonia

ISBN: (纸本)078037763X

This work focuses on particular but comprehensive problem of finite state machine (FSM) decomposition. The task of the FSM decomposition is essential to sequential circuits design optimization in implementation-independent manner. The main goal of the investigations has been to elaborate decomposition synthesis methods for high complexity FSMs and their implementation as web-based computer design system. The theoretical basis for the investigations has been the algebraic structure theory of FSMs, its further development in accordance with the needs of digital systems design practice to handle the task of partition of hardware description into a network of interconnected FSMs targeting optimization criteria. Consideration of decomposition synthesis leads to investigation of hard NP-complete combinatorial problems. The synthesis system under development should not be only design automation software but it should be a research tool and educational system.

关键词： decomposition finite state machine low-power design

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A new reactive processor with architectural support for control dominated embedded systems 16

A new reactive processor with architectural support for cont...

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16th international conference on VLSI Design/2nd international conference on Embedded systems Design

作者： Roop, PS Salcic, Z Biglari-Abhari, M Bigdeli, A Univ Auckland Dept EEE Auckland 1 New Zealand

ISBN: (纸本)0769518680

Control dominated embedded systems, have to be designed for fast reaction to asynchronous external events occurring in the environment. Such systems must be able to perform signal emission, signal polling, preemption and priority resolution efficiently. Current microprocessors and microcontrollers, however, have no direct support for such tasks and employ indirect mechanisms such as polling (via a port) and interrupts. In this paper we propose a new processor core having architectural support for reactivity at the instruction level. The new processor core (called REFLIX) is an extension of an existing open source processor (FLIX) core with additional instructions to support reactivity. Initial benchmarking results (for some control dominated programs) show that. REFLIX performs, on an average, 5.92 times faster compared to FLIX and has 77% code size reduction when compared to some conventional processors.

关键词： Application software Communication system control Control system synthesis Control systems Embedded system hardware Microcontrollers Microprocessors Signal processing Signal resolution

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Design technology challenges for system and chip level designs in very deep submicron technologies 03

Design technology challenges for system and chip level desig...

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international conference on hardware/software codesign and system synthesis (CODES)

作者： J. Lin National Semiconductor Israel

ISBN: (纸本)9781581137422

With very deep submicron process technologies, previously ignorable phenomena now have great impact on the robustness of IC designs. At the same time, the smaller feature sizes also enable an exponential increase in number of functions (or transistor count) available on chip. Complexity in process technology and design is widening the Design Technology gap, which, if not addressed properly, will threaten the continuation of process scaling and the industry's ability to benefit from it. The complexity of process and design technology, its impact on new designs, new products development and future solutions will be discussed in this presentation.

关键词： Process design Circuit testing Robustness Product design Product development Biographies Electronics industry Logic design Logic testing Design engineering

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Microwave antenna self-directing system

Microwave antenna self-directing system

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IEEE international conference on Industrial Technology

作者： Ratej, B Chowdhury, A Svecko, R Adv Res Ctr Maribor SI-2000 Maribor Slovenia

ISBN: (纸本)0780378520

The article is describing the synthesis and development of adequate hardware and software for automatic microwave link connection between mobile reporter vehicle and the radio centre. The whole device is built from five components micro-controller system, communication-navigation unit, device driver unit, power supply unit, and user interface. The core of the device is micro-controller system, which is providing all the needed intelligence. The communication-navigation unit is compound from the GSM modem with integrated GPS navigation system and electronic compass. GPS is the source for the vehicle position data, which is not enough for automatic microwave link establishment. Because of that the electronic compass is added. The GSM modem has also a role of communication backup in case when microwave link is not possible to restore. Another important unit is user interface, which is enabling a manipulation whit the device. The device has three important operation modes, which are self-testing, microwave link and GSM link mode. Itch operation mode is described whit the state-diagrams. By the software design a special care was taken on device reliability. So with the goal to get a reliable device, the algorithms and software for self-testing and error discovering have been developed and implemented. Finally, the functional value of the device has been proven whit the laboratory tests.

关键词： Microwave antennas

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Formal behavioural synthesis of Handel-C parallel hardware implementations from functional specifications 36

Formal behavioural synthesis of Handel-C parallel hardware i...

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36th Annual Hawaii international conference on system Sciences, HICSS 2003

作者： Abdallah, A.E. Hawkins, J. Centre for Applied Formal Methods South Bank University 103 Borough Road London United Kingdom

ISBN: (纸本)0769518745

Enormous improvements in efficiency can be achieved through exploiting parallelism and realizing implementation in hardware. On the other hand, conventional methods for achieving these improvements are traditionally costly, complex and error prone. Two significant advances in the past decade have radically changed these perceptions. Firstly, the FPGA, which gives us the ability to reconfigure hardware through software, dramatically reducing the costs of developing hardware implementations. Secondly, the language Handel-C with primitive explicit parallelism which can compile programs down to an FPGA. In this paper, we build on these recent technological advances and present a systematic approach of behavioural synthesis. Starting with an intuitive high level functional specification of a problem, given without annotation of parallelism, the approach aims at deriving an efficient parallel implementation in Handel-C, which is subsequently compiled into a circuit implemented on reconfigurable hardware. Algebraic laws are systematically used for exposing implicit parallelism and transforming the specification into a collection of interacting components. Formal methods based on data refinement and a small library of higher order functions are then used to derive behavioural description in Handel-C of each component. A small case study illustrates the use of this approach. © 2003 IEEE.

关键词： Field programmable gate arrays (FPGA)

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Design optimization of mixed time/event-triggered distributed embedded systems 03

Design optimization of mixed time/event-triggered distribute...

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international conference on hardware/software codesign and system synthesis (CODES)

作者： T. Pop P. Eles Z. Peng Department of Computer and Information Science Linköping University Sweden

ISBN: (纸本)9781581137422

Distributed embedded systems implemented with mixed, event-triggered task sets, which communicate over bus protocols consisting of both static and dynamic phases, are emerging as the new standard in application areas such as automotive electronics. In a previous paper, we developed a holistic timing analysis and scheduling approach for this category of systems. Based on this result, new design problems are solved, which we identified as characteristic for such hybrid systems: partitioning of the system functionality into time-triggered and event-triggered domains and the optimization of parameters corresponding to the communication protocol. We addressed both problems in the context of a heuristic which performs mapping and scheduling of the system functionality. We demonstrate the efficiency of the proposed technique with extensive experiments.

关键词： Design optimization Embedded system Scheduling Automotive engineering Distributed computing Embedded computing Timing Protocols Algorithm design and analysis Real time systems

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