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检索条件"任意字段=Proceedings of the International Conference on Hardware/Software Codesign and System Synthesis"

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Automatic production of globally asynchronous locally synchronous systems 2nd

引用

2nd international conference on Embedded software (EMSOFT 2002)

作者： Girault, A Ménier, C Inria Rhone Alpes BIP Project F-38334 Saint Ismier France Ecole Normale Super Lyon F-69364 Lyon 07 France

ISBN: (纸本)354044307X

Globally Asynchronous Locally Synchronous (GALS) systems are popular both in software and hardware for specifying and producing embedded systems as well as electronic circuits. In this paper, we propose a method for obtaining automatically a GALS system from a centralised synchronous circuit. We focus on an algorithm that takes as input a program whose control structure is a synchronous sequential circuit and some distribution specifications given by the user, and gives as output the distributed program matching the distribution specifications. Since the obtained programs communicate with each other through asynchronous FIFO queues, the resulting distributed system is indeed a GALS system. We also sketch a correctness proof for our distribution algorithm, and we present how our method can be used to achieve hardware/software codesign.

关键词： globally synchronous-locally asynchronous (GALS) automatic distribution distributed architectures synchronous circuits asynchronous communications hardware/software codesign

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Extended quasi-static scheduling for formal synthesis and code generation of embedded software 02

Extended quasi-static scheduling for formal synthesis and co...

引用

proceedings of the Tenth international Symposium on hardware/software codesign: CODES 2002

作者： Su, Feng-Shi Hsiung, Pao-Ann Dept. of Comp. Sci. and Info. Eng. National Chung Cheng University Chiayi-621 Taiwan

ISBN: (纸本)1581135424

With the computerization of most daily-life amenities such as home appliances, the software in a real-time embedded system now accounts for as much as 70% of a system design. On one hand, this increase in software has made embedded systems more accessible and easy to use, while on the other hand, it has also necessitated further research on how complex embedded software can be designed automatically and correctly. Enhancing recent advances in this research, we propose an Extended Quasi-Static Scheduling (EQSS) method for formally synthesizing and automatically generating code for embedded software, using the Complex-Choice Petri Nets (CCPN) model. Our method improves on previous work in three ways: (1) by removing model restrictions to cover a much wider range of applications, (2) by proposing an extended algorithm to schedule the more unrestricted model, and (3) by implementing a code generator that can produce multi-threaded embedded software programs. The requirements of an embedded software are specified by a set of CCPN, which is scheduled using EQSS such that the schedules satisfy limited embedded memory requirements and task precedence constraints. Finally, a POSIX-based multi-threaded embedded software program is generated in the C programming language. Through an example, we illustrate the feasibility and advantages of the proposed EQSS method.

关键词： Embedded systems

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A methodology for evaluating the precision of fixed-point systems

A methodology for evaluating the precision of fixed-point sy...

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IEEE international conference on Acoustics, Speech, and Signal Processing

作者： Menard, D Sentieys, O Univ Rennes 1 LASTI F-22300 Lannion France

ISBN: (纸本)0780374029

The minimization of cost, power consumption and time-to-market of DSP applications requires the development of methodologies for the automatic implementation of floating-point algorithms in fixed-point architectures. In this paper, a new methodology for evaluating the quality of an implementation through the automatic determination of the Signal to Quantization Noise Ratio (SQNR) is presented. The modelization of the system at the quantization noise level and the expression of the output noise power is detailed for linear systems. Then, the different phases of the methodology are explained and the ability of our approach for computing the SQNR efficiently is shown through examples.

关键词： random noise quantisation (signal) fixed point arithmetic floating point arithmetic signal processing digital circuits logic design hardware-software codesign fixed-point architectures power consumption time-to-market DSP applications floating-point algorithms signal-to-quantization-noise ratio embedded systems hardware-software implementation noise statistical parameters

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Improving embedded system design by means of HW-SW compilation on reconfigurable coprocessors

Improving embedded system design by means of HW-SW compilati...

引用

15th international Symposium on system synthesis

作者： Moya, José M. Moya, Francisco Rincón, Fernando López, Juan Carlos Dept. of Electronic Engineering Technical University of Madrid Madrid Spain Dept. of Computer Science U. of Castilla-La Mancha Ciudad Real Spain

This article describes a new approach to HW-SW codesign for complex embedded systems, using high-level programming languages. Unlike in previous approaches, the designer does not need to acquire new skills, because most of the design process is automated. The hardware extensions are implemented as simple coprocessors consisting of a reconfigurable datapath and a control memory. Our approach is demonstrated with a simple image processing application, obtaining a 100% performance improvement.

关键词： software engineering

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hardware-software co-synthesis of low power real-time distributed embedded systems with dynamically reconfligurable FPGAs 7

Hardware-software co-synthesis of low power real-time distri...

引用

7th Asia and South Pacific Design Automation conference/15th international conference on VLSI Design

作者： Shang, L Jha, NK Princeton Univ Dept EE Princeton NJ 08544 USA

ISBN: (纸本)0769514413

In this paper, we present a multi-objective hardware-software co-synthesis system for multi-rate, real-time, low power distributed embedded systems consisting of dynamically reconfigurable FPGAs, processors, and other system resources. We use an evolutionary algorithm based framework for automatically determining the quantity and type of different system resources, and then assigning tasks to different processing elements (PEs) and task communications to communication links. For FPGAs, we propose a two-dimensional, multi-rate cyclic scheduling algorithm, which determines task priorities based on real-time constraints and reconfiguration overhead information, and then schedules tasks based on the resource utilization and reconfiguration condition in both space and time. The FPGA scheduler is integrated in a list-based system scheduler. To the best of our knowledge, this is the first multi-objective co-synthesis system, which uses dynamically, reconfigurable devices to synthesize a distributed embedded system, to target simultaneous optimization of system price and power. Experimental results indicate that our method can reduce schedule length by an average of 41.0% and reconfiguration power by an average of 46.0% compared to the previous method. It also yields multiple system architectures which trade off system price and power under real-time constraints.

关键词： Field programmable gate arrays (FPGA)

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proceedings of the Tenth international Symposium on hardware/software codesign. CODES 2002 (IEEE Cat. No.02TH8627)

Proceedings of the Tenth International Symposium on Hardware...

引用

international Workshop on hardware/software codesign (CODES)

The following topics are dealt with: advances in system specification and system design frameworks; system design methods: analysis and verification; design space exploration and architectural design of HW/SW systems; co-design architecture and synthesis; system partitioning and timing analysis; energy efficiency in system design; system design methods: scheduling advances.

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Optimization of a retargetable functional simulator for embedded processors 9

Optimization of a retargetable functional simulator for embe...

引用

9th Annual IEEE international conference and Workshop on the Engineering of Computer-Based systems (ECBS 2002)

作者： Papariello, F Luculli, G STMicroelectronics Adv Syst Technol Grenoble France

ISBN: (纸本)0769515509

The objective of this research is to develop tools and methods for system-level optimization of embedded software that is executed on system-on-chip platforms. In particular, this paper proposes a new instruction-set simulator's tool flow which has been extended with some retargetability features and multiple program representations. We propose an innovative way to improve the simulation speed, that is a key factor for embedded software optimization, by using a synthesis approach. In depth description is reported of the source-level optimization of the simulation library which is an important part of such new mechanism. Experimental results show a speedup of about 24 for the throughput of the simulation library, reaching the valuable performance of 50 Mops.

关键词： Computational modeling Design optimization Embedded software hardware Instruction sets Optimization methods Process design software design software libraries system-on-a-chip

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Optimization and synthesis for complex reactive embedded systems by incremental collapsing

Optimization and synthesis for complex reactive embedded sys...

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international Workshop on hardware/software codesign (CODES)

作者： M. Chiodo Cadence Technologies San Jose CA USA

We propose a software synthesis procedure for reactive real-time embedded systems. In our approach, control parts of the system are represented in a decomposed form enabling more complex control structures to be represented. We propose a synthesis procedure for this representation that incrementally aggregates elements of the representation while keeping the resulting code size under tight control. This method combined with heuristic strategies works very well on real-life designs and demonstrates the potential to produce results that challenge or beat hand-written implementations.

关键词： Embedded system Control system synthesis Embedded software Control systems hardware Costs Specification languages Permission Computer languages Concurrent computing

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codesign-extended applications

Codesign-extended applications

引用

international Workshop on hardware/software codesign (CODES)

作者： B. Grattan G. Stitt F. Vahid Department of Electrical Engineering University of California Riverside USA Department of Electrical Engineering Department of Computer Science and Engineering University of California Center for Embedded Computer Systems at UC Irvine

We challenge the widespread assumption that an embedded system's functionality can be captured in a single specification and then partitioned among software and custom hardware processors. The specification of some functions in software is very different from the specification of the same function in hardware - too different to conceive of automatically deriving one from the other. We illustrate this concept using a digital camera example. We introduce the idea of codesign-extended applications to deal with the situation, wherein critical functions are written in multiple versions, and integrated such that simple compiler/synthesis flags instantiate a particular version along with the necessary control and communication behavior. By capturing a specification as a codesign-extended application, a designer enables smooth migration among platforms with increasing amounts of on-chip configurable logic.

关键词： hardware Application software Partitioning algorithms software algorithms Digital cameras Embedded computing Embedded system Embedded software Microprocessors Permission

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A structural encoding technique for the synthesis of asynchronous circuits 2

A structural encoding technique for the synthesis of asynchr...

引用

2nd international conference on Application of Concurrency to system Design (ACSD 2001)

作者： Carmona, J Cortadella, J Pastor, E Univ Politecn Catalunya Comp Architecture Dept Barcelona Spain Univ Politecn Catalunya Software Dept Barcelona Spain

ISBN: (纸本)076951071X

This paper presents a method for the automatic synthesis of asynchronous circuits from Petri net specifications. The method is based on a structural encoding of the system in such a way that a circuit implementation is always guaranteed. Moreover, a set of transformations is presented for the subclass of Free-Choice Petri nets that enables the exploration of different solutions. The set of transformations is derived from previous work on Petri net synthesis. Both the encoding technique and the set of transformations preserve the property of free-choiceness, thus enabling the use of structural methods for the synthesis of asynchronous circuits. Preliminary experimental results indicate that the quality of the circuits is comparable to that obtained by methods that require an exhaustive enumeration of the state space. This novel synthesis method opens the door to the synthesis of large control specifications generated from hardware description languages.

关键词： asynchronous circuits structural synthesis Complete State Coding Petri nets

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