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检索条件"任意字段=Proceedings of the International Conference on Hardware/Software Codesign and System Synthesis"

共 1553 条记录，以下是1211-1220 订阅

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Resource sharing estimation by Petri nets in PISH hardware/software co-design system

Resource sharing estimation by Petri nets in PISH hardware/s...

引用

IEEE international conference on systems, Man and Cybernetics

作者： Maciel, P Barros, E Silva, M Cruz, F Univ Fed Pernambuco Ctr Informat BR-50740540 Recife PE Brazil

ISBN: (纸本)0780365836

This work presents two approaches for computing the number of functional units in hardware/software codesign context, The proposed hardware/software codesign framework uses Petri net as common formalism for performing quantitative and qualitative analysis. The use of Petri net as an intermediate format allows to analyze properties of the specification and formally compute performance indices which are used in the partitioning process. This paper is devoted to describe the algorithms for functional unit estimation. This work also proposes a method of extending the Petri net model in order to take into account causal constraints provided by the designers. However, an overview of the general hardware/software codesign method is also presented.

关键词： Petri nets

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Run-time HW/SW codesign for discrete event systems using dynamically reconfigurable architectures 13

Run-time HW/SW codesign for discrete event systems using dyn...

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13th international Symposium on system synthesis (ISSS 2000)

作者： Noguera, J Badia, RM Univ Autonoma Barcelona E-08193 Barcelona Spain

ISBN: (纸本)0769507654;0769507662

HW/SW codesign and Reconfigurable Computing are commonly used methodologies for digital systems design. However, no previous work has been carried out in order to define a run-rime HW/SW codesign methodology for dynamically reconfigurable architectures. Besides, all previous approaches to reconfigurable computing context scheduling are based on static scheduling techniques. In this paper we present a run-time HW/SW codesign methodology for discrete evens systems using dynamically reconfigurable architectures and a dynamic approach to reconfigurable computing multi-context scheduling. We have applied our methodology to software acceleration, and present the obtained results.

关键词： Acceleration Discrete event systems Dynamic scheduling Embedded system hardware Partitioning algorithms Processor scheduling Reconfigurable architectures Runtime Throughput

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SDL as a system level specification language for application-specific hardware in a rapid prototyping environment 13

SDL as a system level specification language for application...

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13th international Symposium on system synthesis (ISSS 2000)

作者： Muth, A Färber, G Tech Univ Munich Inst Real Time Comp Syst D-8000 Munich Germany

ISBN: (纸本)0769507662

The specification of an embedded system at system level together with co-joint hardware/software synthesis is a goal of many rapid prototyping projects. SDL has been proposed as a formal and abstract specification language will suited for this purpose. The implementation of SDL's asynchronous communication model in application specific hardware, however, is un-proportionally expensive in terms of area and response time. This paper discusses the efficiency of the server model - the implementation model used in all known codesign approaches based on SDL - and compares it with an alternative implementation model for SDL known from software, the activity thread model. In a known from software, the activity thread model. In a combination of both implementation stategies, the communication and synchronization overhead for each application can be minimized, and an efficient implementation on distributed architectures realized. The integration in an existing rapid prototyping design process ins presented as well as results gained from application examples.

关键词： Application software Asynchronous communication Computer architecture Delay Embedded software Embedded system hardware software prototyping Specification languages Yarn

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Coprocessor synthesis of multirate system using static scheduling theory

Coprocessor synthesis of multirate system using static sched...

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11th IEEE international Workshop on Rapid system Prototyping (RSP 2000)

作者： Kamdem, R Fonkoua, A Univ Aix Marseille 1 CMI Lab INformat Marseille F-13453 Marseille France

ISBN: (纸本)0769506682

We present ct way to perform hardware/software partitioning of multirate systems based on static priority scheduling theory. The;problem is described by a set of interacting concurrent tasks. Each task is characterized by the lower bound on, the time between successive arrivals of task, a deadline, and a dataflow graph describing the computation to be performed on Each invocation. All the tasks are implemented as threads executing on a single processor and scheduled according to a static deadline monotonic priority. Atl the tasks must meet their deadline. To this aim, threads may be accelerated by mopping the corresponding tasks to an associated ASIC(1) coprocessor. The problem addressed by this paper is to reducer the the coprocessor hardware cost required by the tasks to meet their deadlines. The coprocessor synthesis is modeled as a partitioning problem.

关键词： codesign hardware/software partitioning scheduling target architecture real time codesign

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Automated communication synthesis for architecture-precise rapid prototyping of real-time embedded systems

Automated communication synthesis for architecture-precise r...

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11th IEEE international Workshop on Rapid system Prototyping (RSP 2000)

作者： Renner, FM Becker, J Glesner, M Tech Univ Darmstadt Inst Microelect Syst D-64283 Darmstadt Germany

ISBN: (纸本)0769506682

In this paper we present an automated approach to communication architecture synthesis with real-time constraints. Based on a pre-partitioned hardware/software specification find given communication constraints a thorough analysis of different communication structures is carried out using performance models of communication links to determine an optimized communication architecture. The complete hardware/software system will be emulated as an architecture-precise prototype on a real-time platform to verify the derived communication architecture as well as the hardware/software partitioning(1).

关键词： hardware/software codesign real-time embedded systems automated communication synthesis performance modeling architecture-precise rapid prototyping

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Interface synthesis: issues and approaches

Interface synthesis: issues and approaches

引用

The 13th international conference on VLSI Design: Wireless and Digital Imaging in the Millennium

作者： Rajawat, Arvind Balakrishnan, M. Kumar, Anshul Indian Inst of Technology Delhi India

With increasing complexity of electronic systems, automation tools are dominating the design activities. Though there has been marked progress towards hardware synthesis and software synthesis independently, interface synthesis still remains a troublesome issue for large systems due to its inherent intricacies. We present the interface synthesis problem in a general codesign environment, discuss the issues involved and highlight possible strategies for solving it. The paper also presents a survey of some approaches for interface synthesis and compares them in a broad framework.

关键词： Interfaces (computer)

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Specification and synthesis of real-time embedded distributed and parallel multiprocessor-based signal processing systems

Specification and synthesis of real-time embedded distribute...

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proceedings of the international conference on Compilers, Architecture, and synthesis for Embedded systems (CASES 2000)

作者： Janka, Randall S. Wills, Linda M. Cadence Design Systems Inc. 1117 Perimeter Center West Atlanta GA 30338 United States Sch. of Elec./Computer Engineering Georgia Institute of Technology Atlanta GA 30332-0250 United States

ISBN: (纸本)1581133383

The codesign of embedded real-time signal processing systems is complex. In certain application domains requiring high computational throughput, this complexity is due to the need to employing parallel processing and perhaps using heterogeneous processors. The use of commercial-off-the-shelf (COTS) multiprocessor (MP) hardware and software can reduce codesign complexity. Further complexity reduction can be obtained with emerging synthesis frameworks, which can generate deployable code by leveraging vendor communication and computation libraries. However, these synthesis frameworks are inadequate in providing a sound specification and design methodology (SDM) because they require the designer to first choose the implementation target before specification and design exploration. We have developed a new SDM known as MAGIC that allows the designer to capture the specification in an executable model that can then be used in design exploration to find the optimal COTS MP technology and architecture before committing to that technology. The MAGIC SDM exploits emerging open-standards based VSIPL computation middleware and MPI communication middleware to provide connectivity between specification and design with synthesis frameworks for implementation. This SDM is also shown to be applicable to the system-on-chip (SOC) domain, especially as embodied in a new framework called Virtual Component Co-design from Cadence Design systems.

关键词： Signal processing

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Multi-level communication synthesis of heterogeneous multilanguage specification

Multi-level communication synthesis of heterogeneous multila...

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18th IEEE international conference on Computer Design (ICCD 2000)

作者： Hessel, F Coste, P Nicolescu, G LeMarrec, P Zergainoh, N Jerraya, A TIMA Lab F-38031 Grenoble France

ISBN: (纸本)0769508014

The complexity of modern embedded systems requires the cooperation of several reams belonging to different cultures and using different languages as well as the reuse of software, hardware and communication IP modules at the early design steps. The key issue for the design of such systems is the overall system validation and the synthesis of the communication between the different subsystems. In this paper, we focus on the problem of multi-level communication synthesis and show the results of the application of this methodology on an example. Designers get feedback at all design steps via the cosimulation engine that permits fast evaluation.

关键词： Embedded systems

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CoEvolvable hardware platform for automatic hardware design of neural networks

CoEvolvable hardware platform for automatic hardware design ...

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international conference on Industrial Technology (IEEE ICIT 2000)

作者： Hammami, O Kuroda, K Zhao, Q Saito, K Univ Aizu Dept Hardware Fukushima 9658580 Japan

ISBN: (纸本)0780358120

This paper proposes a system for the automatic hardware design of neural networks based on cooperative co evolutionnary paradigms and multiple reconfigurable devices. Our system is composed of logic synthesis tool, multiple reconfigurable devices and an embedded processor executing the co evolutionnary algorithm. The partitionning of the engineering design process follows current practices ill hardware/software co design based on both information on arrival rate lambda of requests and the service time mu of the reconfigurable Devices. The system is suitable under some conditions for industrial applications as a reactive system but also because it can be connected to multiple systems in a totally networked industrial environment which allows download of the same hardware configuration on multiple on line devices.

关键词： Neural networks

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Interfacing a simulation engine to an embedded runtime environment

Interfacing a simulation engine to an embedded runtime envir...

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IEEE international conference on systems, Man and Cybernetics

作者： Eames, B Neema, S Bapty, T Scott, J Vanderbilt Univ Inst Software Integrated Syst Nashville TN 37203 USA

ISBN: (纸本)0780365836

The design of modern high-performance embedded systems is challenging, power and size constraints limit hardware size, while performance requirements demand algorithm-specific architectures. A model-integrated approach can be used in the design capture and synthesis of these systems. A domain-specific graphical system design environment allows the capture of system requirements, design information and alternatives, and of available processing resources in the form of models. A model interpretation process generates architecture specifications and compilable code. A typical first step in designing complex systems is to develop a simulation-based prototype. After functional verification of the prototype, system components are implemented, each tailored to a particular target platform. Only after all components are implemented can system integration be addressed, often uncovering inconsistencies between components and forcing costly redesign. This paper describes an extension of a model-integrated design environment and runtime system. Simulation-based components are included in system models. A simulation engine is interfaced to a runtime environment, allowing simulation components to run "in the loop" with non-simulation based components. The extended environment allows prototype synthesis from system models and automates the integration of implemented components into the system. Further, the extended environment provides the designer with a powerful visualization and debugging tool.

关键词： Embedded systems

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