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Resource sharing estimation by Petri nets in PISH hardware/software co-design system

Resource sharing estimation by Petri nets in PISH hardware/s...

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IEEE international conference on systems, Man and Cybernetics

作者： P. Maciel E. Barros M. Silva F. Cruz Filho Centro de Inf. Univ. Fed. de Pernambuco Recife Brazil Centro de Informatica Universidade Federal de Pernambuco Recife Brazil Universidade Federal de Pernambuco Recife PE BR

The article presents two approaches for computing the number of functional units in a hardware/software codesign context. The proposed hardware/software codesign framework uses the Petri net as a common formalism for performing quantitative and qualitative analysis. The use of the Petri net as an intermediate format allows us to analyze properties of the specification and formally compute performance indices which are used in the partitioning process. The paper is devoted to describing the algorithms for functional unit estimation. The work also proposes a method of extending the Petri net model in order to take into account causal constraints provided by the designers. However, an overview of the general hardware/software codesign method is also presented.

关键词： Resource management Petri nets hardware software systems software quality Performance analysis Partitioning algorithms software tools Costs Phase estimation

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SDL as a system level specification language for application-specific hardware in a rapid prototyping environment

SDL as a system level specification language for application...

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international Symposium on system synthesis

作者： A. Muth G. Farber Institute for Real-Time Computer Systems Technische Universität München Germany

The specification of an embedded system at system level together with co-joint hardware/software synthesis is a goal of many rapid prototyping projects. SDL has been proposed as a formal and abstract specification language well suited for this purpose. The implementation, of SDL's asynchronous communication model in application specific hardware, however, is unproportionally expensive in terms of area and response time. This paper discusses the efficiency of the server model-the implementation model used in all known codesign approaches based on SDL-and compares it with an alternative implementation model for SDL known from software, the activity thread model. In a combination of both implementation strategies, the communication and synchronization overhead for each application can be minimized, and an efficient implementation on distributed architectures realized. The integration in an existing rapid prototyping design process is presented as well as results gained from application examples.

关键词： Specification languages Application software hardware software prototyping Embedded system Embedded software Asynchronous communication Delay Yarn Computer architecture

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Conditional scheduling for embedded systems using genetic list scheduling

Conditional scheduling for embedded systems using genetic li...

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international Symposium on system synthesis

作者： M. Grajcar Chair of Computer Architectures University of Passau Germany

One important part of a hardware/software (HW/SW) codesign system is the scheduler, which is needed in order to determine if a given HW/SW partitioning is suitable for a given application. In this paper, we employ a dataflow model for scheduling a computation including conditional branches on a loosely coupled heterogeneous multiprocessor system. The goal is to minimize the worst-case makespan while satisfying constraints implied by data dependencies and exclusive resource usage. We present a formal model which allows multiple schedule optimizations and a new efficient heuristic approach based on genetic algorithms and list scheduling.

关键词： Embedded system Processor scheduling Computer architecture Genetic algorithms Scheduling algorithm Application software Multiprocessing systems Computer science High level synthesis Digital signal processing

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TOWARDS THE synthesis OF AESTHETIC PRODUCT FORM

TOWARDS THE SYNTHESIS OF AESTHETIC PRODUCT FORM

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ASME 2000 international Design Engineering Technical conferences and Computers and Information in Engineering conference, IDETC-CIE 2000

作者： Smyth, Stephen N. Wallace, David R. Department of Mechanical Engineering Massachusetts Institute of Technology CambridgeMA02139 United States

ISBN: (纸本)9780791835142

A method for the synthesis of aesthetic product form is proposed. The approach attempts to bring computation to bear on the notion of brand DNA, a term which is used in industry loosely to refer to die aesthetic form elements that contribute to brand identity. The designer defines the origin of an evolutionary process by interactively describing the archetype, or skeleton, of the desired form based on existing product geometry. The system uses the skeleton to generate a variety of forms, or surface skins. The designer selects appealing surfaces for further evolution in form space. It is envisaged that this synthesis process will be applied within an integrated industrial design cycle that supports the rapid alternation between physical and digital representations of product geometry. Copyright ©2000 by ASME.

关键词： Conceptual design

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Using Petri nets for data dependency analysis

Using Petri nets for data dependency analysis

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IEEE international conference on systems, Man and Cybernetics

作者： F.C. Filho P. Maciel E. Barros Centro de Informática Universidade Federal de Pernambuco Recife Pernambuco Brazil

Due to design constraints, many digital systems are implemented as mixed hardware and software components. An informal choice of implementing a part of the system, either in software or in hardware, can produce incorrect or unsatisfactory results. Co-design methodologies have been developed to aid the development of such systems. The partitioning phase is one of the tasks carried out by a co-design methodology. It divides the original system into components taking in account software or hardware implementation. This work presents a model to carry out data dependency analysis, which is one of the aspects considered for the partitioning algorithm of the PISH codesign methodology.

关键词： Petri nets Data analysis hardware Algorithm design and analysis Digital systems Design methodology Partitioning algorithms Communication system control Costs software algorithms

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synthesis of expressive movement 26

Synthesis of expressive movement

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26th international Computer Music conference, ICMC 2000

作者： Camurri, Antonio Coletta, Paolo Ricchetti, Matteo Volpe, Gualtiero DIST Laboratorio di Informatica Musicale University of Genova Viale Causa 13 Genova16145 Italy

We present experiments concerning the use of mobile robots in music theatre artistic productions. The paper focuses on the development of techniques for expressive movement synthesis and on their hardware and software implementation in concrete human-robot and human-virtual characters interaction. Different kinds of synthesis of expressive content in movement are considered: (i) Expressive content conveyed through the movement of robots and interacting with them (e.g. robots interacting with dancers, artists, musicians on a stage): a particular focus will be on the expressiveness raising not only from the movement of a robot (i.e. its style of movement), but also from a global, multimodal interaction between a robot and an artist (e.g. a music performer or a dancer). The integration of music and movement is also a crucial issues presented in the paper. (ii) Expressive utilisation of mobile scenery in music theatre applications. Research on synthesis of expressive movement will take advantage from the results obtained in our Labs on the analysis of expressiveness in human movement and dance. Experiments based on small mobile robots (the Pioneer 2 from Stanford Research Institute) are presented. The paper describes issues developed in a multimedia artistic production we partecipated with Virgilio Sieni Dance Company (L'Ala dei Sensi, Ferrara, November 1999). In particular, the interactive setup, the techniques, and the lessons learned in experimenting the developed system will be presented. © 2000 ICMC. All Rights Reserved.

关键词： Mobile robots

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HW/SW codesign of an engine management system 00

HW/SW codesign of an engine management system

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Design, Automation and Test in Europe conference and Exhibition

作者： M. Baleani A. Ferrari A. Sangiovanni-Vincentelli C. Turchetti Department of EECS University of California Berkeley CA USA Department of Electronics University of Ancona Ancona Italy PARADES E.E.I.G. Rome Italy

ISBN: (纸本)9781581132441

The design process for an engine management system is presented. The functional specification of the system has been captured using C and C++ as specification languages. The validation of the specification has been carried out using functional simulation. Then an architecture for the implementation of the functional specification is selected among a set of three possible alternatives, all based on the same micro-controller; characterized by different hardware-software trade-offs. The choice is motivated by a fast performance estimation that can also be used to identify the parts of the design that could be moved across the hardware-software partition to obtain better cost or better performance. The case study has been performed in the Felix VCC framework.

关键词： Engines Costs Embedded system Design methodology hardware Libraries Performance analysis Digital signal processing Process design Specification languages

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Multi-level communication synthesis of heterogeneous multilanguage specification

Multi-level communication synthesis of heterogeneous multila...

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IEEE international conference on Computer Design: VLSI in Computers and Processors, (ICCD)

作者： F. Hessel P. Coste G. Nicolescu P. LeMarrec N. Zergainoh A. Jerraya TIMA Laboratory Grenoble France

The complexity of modern embedded systems requires the cooperation of several teams belonging to different cultures and using different languages as well as the reuse of software, hardware and communication IP modules at the early design steps. The key issue for the design of such systems is the overall system validation and the synthesis of the communication between the different subsystems. In this paper we focus on the problem of multi-level communication synthesis and show the results of the application of this methodology on an example. Designers get feedback at all design steps via the cosimulation engine that permits fast evaluation.

关键词： Object oriented modeling Embedded system Time to market Design methodology Wires Access protocols Switches Laboratories Computer science hardware

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A transmission model for hardware-in-the-loop powertrain control system software development

A transmission model for hardware-in-the-loop powertrain con...

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IEEE conference on Control Technology and Applications (CCTA)

作者： L. Mianzo Advanced Energy Transformation Systems Visteon Automotive Systems Dearborn MI USA

Powertrain control systems engineers are increasingly being asked to deliver high quality products faster, under stricter emissions and fuel economy regulations as well as meet higher customer expectations. In order to meet these demands, control engineers are turning to computer-aided tools that support rapid development of quality products, such as hardware-in-the-loop (HIL) systems. In the paper, a transmission model that has been developed for the Visteon Powertrain HIL Project is described. The transmission model is used to verify the on-board diagnostics (OBD-II) and transmission control logic.

关键词： Power system modeling Mechanical power transmission Control system synthesis system software Logic Gears Torque system testing Control systems Open loop systems

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High-level synthesis of nonprogrammable hardware accelerators

High-level synthesis of nonprogrammable hardware accelerator...

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international conference on Application Specific systems (ASAP), Architectures and Processors

作者： R. Schreiber S. Aditya B. Ramakrishna Rau V. Kathail S. Mahlke S. Abraham G. Snider Hewlett Packard Company Palo Alto CA USA

The PICO-N system automatically synthesizes embedded nonprogrammable accelerators to be used as co-processors for functions expressed as loop nests in C. The output is synthesizable VHDL that defines the accelerator at the register transfer level (RTL). The system generates a synchronous array of customized VLIW (very-long instruction word) processors, their controller local memory, and interfaces. The system also modifies the user's application software to make use of the generated accelerator. The user indicates the throughput to be achieved by specifying the number of processors and their initiation interval. In experimental comparisons, PICO-N designs are slightly more costly than hand-designed accelerators with the same performance.

关键词： High level synthesis hardware Acceleration Control system synthesis Coprocessors Registers Synchronous generators VLIW Automatic generation control Process control

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