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检索条件"任意字段=Proceedings of the International Conference on Hardware/Software Codesign and System Synthesis"
1553 条 记 录,以下是1271-1280 订阅
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A High-Speed, Area-Optimized, ROM-Less (Co)Sine Wave synthesis Accelerator  16
A High-Speed, Area-Optimized, ROM-Less (Co)Sine Wave Synthes...
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16th international Symposium on Electronics and Telecommunications, ISETC 2024
作者: Stoica, Florentina-Giulia Calinescu, Alex Enachescu, Marius Electronic Devices Circuits and Architectures University Politehnica of Bucharest Faculty of Electronics Telecommunications and Information Technology Bucharest Romania
Sine and cosine wave synthesis is utilized for generating sinusoidal-alike values in the digital domain. While this task is handled through software, dedicated hardware like Direct Digital synthesis (DDS) is also avai... 详细信息
来源: 评论
The Integration and Testing Procedures for the AcubeSAT Nanosatellite's software  20
The Integration and Testing Procedures for the AcubeSAT Nano...
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20th international conference on synthesis, Modeling, Analysis and Simulation Methods and Applications to Circuit Design, SMACD 2024
作者: Keremidis, Antonios Tzelepis, Stylianos Hatzopoulos, Alkis National Technical University of Athens Greece SpaceDot Greece Aristotle University of Thessaloniki Greece AUTh Electronics Lab Dept. of Electrical and Computer Eng Greece
The AcubeSAT space mission, a collaborative effort within the Fly Your Satellite! 3 program of the European Space Agency (ESA) Education Office and SpaceDot, features unique payload requirements aimed at exploring the... 详细信息
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Towards a multi-formalism framework for architectural synthesis: the ASAR project  94
Towards a multi-formalism framework for architectural synthe...
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proceedings of the 3rd international workshop on hardware/software co-design
作者: M. Auguin M. Belhadj J. benzakki C. Carrière G. Durrieu Th. Gautier M. Israël P. Le Guernic M. Lemaître E. Martin P. Quinton L. Rideau F. Rousseau O. Sentieys I3S IRISA LIVE CERT-Onera IRISA-INRIA LISTI IRISA-CNRS INRIA-Sophia LASTI
This paper describes a research project - named ASAR - grouping together six french research teams, oriented towards architectural and system synthesis. A main concern of this project is hardware/software codesign and...
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Service dependency graph: an efficient model for hardware/software interfaces modeling and generation for SoC design  05
Service dependency graph: an efficient model for hardware/so...
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proceedings of the 3rd IEEE/ACM/IFIP international conference on hardware/software codesign and system synthesis
作者: Adriano Sarmento Lobna Kriaa Arnaud Grasset Mohamed-Wassim Youssef Aimen Bouchhima Frederic Rousseau Wander Cesario Ahmed Amine Jerraya TIMA Laboratory CEDEX France
Complex systems-on-chip are designed by interconnecting pre-designed hardware (HW) and software (SW) components. During the design cycle, a global model of the SoC may be composed of HW and SW models at different abst... 详细信息
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Representation of algorithms for schematic synthesis of radio engineering devices in the knowledge base of the expert system
Representation of algorithms for schematic synthesis of radi...
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2020 international conference on Engineering Management of Communication and Technology, EMCTECH 2020
作者: Dolin, G.A. Kudryashova, A.Y. Frisk, V.V. Shakin, V.N. Moscow Technical University of Communications and Informatics Moscow Russia
Creating a new generation of radio engineering devices requires continuous improvement of centers and computer-aided design systems. Moreover, the hardware design itself is currently impossible to imagine without the ... 详细信息
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Novel architecture for loop acceleration: a case study  05
Novel architecture for loop acceleration: a case study
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proceedings of the 3rd IEEE/ACM/IFIP international conference on hardware/software codesign and system synthesis
作者: Seng Lin Shee Sri Parameswaran Newton Cheung University of New South Wales Sydney Australia
In this paper, we show a novel approach to accelerate loops by tightly coupling a coprocessor to an ASIP. Latency hiding is used to exploit the parallelism available in this architecture. To illustrate the advantages ... 详细信息
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Tutorial: Large-Scale Spiking Neuromorphic Architecture Exploration using SANA-FE
Tutorial: Large-Scale Spiking Neuromorphic Architecture Expl...
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international conference on hardware/software codesign and system synthesis (CODES)
作者: James A. Boyle Mark Plagge Suma G. Cardwell Frances S. Chanc Andreas Gerstlauer The University of Texas at Austin Texas USA Sandia National Laboratories New Mexico USA
Neuromorphic computing uses brain-inspired concepts to accelerate and efficiently execute a wide range of applications, such as mimicking biological circuits, solving NPhard optimization problems and accelerating mach... 详细信息
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Managing complexity in heterogeneous system specification, simulation, and synthesis
Managing complexity in heterogeneous system specification, s...
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international conference on Acoustics, Speech, and Signal Processing (ICASSP)
作者: A. Kalavade J.L. Pino E.A. Lee Dept. of Electr. Eng. & Comput. Sci. California Univ. Berkeley CA USA Department of Electrical Engineering and Computer Sciences University of California Berkeley CA USA
system-level design is characterized by a behavioral specification and heterogeneous hardware/software implementations. Exploring the design space is essential for good design. Specifying and managing complex design f... 详细信息
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A Petri net based approach for performing the initial allocation in hardware/software codesign
A Petri net based approach for performing the initial alloca...
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IEEE international conference on systems, Man and Cybernetics
作者: P. Maciel E. Barros W. Rosenstiel Departmento de Informática CEP Universitdade de Pernambuco Recife Brazil Fakultaet fuer Informatik Universitaet Tuebingen Tubingen Germany
This work presents a method of hardware/software partitioning considering multiple software components. The proposed method uses Petri nets as a common formalism to perform quantitative and qualitative analysis. The u... 详细信息
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HLS-based fast design space exploration of ad hoc hardware accelerators: A key tool for MPSoC synthesis on FPGA
HLS-based fast design space exploration of ad hoc hardware a...
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conference on Design and Architectures for Signal and Image Processing
作者: Youenn Corre Van-Trinh Hoang Jean-Philippe Diguet Dominique Heller Loïc Lagadec Laboratory-STICC Université de Bretagne Sud Lorient France Laboratory-STICC Université de Bretagne Occidentale Brest France
Over the last decade many academic and industrial system synthesis and codesign tools have been proposed to designers. However most of these tools are based on IP Libraries but either these libraries are incomplete or... 详细信息
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