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检索条件"任意字段=Proceedings of the International Conference on Hardware/Software Codesign and System Synthesis"
1553 条 记 录,以下是1271-1280 订阅
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proceedings of the IEEE international conference on Electronics, Circuits, and systems
Proceedings of the IEEE International Conference on Electron...
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6th IEEE international conference on Electronics, Circuits and systems, ICECS 1999
The proceedings contain 433 papers. The topics discussed include: a fully integrated 2 GHz frequency synthesizer;new circuit techniques based on a high performance frequency-TC-voltage converter;an enhanced frequency ...
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proceedings of the IEEE international conference on Electronics, Circuits, and systems
Proceedings of the IEEE International Conference on Electron...
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6th IEEE international conference on Electronics, Circuits and systems, ICECS 1999
The proceedings contain 433 papers. The topics discussed include: a fully integrated 2 GHz frequency synthesizer;new circuit techniques based on a high performance frequency-TC-voltage converter;an enhanced frequency ...
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system synthesis utilizing a layered functional model
System synthesis utilizing a layered functional model
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international Workshop on hardware/software codesign (CODES)
作者: I. Sander A. Jantsch Department of Electronics Royal Institute of Technology Stockholm Sweden
We propose a system synthesis method which bridges the gap between a highly abstract functional model and an efficient hardware or software implementation. The functional model is based on a formal semantics and the s... 详细信息
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Timing-driven HW/SW codesign based on task structuring and process timing simulation
Hardware/Software Codesign - Proceedings of the Internationa...
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hardware/software codesign - proceedings of the international Workshop 1999年 203-207页
作者: Ramanathan, Dinesh Dasdan, Ali Gupta, Rajesh Univ of California Irvine CA United States
Task structuring is the process of determining the individual tasks of a system, leading to the system's description as a task graph. This paper shows that RADHA-RATAN, our rate derivation algorithms, can be used ... 详细信息
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Embedded system synthesis under memory constraints
Embedded system synthesis under memory constraints
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international Workshop on hardware/software codesign (CODES)
作者: J. Madsen P. Bjorn-Jorgensen Department of Information Technology Technical University Denmark Nokia Mobile Phones A/S Copenhagen Denmark
This paper presents a genetic algorithm to solve the system synthesis problem of mapping a time constrained single-rate system specification onto a given heterogeneous architecture which may contain irregular intercon... 详细信息
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software controlled power management
Hardware/Software Codesign - Proceedings of the Internationa...
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hardware/software codesign - proceedings of the international Workshop 1999年 157-161页
作者: Lu, Yung-Hsiang Simunic, Tajana De Micheli, Giovanni Stanford Univ Stanford CA United States
Reducing power consumption is critical in many system designs. Dynamic power management is an effective approach to decrease power without significantly degrading performance. Power management decisions can be impleme... 详细信息
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Probabilistic performance metric for real-time system design
Hardware/Software Codesign - Proceedings of the Internationa...
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hardware/software codesign - proceedings of the international Workshop 1999年 90-94页
作者: Zhou, Tao Hu, Xiaobo Sha, Edwin H.-M. Univ of Notre Dame Notre Dame United States
At the system level design of a real-time embedded system, a major issue is to identify from alternative architectures the best one which satisfies the timing constraints. This issue leads to the need of a metric that... 详细信息
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A unified formal model of ISA and FSMD
A unified formal model of ISA and FSMD
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international Workshop on hardware/software codesign (CODES)
作者: J. Zhu D.D. Gajski CECS Information and Computer Science University of California Irvine CA USA
In this paper, we develop a formal framework to widen the scope of retargetable compilation. The goal is achieved by the unification of architectural models for both the processor architecture and the ASIC architectur... 详细信息
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system-level partitioning with uncertainty
Hardware/Software Codesign - Proceedings of the Internationa...
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hardware/software codesign - proceedings of the international Workshop 1999年 198-202页
作者: Albuquerque, Jones Coelho Jr., Claudionor Cavalcanti, Carlos Frederico da Silva Jr., Diogenes Cecilio Fernandes, Antonio Otavio UFMG Belo Horizonte Brazil
Several models and algorithms have been proposed in the past to generate HW/SW components for system-level designs. However, they were focused on a single designer who had a throughout knowledge of the design. In othe... 详细信息
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Scalable hardware library for the rapid prototyping of SDL specifications
Proceedings of the International Workshop on Rapid System Pr...
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proceedings of the international Workshop on Rapid system Prototyping 1999年 120-125页
作者: Doerfel, Matthias Slomka, Frank Hofmann, Richard Univ of Erlangen-Nuremberg Erlangen Germany
A known problem in the area of hardware/software codesign is the selection of the proper interface between the different parts of the design. This paper presents a technique which eases the selection by combining diff... 详细信息
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