检索结果-内蒙古大学图书馆

您好，读者！请登录

内蒙古大学图书馆

首页
概况
党建
资源
服务
科研支持
- 论文收录引用证明
- 科技查新
知识产权
档案馆
帮助

咨询与建议

建议与咨询留下您的常用邮箱和电话号码，以便我们向您反馈解决方案和替代方法

您的常用邮箱：*

您的手机号码：*

问题描述：

当前已输入0个字，您还可以输入200个字

全部搜索
期刊论文
图书
学位论文
标准
纸本馆藏
外文资源发现
数据库导航
超星发现

高级检索

时间限定

出版年份：

文献类型

图书期刊文献学位论文多媒体

馆藏选择

电子馆藏纸本馆藏

核心期刊

全部期刊 SCI 收录期刊 SSCI 收录期刊 EI 收录期刊 CSCD 收录期刊 CSSCI 收录期刊

语言

中文英文

文献类型

期刊文献图书学位论文标准纸本馆藏

帮助

文字说明：

T=题名（书名、题名），A=作者（责任者），K=主题词，P=出版物名称，PU=出版社名称，O=机构（作者单位、学位授予单位、专利申请人），L=中图分类号，C=学科分类号，U=全部字段，Y=年（出版发行年、学位年度、标准发布年）

检索规则说明：

AND代表“并且”；OR代表“或者”；NOT代表“不包含”；(注意必须大写,运算符两边需空一格)

检索范例：

范例一：(K=图书馆学 OR K=情报学) AND A=范并思 AND Y=1982-2016
范例二：P=计算机应用与软件 AND (U=C++ OR U=Basic) NOT K=Visual AND Y=2011-2016

分类表

所选分类

>> <<

限定检索结果

文献类型

1,497 篇 会议
55 篇 期刊文献

馆藏范围

1,552 篇 电子文献
0 种 纸本馆藏

日期分布

学科分类号

798 篇 工学
- 737 篇 计算机科学与技术...
- 559 篇 软件工程
- 153 篇 电气工程
- 135 篇 电子科学与技术（可...
- 103 篇 信息与通信工程
- 74 篇 控制科学与工程
- 22 篇 机械工程
- 13 篇 动力工程及工程热...
- 11 篇 光学工程
- 10 篇 建筑学
- 9 篇 仪器科学与技术
- 9 篇 生物工程
- 8 篇 材料科学与工程（可...
- 8 篇 土木工程
- 8 篇 生物医学工程（可授...
- 7 篇 安全科学与工程
- 6 篇 航空宇航科学与技...
179 篇 理学
- 104 篇 数学
- 48 篇 系统科学
- 39 篇 物理学
- 16 篇 统计学（可授理学、...
- 9 篇 生物学
- 6 篇 化学
108 篇 管理学
- 89 篇 管理科学与工程(可...
- 29 篇 工商管理
- 23 篇 图书情报与档案管...
15 篇 法学
- 11 篇 社会学
5 篇 经济学
- 5 篇 应用经济学
5 篇 教育学
- 5 篇 教育学
5 篇 医学
- 5 篇 临床医学
4 篇 艺术学
1 篇 农学

主题

359 篇 hardware
177 篇 computer archite...
162 篇 embedded system
135 篇 application soft...
87 篇 field programmab...
83 篇 embedded systems
75 篇 control system s...
69 篇 costs
67 篇 high level synth...
65 篇 computational mo...
65 篇 algorithm design...
64 篇 system-on-a-chip
63 篇 permission
62 篇 embedded softwar...
61 篇 real time system...
52 篇 timing
50 篇 system-on-chip
48 篇 computer science
47 篇 energy consumpti...
46 篇 space exploratio...

机构

10 篇 department of el...
8 篇 univ calif river...
8 篇 center for embed...
6 篇 school of comput...
6 篇 arizona state un...
6 篇 center for embed...
6 篇 department of co...
5 篇 princeton univ d...
5 篇 school of inform...
5 篇 department of co...
5 篇 philips research...
5 篇 institute for in...
5 篇 technische unive...
4 篇 department of el...
4 篇 ibm thomas j. wa...
4 篇 imec leuven
4 篇 politecn torino ...
4 篇 university of er...
4 篇 tu braunschweig
4 篇 university of do...

作者

9 篇 sri parameswaran
9 篇 ogras umit y.
9 篇 parameswaran sri
9 篇 nikil dutt
7 篇 rolf ernst
7 篇 dick robert p.
7 篇 dutt nikil
7 篇 robert p. dick
7 篇 leupers rainer
7 篇 vahid f
6 篇 jiang wei
6 篇 greg stitt
6 篇 teich juergen
6 篇 mitra tulika
6 篇 rainer leupers
6 篇 andreas gerstlau...
6 篇 a. sangiovanni-v...
6 篇 r. ernst
6 篇 jha niraj k.
5 篇 sungjoo yoo

语言

1,545 篇 英文
5 篇 其他
2 篇 中文

检索条件"任意字段=Proceedings of the International Conference on Hardware/Software Codesign and System Synthesis"

共 1552 条记录，以下是1311-1320 订阅

全选清除本页清除全部题录导出标记到"检索档案"

详细简洁

排序：

SOMA: a tool for synthesizing and optimizing memory accesses in ASICs 05

SOMA: a tool for synthesizing and optimizing memory accesses...

引用

proceedings of the 3rd IEEE/ACM/IFIP international conference on hardware/software codesign and system synthesis

作者： Girish Venkataramani Tiberiu Chelcea Seth Copen Goldstein Tobias Bjerregaard Carnegie Mellon University Pittsburgh PA TU Denmark Lyngby Denmark

ISBN: (纸本)9781595931610

Arbitrary memory dependencies and variable latency memory systems are major obstacles to the synthesis of large-scale ASIC systems in high-level synthesis. This paper presents SOMA, a synthesis framework for constructing Memory Access Network (MAN) architectures that inherently enforce memory consistency in the presence of dynamic memory access dependencies. A fundamental bottleneck in any such network is arbitrating between concurrent accesses to a shared memory resource. To alleviate this bottleneck, SOMA uses an application-specific concurrency analysis technique to predict the dynamic memory parallelism profile of the application. This is then used to customize the MAN architecture. Depending on the parallelism profile, the MAN may be optimized for latency, throughput or both. The optimized MAN is automatically synthesized into gate-level structural Verilog using a flexible library of network building blocks. SOMA has been successfully integrated into an automated C-to-hardware synthesis flow, which generates standard cell circuits from unrestricted ANSI-C programs. Post-layout experiments demonstrate that application specific MAN construction significantly improves power and performance.

关键词： high-level synthesis memory synthesis

来源：评论

学校读者我要写书评

暂无评论

3D Communication system Integrating 3D Reconstruction and Rendering Display 5

3D Communication System Integrating 3D Reconstruction and Re...

引用

5th international conference on Advanced Electronic Materials, Computers and software Engineering, AEMCSE 2022

作者： Zhang, Chaoying Su, Minglan Liu, Qiaoqiao Yang, Mingchuan China Telecom Corporation Limited Beijing Research Institute Beijing102209 China

ISBN: (数字)9781665484749

ISBN: (纸本)9781665484749

In order to solve the problem that the existing 2D video communication has a high bandwidth occupancy rate, the inability to present three-dimensional portraits of characters and the high dependence of three-dimensional projection technology on hardware, we propose a 3D communication framework that integrates 3D reconstruction and rendering display. The framework transmits the video stream to the video encoding module. The video coding module mainly completes the work of face detection, key point feature extraction and depth map feature coding. It is transmitted to the terminal device through the transmission protocol for video decoding and reconstruction. Then combined with the 3D rendering algorithm, virtual viewpoint synthesis and stereo image encoding are performed to realize the 3D reconstruction of the real face. The frame structure opens up the technical path from ordinary 2D video acquisition to 3D communication system implementation. Experiments show that the use of this communication framework for real face 3D reconstruction has higher accuracy and better information fusion. The reconstruction rate can reach 15fps. © 2022 IEEE.

关键词： Three dimensional computer graphics

来源：评论

学校读者我要写书评

暂无评论

Study on combined software and hardware reliability growth model for avionics system

Study on combined software and hardware reliability growth m...

引用

IEEE international conference on Industrial Technology (ICIT)

作者： Yao Yiping Cheng Jun Beijing Aeronautics and Astronautics University Beijing China Xian Air-Force College of Engineering Xi'an China

ISBN: (纸本)0780319788

Modern digital avionics system consist of hardware subsystem and software subsystem, in which there are some characteristics: interaction, real time and so on. In this paper, several combined HW/SW system reliability models published are summarized. A new combined HW/SW system growth model based on Markov processes is presented. How to solve the problem of reliability growth for both hardware and software during the development phase is described. This model could be applied to predict and evaluate the reliability and availability for combined HW/SW computer control system.< >

关键词： hardware Aerospace electronics Markov processes Real time systems software reliability Reliability theory Control system synthesis Predictive models Availability Computer applications

来源：评论

学校读者我要写书评

暂无评论

On leveraging approximations for exact system-level design space exploration: work-in-progress 18

On leveraging approximations for exact system-level design s...

引用

proceedings of the international conference on hardware/software codesign and system synthesis

作者： Kai Neubauer Christian Haubelt Philipp Wanko Torsten Schaub University of Rostock Germany University of Potsdam Germany

ISBN: (纸本)9781538655627

In order to find good design points for embedded systems, an efficient exploration of the design space is imperative. The ever-increasing complexity of embedded systems, however, results in a deterioration of the overall exploration performance. The DSE essentially consists of two parts: (1) the search for feasible solutions and (2) the evaluation of found feasible solutions. While the search has been massively improved by ASPmT-based strategies, the evaluation emerges as the main bottleneck. Tragically, evaluating bad solutions takes as much time as evaluating good ones. Hence, in this paper we study the utilization of approximations in the evaluation process integrated in an ASPmT-based DSE to identify bad solutions more quickly while still retaining the exact Pareto-front.

关键词： system-level design approximation design space exploration

来源：评论

学校读者我要写书评

暂无评论

Synthesizing Secure Reactive Controller for Unmanned Aerial system 6

Synthesizing Secure Reactive Controller for Unmanned Aerial ...

引用

6th international conference on Dependable systems and Their Applications, DSA 2019

作者： Lu, Wei Shu, Shaoxian Shi, Rao Li, Rui Dong, Wei National University of Defense Technology College of Computer Science Changsha China Hunan Institute of Traffic Engineering Changsha China

ISBN: (纸本)9781728160573

Complex CPS such as VAS got rapid development these years, but also became vulnerable to GPS spoofing, packets injection, buffer-overflow and other malicious attacks. Ensuring the behaviors of VAS always keeping secure no matter how the environment changes, would be a prospective direction for VAS security. This paper aims at presenting a reactive synthesisbased approach to implement the automatic generation of secure VAS controller. First, we study the operating mechanism of VAS and construct a high-Ievel model consisting of actuator and monitor. Besides, we analyze the security threats of VAS from the perspective of hardware, software and data transmission, and then extract the corresponding specifications of security properties with LTL formulas. Based on the VAS model and security specifications, the controller can be constructed by GR(l) synthesis algorithm, which is a two-player game process between VAV and Environment. Finally, we expand the function of LTLMoP platform to construct the automatons for controller in multi-robots system, which provides secure behavior strategies under several typical VAS attack scenarios. © 2020 IEEE.

关键词： Controllers

来源：评论

学校读者我要写书评

暂无评论

GPU performance estimation using software rasterization and machine learning

GPU performance estimation using software rasterization and ...

引用

作者： O'Neal, Kenneth Brisk, Philip Abousamra, Ahmed Waters, Zack Shriver, Emily University of California Riverside Winston Chung Hall RiversideCA92521 United States Intel Corporation 2501 NE Century Blvd HillsboroOR97124 United States

This paper introduces a predictive modeling framework to estimate the performance of GPUs during presilicon design. Early-stage performance prediction is useful when simulation times impede development by rendering driver performance validation, API conformance testing and design space explorations infeasible. Our approach builds a Random Forest regression model to analyze DirectX 3D workload behavior when executed by a software rasterizer, which we have extended with a workload characterizer to collect further performance information via program counters. In addition to regression models, this work produces detailed feature rankings which can provide valuable architectural insight, and accurate performance estimates for an Intel integrated Skylake generation GPU. Our models achieve reasonable out-of-sample-error rates of 14%, with an average simulation speedup of 327x. © 2017 ACM.

关键词： Graphics processing unit

来源：评论

学校读者我要写书评

暂无评论

Implementation of DTW Algorithm for Voice Recognition using VHDL

Implementation of DTW Algorithm for Voice Recognition using ...

引用

international conference on Inventive systems and Control (ICISC)

作者： Pandey, Deependra Singh, Kamlesh Kumar Amity Univ Uttar Pradesh Amity Sch Engn & Technol Dept ECE Lucknow Campus Noida India

ISBN: (纸本)9781509047154

In this paper, we present a new approach of implementing DTW algorithm on FPGA for to voice recognition. Speech recognition is a technology where the computer understands the word given through speech, rather than using a keyboard Electronics speech synthesis was developed in 1936 by AT & T, Bell's lab as a research tool However, the first commercial voice recognition or speech recognition device dates back to 1978 when Texas Instruments introduced the first speech synthesizer in the form of children's toy. The first speech recognition software for computers was PLAINTALK by Apple Computers for Macinosh. Speech recognition is the process of finding a linguistic interpretation of a spoken utterance;typically, this means finding the sequence of words that were spoken. This involves preprocessing the acoustic signals to parameterize it in a more usable and useful form. The input signal must be matched against a stored pattern and then makes a decision of accepting or rejecting a match. No two utterances of the same word or sentence are likely to give rise to the same digital signal This obvious point not only underlies the difficulty in speech recognition but also means that we able to extract more than just a sequence of words from the signal When one speaks the same word the time-length of the word changes in each time. Due to this fact, speech recognition results in error or rejection. Dynamic Time Warping algorithm effectively cures such problems. Adopting DTW algorithm, we can produce a chip having word spotting function at a low cost. We have implemented our project on FPGA which takes its place in the continuing evolution of VLSI circuit technology towards the denser and faster circuits. The complete coding for each and every module was done in VHDL. The work was carried out on Xilinx ISE 14. li by Xilinx synthesis Technology and the target device used was XC 4085 XLA-07-hq304 FPGA. We evaluate the performance of system using several different test sets and obse

关键词： voice recognition dynamic time warping hardware description language

来源：评论

学校读者我要写书评

暂无评论

Real time analysis and priority scheduler generation for hardware-software systems with a synthesized run-time system 97

Real time analysis and priority scheduler generation for har...

引用

proceedings of the 1997 IEEE/ACM international conference on Computer-aided design

作者： Vincent J. Mooney, III Giovanni De Micheli Computer Systems Laboratory Stanford University Gates Computer Science Building Stanford CA

ISBN: (纸本)9780818682001

We present a tool, called Clara, that performs real-time analysis and priority assignment for software tasks in a mixed hardware-software system with a custom run-time scheduler. We start from a system described in tasks/threads consisting of hardware specified in Verilog and software specified in C. We obtain the worst case execution time for each individual task. Then, based on the control flow of the application, Clara uses a dynamic programmming algorithm to automatically find optimal priorities for the software tasks assuming no interrupts. Assuming the set of software tasks runs on a microprocessor in a target architecture using a template we provide for the priority scheduler and interrupt code, Clara then finds the worst case execution time for the application with interrupts allowed. Thus, this tool brings real-time analysis to a system level for a particular run-time system. Clara helps a designer minimize the worst case execution time of a mixed hardware-software application.

关键词： hardware-software codesign

来源：评论

学校读者我要写书评

暂无评论

proceedings. Third ACM & IEEE international conference on Formal Methods and Models for Co-Design (IEEE Cat. No. 05EX1093) 05

Proceedings. Third ACM & IEEE International Conference on Fo...

引用

proceedings of the 2nd ACM/IEEE international conference on Formal Methods and Models for Co-Design

来源：评论

学校读者我要写书评

暂无评论

Zynq system-on-Chip DMA Messaging for Processor Monitoring

Zynq System-on-Chip DMA Messaging for Processor Monitoring

引用

16th international conference on Cyber Warfare and Security (ICCWS)

作者： Koranek, Daniel Hodson, Douglas Graham, Scott US Air Force Inst Technol Wright Patterson AFB OH 45433 USA

ISBN: (纸本)9781912764884

Xilinx Zynq-7000 system-on-Chip architectures combine an ARM Cortex-A9 core with an FPGA fabric. One benefit of this hybrid architecture is that it allows fast prototyping of designs where the security of either the processing system (PS) is monitored by the programmable logic (PL) or vice versa. The choice of implementing a design in the PS or PL is driven by cost-to-benefit analysis across many factors. This effort examines the design process required to construct security monitoring designs that use both the PS and PL. For background, this effort reviews similar security monitoring projects. For the effort, a PL peripheral was implemented to handle data transfer. This peripheral implements the AXI-Stream protocol and allows FIFO behavior but can be modified to allow processing on incoming and outgoing data. The design passes testing in simulation but does not always pass testing when implemented on physical hardware and monitored with the system ILA. Failure was attributed to unknown aspects of the synthesis and implementation process, coupled with the interaction of the system ILA. Two avenues of further research are 1) the monitoring of a softcore processor using software on the Zynq ARM Cortex-A9 core;or, 2) alternately, utilizing the FPGA fabric to monitor CoreSight trace output from the ARM Cortez-A9 core with the goal of coupling either trace system to a machine-learning based malware detection system. If further research is successful, it would enable dynamic analysis of processor execution for the purpose of malware detection and be suitable for embedded system use. One barrier to a dynamic analysis system of this type is the bandwidth of the AXI system, trace information size, and the relative clock rates of the PS and PL. To handle this barrier, dynamic monitoring systems will use only a subset of the real-time data and adjust clock rates of the system design.

关键词： dynamic analysis malware detection system-on-chip Xilinx FPGA

来源：评论

学校读者我要写书评

暂无评论

没有更多数据了...

全选清除本页清除全部题录导出标记到“检索档案”

共156页 << < 128 129 130 131 132 133 134 135 136 137 > >>

检索报告对象比较合并检索0

隐藏清空

合并搜索

回到顶部

执行限定条件

内容：

评分：

请选择保存的检索档案：

请选择收藏分类：

订阅名称：

通借通还

温馨提示：

图书名称：

借书校区：

取书校区：

手机号码：

邮箱地址：

一卡通帐号：

电话和邮箱必须正确填写，我们会与您联系确认。

联系人：

所在院系：

联系邮箱：

联系电话：

内蒙古自治区呼和浩特市赛罕区大学西街235号邮编: 010021

建议与咨询 留下您的常用邮箱和电话号码，以便我们向您反馈解决方案和替代方法

时间限定

文献类型

馆藏选择

核心期刊

语言

文献类型

帮助

文字说明：

检索规则说明：

检索范例：

分类表

所选分类

限定检索结果

文献类型

馆藏范围

日期分布

学科分类号

主题

机构

作者

语言

请选择保存的检索档案： 新增检索档案 确定 取消

请选择收藏分类： 新增自定义分类 确定 取消

通借通还

建议与咨询留下您的常用邮箱和电话号码，以便我们向您反馈解决方案和替代方法

请选择保存的检索档案：

请选择收藏分类：