检索结果-内蒙古大学图书馆

您好，读者！请登录

内蒙古大学图书馆

首页
概况
党建
资源
服务
科研支持
- 论文收录引用证明
- 科技查新
知识产权
档案馆
帮助

咨询与建议

建议与咨询留下您的常用邮箱和电话号码，以便我们向您反馈解决方案和替代方法

您的常用邮箱：*

您的手机号码：*

问题描述：

当前已输入0个字，您还可以输入200个字

全部搜索
期刊论文
图书
学位论文
标准
纸本馆藏
外文资源发现
数据库导航
超星发现

高级检索

时间限定

出版年份：

文献类型

图书期刊文献学位论文多媒体

馆藏选择

电子馆藏纸本馆藏

核心期刊

全部期刊 SCI 收录期刊 SSCI 收录期刊 EI 收录期刊 CSCD 收录期刊 CSSCI 收录期刊

语言

中文英文

文献类型

期刊文献图书学位论文标准纸本馆藏

帮助

文字说明：

T=题名（书名、题名），A=作者（责任者），K=主题词，P=出版物名称，PU=出版社名称，O=机构（作者单位、学位授予单位、专利申请人），L=中图分类号，C=学科分类号，U=全部字段，Y=年（出版发行年、学位年度、标准发布年）

检索规则说明：

AND代表“并且”；OR代表“或者”；NOT代表“不包含”；(注意必须大写,运算符两边需空一格)

检索范例：

范例一：(K=图书馆学 OR K=情报学) AND A=范并思 AND Y=1982-2016
范例二：P=计算机应用与软件 AND (U=C++ OR U=Basic) NOT K=Visual AND Y=2011-2016

分类表

所选分类

>> <<

限定检索结果

文献类型

1,497 篇 会议
55 篇 期刊文献

馆藏范围

1,552 篇 电子文献
0 种 纸本馆藏

日期分布

学科分类号

798 篇 工学
- 737 篇 计算机科学与技术...
- 559 篇 软件工程
- 153 篇 电气工程
- 135 篇 电子科学与技术（可...
- 103 篇 信息与通信工程
- 74 篇 控制科学与工程
- 22 篇 机械工程
- 13 篇 动力工程及工程热...
- 11 篇 光学工程
- 10 篇 建筑学
- 9 篇 仪器科学与技术
- 9 篇 生物工程
- 8 篇 材料科学与工程（可...
- 8 篇 土木工程
- 8 篇 生物医学工程（可授...
- 7 篇 安全科学与工程
- 6 篇 航空宇航科学与技...
179 篇 理学
- 104 篇 数学
- 48 篇 系统科学
- 39 篇 物理学
- 16 篇 统计学（可授理学、...
- 9 篇 生物学
- 6 篇 化学
108 篇 管理学
- 89 篇 管理科学与工程(可...
- 29 篇 工商管理
- 23 篇 图书情报与档案管...
15 篇 法学
- 11 篇 社会学
5 篇 经济学
- 5 篇 应用经济学
5 篇 教育学
- 5 篇 教育学
5 篇 医学
- 5 篇 临床医学
4 篇 艺术学
1 篇 农学

主题

359 篇 hardware
177 篇 computer archite...
162 篇 embedded system
135 篇 application soft...
87 篇 field programmab...
83 篇 embedded systems
75 篇 control system s...
69 篇 costs
67 篇 high level synth...
65 篇 computational mo...
65 篇 algorithm design...
64 篇 system-on-a-chip
63 篇 permission
62 篇 embedded softwar...
61 篇 real time system...
52 篇 timing
50 篇 system-on-chip
48 篇 computer science
47 篇 energy consumpti...
46 篇 space exploratio...

机构

10 篇 department of el...
8 篇 univ calif river...
8 篇 center for embed...
6 篇 school of comput...
6 篇 arizona state un...
6 篇 center for embed...
6 篇 department of co...
5 篇 princeton univ d...
5 篇 school of inform...
5 篇 department of co...
5 篇 philips research...
5 篇 institute for in...
5 篇 technische unive...
4 篇 department of el...
4 篇 ibm thomas j. wa...
4 篇 imec leuven
4 篇 politecn torino ...
4 篇 university of er...
4 篇 tu braunschweig
4 篇 university of do...

作者

9 篇 sri parameswaran
9 篇 ogras umit y.
9 篇 parameswaran sri
9 篇 nikil dutt
7 篇 rolf ernst
7 篇 dick robert p.
7 篇 dutt nikil
7 篇 robert p. dick
7 篇 leupers rainer
7 篇 vahid f
6 篇 jiang wei
6 篇 greg stitt
6 篇 teich juergen
6 篇 mitra tulika
6 篇 rainer leupers
6 篇 andreas gerstlau...
6 篇 a. sangiovanni-v...
6 篇 r. ernst
6 篇 jha niraj k.
5 篇 sungjoo yoo

语言

1,545 篇 英文
5 篇 其他
2 篇 中文

检索条件"任意字段=Proceedings of the International Conference on Hardware/Software Codesign and System Synthesis"

共 1552 条记录，以下是1381-1390 订阅

全选清除本页清除全部题录导出标记到"检索档案"

详细简洁

排序：

Speed and resource issues on algorithm design and implementation with hardware

Speed and resource issues on algorithm design and implementa...

引用

international conference on ASIC

作者： Dai Zibin Zhang Shunxin The PLA Information Engineering University Zhengzhou China

Speed and resource issues on algorithm design and implementation with hardware are discussed in this paper. Two approaches to improve system-processing speed and to save logic resource have been proposed. Furthermore,... 详细信息

关键词： Algorithm design and analysis hardware Logic devices Logic functions Computer aided software engineering Circuit synthesis Logic design Logic circuits Delay Clocks

来源：评论

学校读者我要写书评

暂无评论

SEAS: a system for early analysis of SoCs 03

SEAS: a system for early analysis of SoCs

引用

proceedings of the 1st IEEE/ACM/IFIP international conference on hardware/software codesign and system synthesis

作者： Reinaldo A. Bergamaschi Youngsoo Shin Nagu Dhanwada Subhrajit Bhattacharya William E. Dougherty Indira Nair John Darringer Sarala Paliwal IBM T.J. Watson Research Center Yorktown Heights NY IBM EDA Laboratory Fishkill NY

ISBN: (纸本)9781581137422

systems-on-chip (SoC) continue to be very complex to design and verify, despite extensive component reuse. Although reusable components are pre-designed and pre-verified, when they are assembled in an SoC there is no guarantee that the whole system will behave as expected from a performance, cost and integration point of view. In many cases this is because of faulty early design decisions regarding the architecture, core selection, floorplanning, etc. This paper presents a system for early analysis of SoCs which helps designers make early design decisions regarding performance, area, timing and power; and allows them to quickly evaluate cross-domain effects, such as the effect that an architectural decision may have on the performance and chip area.

关键词： design analysis floorplanning design space exploration power performance

来源：评论

学校读者我要写书评

暂无评论

ASIC design using the high-level synthesis system CALLAS: a case study

ASIC design using the high-level synthesis system CALLAS: a ...

引用

IEEE international conference on Computer Design: VLSI in Computers and Processors, (ICCD)

作者： M. Koster M. Geiger P. Duzy Corporate Research and Development Siemens AG Munich Germany

The Siemens high-level synthesis system CALLAS was used to synthesize an ASIC for moving-object detection consisting of 3400 equivalent gates. The digital signal processing (DSP) problem was formulated on algorithmic level in the hardware description language DSDL as a three-page algorithm. Only a few days were needed from specification to the chip layout. Design steps included were high-level behavior simulation, library mapping, and standard cell layout generation using a state-of-the-art physical design system. The authors give a brief overview of the CALLAS system, introduce the DSP example, and discuss the synthesis process and the simulations performed.< >

关键词： Application specific integrated circuits High level synthesis Computer aided software engineering Circuit synthesis Object detection Libraries Algorithm design and analysis Research and development Digital signal processing chips hardware design languages

来源：评论

学校读者我要写书评

暂无评论

APECS: An AADL and polychrony based embedded computing system design environment with an elevator control case study 13

APECS: An AADL and polychrony based embedded computing syste...

引用

proceedings of the Eleventh ACM/IEEE international conference on Formal Methods and Models for codesign

ISBN: (纸本)9781479909056

Architecture Analysis and Design Language (AADL) is a standard that originated in the avionics domain, but is now being used in avionics and other critical distributed real-time embedded system design. AADL provides a formal notation and semantics for capturing an entire distributed platform architecture (hardware components, protocols, and software architecture annotated with properties including real-time measures). The software architecture captures the location and structure of processes, threads, and the data and control flow specifications. The behavior of the processes/threads/subprograms are provided via a native state machine language or via a behavioral annex. Schedulability, performance, and other system level properties can be analyzed using various tools. Even code synthesis - targeting the formally described platform components and middleware can be enabled if the threads/processes can be behaviorally specified. In this paper, we describe our methodology and a design environment both named APECS. APECS is meant for enabling an end-to-end distributed real-time embedded system design which integrates a number of existing tools, and our own polychronous language based specification language MRICDF, and the corresponding synthesis methodology. While the environment is in an advanced stage of development, we illustrate the architecture of the design environment, and illustrate the methodology through a non-trivial case study. The case study uses APECS methodology and tools in developing the distributed control for a 4 bank elevator system in a 5 story building. We posit this paper as a methodology and tool paper and it is written in a tutorial spirit rather than a paper describing new theories or algorithms.

关键词：

来源：评论

学校读者我要写书评

暂无评论

system-level performance estimation strategy for sw and hw

System-level performance estimation strategy for sw and hw

引用

IEEE international conference on Computer Design: VLSI in Computers and Processors, (ICCD)

作者： A. Allara C. Brandolese W. Fornaciari F. Salice D. Sciuto Central Res. Labs. ITALTEL Italy Politecnico di Milano Milan Italy CEFRIEL Milan Italy

The design of an embedded system is a process where the tuning of the architecture should take into account both the functionality and the timing performance while considering the heterogeneity of the hw and sw components. The goal of this paper is to present the new model developed during the SEED Esprit project, to estimate the software and hardware characteristics for cosimulation and profiling within the TOSCA codesign framework. The impact on the design space exploration of such an high-level cosimulation strategy has been tested by considering as a benchmark the reengineering of an industrial device.

关键词： Timing Electrical capacitance tomography Space exploration Space technology Testing Aerospace industry Design automation Embedded system Process design Analytical models

来源：评论

学校读者我要写书评

暂无评论

Dynamic reconfiguration of distributed arithmetic controllers: design space exploration and trade-off analysis

Dynamic reconfiguration of distributed arithmetic controller...

引用

international Symposium on Parallel and Distributed Processing (IPDPS)

作者： K. Danne C. Bobda Heinz Nixdorf Institute University of Paderborn Paderborn Germany Hardware/Software Codesign Institute University of Erlangen Nuremberg Erlangen Germany

Summary form only given. This work explores various solutions to implement an application using runtime reconfigurable field programmable gate arrays (FPGA). The example is a mechatronic control system which has to adapt its behavior from time to time. Our model is a task-graph where every task is associated with an hardware module characterized by its required FPGA resource and its execution time. We propose various mappings of the tasks onto the FPGA. For the implementation of the tasks themselves the computation technique known as distributed arithmetic is used. We achieve numerous alternatives with different resource consumptions and execution times for every task. We estimate these characteristics and compare them to synthesis results. The received values are used to get the characteristics of the over-all system. The results show that the optimal mapping depends on the application timing constrains, on the complexity of the tasks as well as on the reconfiguration speed of the used FPGA.

关键词： Arithmetic Distributed control Space exploration Field programmable gate arrays Runtime Mechatronics Control systems hardware Distributed computing Timing

来源：评论

学校读者我要写书评

暂无评论

High level design: a design vision for the 90's

High level design: a design vision for the 90's

引用

IEEE international conference on Computer Design: VLSI in Computers and Processors, (ICCD)

作者： A.J. de Geus Synopsys Inc. Mountain View CA USA

Summary form only given. The amount of electrical engineering knowledge required in semiconductor design is decreasing and the process is now mimicking software design. Design re-use is moving upstream with sophisticated subsystems and flexible, technology-independent building blocks becoming available from ASIC vendors and other sources. The time spent debugging the applications software is vastly exceeding the development time invested in the hardware. Driven by the opportunity of million-plus gates ASICs on the one hand, sophisticated synthesis and simulation tools on the other, the design paradigm for most designers is shifting from the gate level to the functional level. With this shift comes the move to hardware description languages, increased design re-use, and active trade-off between software and hardware implementations. The author highlights the status and progress of this evolution and discusses its impact on semiconductor and system design in the coming years.< >

关键词： Application specific integrated circuits hardware design languages Computer languages Testing Process design Electrical engineering software design Buildings Debugging Application software

来源：评论

学校读者我要写书评

暂无评论

Transformational partitioning for co-design of multiprocessor systems

Transformational partitioning for co-design of multiprocesso...

引用

IEEE international conference on Computer-Aided Design

作者： Marchioro Daveau Jerraya System Level Synthesis Group TIMA INPG Grenoble France

This paper presents the underlying methodology of Cosmos, an interactive approach for hardware/software co-design capable of handling multiprocessor systems and distributed architectures. The approach covers the co-design process through a set of user guided transformations allowing semi-automatic partitioning. The transformations are based on a powerful set of primitives for functional partitioning, structural reorganization and communication transformation. It leads to a fast transformation of a system-level specification into an architecture with a short design time and fast exploration of design space. The application of this approach is illustrated using a design example starting from a system-level specification given in SDL to a distributed hardware/software architecture described in C/VHDL. We show that the use of transformational approach allows: 1) application of the expertise of the designer during partitioning; 2) the user to understand the results of the co-design process; 3) the process to take into account partial existing solutions; 4) large design space exploration; and 5) the designer to start from a very high-level specification language of the system to be designed.

关键词： High-level synthesis

来源：评论

学校读者我要写书评

暂无评论

The EPS464-a function specific EPLD for the synthesis of complex waveforms and control applications

The EPS464-a function specific EPLD for the synthesis of com...

引用

Annual IEEE international conference and Exhibit ASIC

作者： R.S. Terrill Applications Engineering Altera Corporation San Jose CA USA

The EPS464 synchronous timing generator is an erasable programmable logic device (EPLD) with an architecture tailored for the synthesis of complex waveforms for control and synchronization applications. Using the Altera hardware description language (AHDL) together with the waveform design entry facility in the MAX+PLUS II development software, designers can quickly and economically develop custom controllers and state machines.< >

关键词： PROM Control systems Signal generators Counting circuits Logic devices Programmable logic devices Timing Computer architecture Control system synthesis Application software

来源：评论

学校读者我要写书评

暂无评论

Reliability-aware co-synthesis for embedded systems

Reliability-aware co-synthesis for embedded systems

引用

international conference on Application Specific systems (ASAP), Architectures and Processors

作者： Y. Xie L. Li M. Kandemir N. Vijaykrishnan M.J. Irwin Department of Computer Science and Engineering Pennsylvania State University USA Department of Computer Science and Engineering Pennsylvania State University

As technology scales, transient faults due to single event upsets have emerged as a key challenge for reliable embedded system design. This work proposes a design methodology that incorporates reliability into hardware-software co-design paradigm for embedded systems. We introduce an allocation and scheduling algorithm that efficiently handles conditional execution in multi-rate embedded systems, and selectively duplicates critical tasks to detect soft errors, such that the reliability of the system is increased. The increased reliability is achieved by utilizing the otherwise idle computation resources and incurs no resource or performance penalty. The proposed algorithm is fast and efficient, and is suitable for use in the inner loop of our hardware/software co-synthesis framework, where the scheduling routine has to be invoked many times.

关键词： Embedded system hardware Single event upset Costs Scheduling algorithm Aerospace electronics Computer architecture Signal processing algorithms Application software Time to market

来源：评论

学校读者我要写书评

暂无评论

没有更多数据了...

全选清除本页清除全部题录导出标记到“检索档案”

共156页 << < 135 136 137 138 139 140 141 142 143 144 > >>

检索报告对象比较合并检索0

隐藏清空

合并搜索

回到顶部

执行限定条件

内容：

评分：

请选择保存的检索档案：

请选择收藏分类：

订阅名称：

通借通还

温馨提示：

图书名称：

借书校区：

取书校区：

手机号码：

邮箱地址：

一卡通帐号：

电话和邮箱必须正确填写，我们会与您联系确认。

联系人：

所在院系：

联系邮箱：

联系电话：

内蒙古自治区呼和浩特市赛罕区大学西街235号邮编: 010021

建议与咨询 留下您的常用邮箱和电话号码，以便我们向您反馈解决方案和替代方法

时间限定

文献类型

馆藏选择

核心期刊

语言

文献类型

帮助

文字说明：

检索规则说明：

检索范例：

分类表

所选分类

限定检索结果

文献类型

馆藏范围

日期分布

学科分类号

主题

机构

作者

语言

请选择保存的检索档案： 新增检索档案 确定 取消

请选择收藏分类： 新增自定义分类 确定 取消

通借通还

建议与咨询留下您的常用邮箱和电话号码，以便我们向您反馈解决方案和替代方法

请选择保存的检索档案：

请选择收藏分类：