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检索条件"任意字段=Proceedings of the International Conference on Hardware/Software Codesign and System Synthesis"

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software synthesis through task decomposition by dependency analysis

Software synthesis through task decomposition by dependency ...

引用

IEEE international conference on Computer-Aided Design

作者： Youngsoo Shin Kiyoung Choi School of Electrical Engineering Seoul National University Seoul South Korea

ISBN: (纸本)0818675977

Latency tolerance is one of main problems of software synthesis in the design of hardware-software mixed systems. This paper presents a methodology for speeding up systems through latency tolerance which is obtained by decomposition of tasks and generation of an efficient scheduler. The task decomposition process focuses on the dependency analysis of system i/o operations. Scheduling of the decomposed tasks is performed in a mixed static and dynamic fashion. Experimental results show the significance of our approach.

关键词： hardware Yarn Dynamic scheduling Delay Control system synthesis Microcontrollers Embedded software software performance software systems Embedded system

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hardware-software codesign of resource-constrained real-time systems

Hardware-software codesign of resource-constrained real-time...

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IEEE international conference on Embedded and Real-Time Computing systems and Applications (RTCSA)

作者： Sungjoo Yoo Jinhwan Jeon Seongsoo Hong Kiyoung Choi Sch. of Electr. Eng. Seoul Nat. Univ. South Korea School of Electrical Engineering Seoul National University Seoul South Korea

This paper presents a hardware-software (HW-SW) partitioning algorithm to be used in HW-SW codesign of an embedded real-time system. The algorithm interacts with the period calibration method such that the period assignment and HW-SW partitioning of real-time tasks are considered in a single framework. The partitioning algorithm makes use of three heuristics and one random transformation rule in order to quickly find a feasible HW-SW partition which most likely leads to the minimum HW cost design. As an experimental study, two partitioning algorithms, one that is based on the proposed heuristics and the other based on simulated annealing have been implemented. We have performed preliminary experiments and present the result.

关键词： Real time systems Partitioning algorithms Timing Calibration Algorithm design and analysis Application specific integrated circuits Scheduling algorithm Kernel Costs Simulated annealing

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Model refinement for hardware-software codesign 96

Model refinement for hardware-software codesign

引用

European Design and Test (ED&TC) conference

作者： Jie Gong D.D. Gajski S. Bakshi Semiconductor Systems Design Technolog Motorola Inc. Tempe AZ USA Department of Information and Computer Science University of California Irvine CA USA

ISBN: (纸本)9780818674235

The model refinement task in system-level synthesis transforms a specification from a functional model to a chosen implementation model. In this paper, we categorize several commonly-used implementation models and then describe a set of refinement procedures to transform a specification to each of these implementation models. We also present a set of experimental results to compare the implementation models and to demonstrate how the proposed approach is used to explore different implementation styles.

关键词： Application specific integrated circuits Computer science hardware

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High speed video board as a case study for hardware-software co-design

High speed video board as a case study for hardware-software...

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IEEE international conference on Computer Design: VLSI in Computers and Processors, (ICCD)

作者： D. Herrmann E. Maas M. Trawny R. Ernst P. Ruffer M. Seitz S. Hasenzahl Tech. Univ. Braunschweig Germany Vechnische Universität Braunschweig Germany Broadcast Television Systems ICC Weiterstadt Germany

We present experiences with the hardware/software co-design of a high-performance video board using co-synthesis and high-level synthesis tools. Consisting of a multiprocessor DSP, a coprocessor, 4 local memory banks and interface and switching circuits, the board executes one of two professional studio algorithms with very different characteristics. This board could replace a much larger system currently in use. While the CAD tools allowed for a widely automated what-if analysis and were also used for most of the final design. The design process also highlighted some missing links in an optimizing co-design of high-performance systems. These missing links still prevent an efficient hardware/software optimization process. Flexibility requirements played an important role in the design process and had a massive impact on the target architecture, the hardware/software distribution, and the tool application.

关键词： hardware software tools Process design High level synthesis Digital signal processing Coprocessors Switching circuits Design automation Design optimization Application software

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Interface synthesis in heterogeneous system-level DSP design tools

Interface synthesis in heterogeneous system-level DSP design...

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international conference on Acoustics, Speech, and Signal Processing (ICASSP)

作者： J.L. Pino M.C. Williamson E.A. Lee Department of Electrical Engineering and Computer Science University of California Berkeley CA USA

We describe a framework that constructs interfaces between simulation tools and real-time prototyping hardware in a high-level DSP synthesis environment. A goal of this work is to abstract the concept of the interface so that customized links are not required between each simulation and hardware engine. To support a new engine, the DSP system designer must define two pairs of communication primitives between the new tool and host workstation. The interface construction mechanism provides incremental compilation of subsystems in a system specification into the high-level DSP synthesis environment. We illustrate this framework with practical examples that have been constructed in Ptolemy.

关键词： Digital signal processing Engines hardware Computational modeling Virtual prototyping Workstations Discrete event simulation Limiting Computer simulation software prototyping

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17th international conference on Application and Theory of Petri Nets, 1996

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17th international conference on Application and Theory of Petri Nets, 1996

ISBN: (纸本)3540613633

The proceedings contain 29 papers. The special focus in this conference is on Application and Theory of Petri Nets. The topics include: Actors, nets, and the problem of abstraction and composition;temporal uncertainty and fuzzy-timing high-level petri nets;compositionality in state space verification methods;on liveness and controled siphons in petri nets;behavioral and structural composition rules preserving liveness by synchronization for colored FIFO nets;high level synthesis of synchronous parallel controlers;non sequential semantics for contextual P/T nets;integrating hardware and software models;designing and verifying a communications gateway using colored petri nets and design/CPN;expected impulse rewards in markov regenerative stochastic petri nets;asynchronous composition of high level petri nets;a formal definition of hierarchical predicate transition nets;reduced state space representation for unbounded vector state spaces;modeling and analysis of distributed program execution in BETA using colored petri nets;reachability analysis based on structured representations;the SEA language for system engineering and animation;a new iterative numerical solution algorithm for a class of stochastic petri nets;a structural approach for the analysis of petri nets by reduced unfoldings;the consistent use of names and polymorphism in the definition of object petri nets;designing a security system by means of colored petri nets;modeling and analysing DART systems through high-level petri nets;behavioral equivalence for infinite systems;topological aspects of traces and asynchronous control device design by net model behavior simulation.

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A codesign case study: implementing arithmetic functions in FPGAs

A codesign case study: implementing arithmetic functions in ...

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international conference and Workshop on Engineering of Computer-Based systems

作者： I.V. Klotchkov S. Pedersen Department of Information Technology Technical University of Denmark Lyngby Denmark

Different ways of implementing and designing arithmetic functions for 16/32 bit integers in FPGA technology are studied. A comparison of four different design methods is also included. The results are used to increase the overall system performance in a dedicated 3D image analysis prototype system by moving a vector length calculation from software to hardware. The conclusion is that by adding one relatively simple board containing two FPGAs in the prototype setup, the total computing time is reduced by 30%. The total amount of image data, in this case 300 Mbyte, which has to be transmitted via the network is reduced by a factor of two, and the required network bandwidth is reduced similarly.

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The methodology of rough controller synthesis

The methodology of rough controller synthesis

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IEEE international conference on Fuzzy systems (FUZZ-IEEE)

作者： A. Mrozek L. Plonka J. Kedziera Institute of Theoretical and Applied Computer Science Polish Academy of Sciences Gliwice Poland

The rough controller is a processor of decision tables whose design is motivated by rough set theory. The paper briefly presents our implementation of the rough controller and formulates a methodology of rough control system synthesis. The methodology defines the steps of the synthesis process, from knowledge acquisition to verification to implementation.

关键词： Set theory Humans Machine learning Automatic control Knowledge based systems hardware Signal synthesis software tools Process control Computer science

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Investigation into the effects of quantisation noise on a digital FM modulator

Investigation into the effects of quantisation noise on a di...

引用

IEEE Region 10 international conference TENCON

作者： S. Twelves C.J. Kikkert Department of Electrical and Computer Engineering James Cook University QLD Australia

Test hardware for a digital FM modulator has been built using a direct digital synthesiser with a variable bit output. Both hardware and software simulations of the test system have been used to show that a 10 bit out... 详细信息

关键词： Quantization Digital modulation Frequency modulation hardware Clocks Voltage-controlled oscillators Testing Distortion Table lookup Signal synthesis

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Generation of BDDs from hardware algorithm descriptions

Generation of BDDs from hardware algorithm descriptions

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IEEE international conference on Computer-Aided Design

作者： Shin-Ichi Minato NTT Systems Electronics Laboratories Japan

ISBN: (纸本)0818675977

We propose a new method for generating BDDs from hardware algorithm descriptions written in a programming language. Our system can deal with control structures, such as conditional branches (if-then-else) and data dependent loops (while-end). Once BDDs are generated, we can immediately check the equivalence of two different algorithm descriptions just by comparing BDDs. This method can also be applied to verification between algorithm-level and gate-level designs. Another interesting application is to synthesize loop-free logic circuits from algorithm descriptions. We show the experimental results for some practical examples, such as Greatest Common Divisor (GCD) calculation. Although our method has a limitation in size of problems, it is very practical and useful for actual design verification.

关键词： Data structures Boolean functions Algorithm design and analysis Arithmetic Laboratories Control systems Circuit synthesis Logic circuits hardware design languages software algorithms

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