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检索条件"任意字段=Proceedings of the International Conference on Hardware/Software Codesign and System Synthesis"

共 1551 条记录，以下是1481-1490 订阅

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An improved systolic extended Euclidean algorithm for Reed-Solomon decoding: design and implementation

An improved systolic extended Euclidean algorithm for Reed-S...

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international conference on Application Specific Array Processors

作者： R. Doyle P. Fitzpatrick J. Nelson National Microelectronics Research Centre University College Cork Ireland Department of Electronic and Computer Engineering University of Limerick Ireland

The extended Euclidean algorithm (XEA) is the basis of one of the methods used for solving the key equation which arises in decoding Reed-Solomon error correcting codes. The algorithm is implemented using an Advanced Micro Devices electrically programmable gate array (EPGA) development system. This PC based software uses ORCAD schematic entry and simulation in conjunction with an AMD interface. EPGAs were chosen for the circuit design because of the ease of obtaining a silicon prototype once the circuit has been verified. The facility for direct programming of the IC from the PC means circuit revisions in hardware are quickly realized; this, coupled with efficient entry and simulation package, gives a much speedier design cycle than conventional masked silicon approaches. The advantages of the algorithm over existing designs are noted.< >

关键词： Reed-Solomon codes Circuit simulation Silicon Equations Decoding Error correction codes Circuit synthesis software prototyping Prototypes hardware

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hardware-software co-synthesis of low power real-time distributed embedded systems with dynamically reconfigurable FPGAs

Hardware-software co-synthesis of low power real-time distri...

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Asia and South Pacific Design Automation conference

作者： L. Shang N.K. Jha Department of EE Princeton University USA

ISBN: (纸本)0769514413

In this paper, we present a multi-objective hardware-software co-synthesis system for multi-rate, real-time, low power distributed embedded systems consisting of dynamically reconfigurable FPGAs, processors, and other system resources. We use an evolutionary algorithm based framework for automatically determining the quantity and type of different system resources, and then assigning tasks to different processing elements (PEs) and task communications to communication links. For FPGAs, we propose a two-dimensional, multi-rate cyclic scheduling algorithm, which determines task priorities based on real-time constraints and reconfiguration overhead information, and then schedules tasks based on the resource utilization and reconfiguration condition in both space and time. The FPGA scheduler is integrated in a list-based system scheduler. To the best of our knowledge, this is the first multi-objective co-synthesis system, which uses dynamically reconfigurable devices to synthesize a distributed embedded system, to target simultaneous optimization of system price and power. Experimental results indicate that our method can reduce schedule length by an average of 41.0% and reconfiguration power by an average of 46.0% compared to the previous method. It also yields multiple system architectures which trade off system price and power under real-time constraints.

关键词： Real time systems Embedded system Field programmable gate arrays Energy consumption Evolutionary computation Resource management Scheduling algorithm hardware Reconfigurable architectures Contracts

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A goal tree based high-level test planning system for DSP real number models

A goal tree based high-level test planning system for DSP re...

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IEEE international Test conference

作者： M. Lin J.R. Armstrong F.G. Gray VLSI Technology Center Hewlett Packard Company Fort Collins CO USA Bradley Department of Electrical and Computer Engineering Virginia Polytechnic Institute and State University Blacksburg VA USA

This paper presents a high-level test planning system for validating DSP real number models. It uses a goal tree structure as a framework of test planning and documenting. The goal tree based test plans are linked to the test bench generator, which creates test benches for simulation. The simulation results are checked and fed back to the test plans and new test benches are created accordingly. A GUI-based integrated software system has been developed for test planning and test automation based on this methodology. To illustrate this methodology, this paper uses the Synthetic Aperture Radar system as a case study. Finally, completeness and effectiveness of the generated test set are evaluated using structural approaches. Results of test set compaction are also presented.

关键词： system testing Digital signal processing software testing hardware design languages Circuit testing Circuit synthesis Automatic testing Integrated circuit synthesis Process design Application specific integrated circuits

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Spoken-word direction of computer program synthesis 00

Spoken-word direction of computer program synthesis

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proceedings of the international conference on APL-Berlin-2000 conference

作者： Alvin J. Surkan University of Nebraska Lincoln Nebraska

ISBN: (纸本)9781581131826

Prototype software is being designed to orchestrate speech-directed synthesis of customizable computer programs. The problems encountered are considered from a perspective that assumes the notation, syntax and function structure of APL. Program synthesis is to be completed with spoken-word dialogs between humans and computers. The computer is to assist in constructing programs with minimal or zero need for mechanical contact between mobile users and computer hardware. During synthesis, the system is to respond audibly and, only when necessary, visually. Spoken commands that invoke functions must be easily recognized in a limited vocabulary in a given context for interactively completing specification of each program. Experimentation with prototype system is expected to facilitate the replacement of conventional text-entry programming systems by that a practical one for speech-directed program synthesis and development.

关键词： constructive composition of functional programs voice-directed programming computer program synthesis voice computing chatting in context incremental verbal software specification talking with computers human-computer interface spoken computer commands

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Interface Implementation Using Ajax for Web-Based Instruction Set Simulator

Interface Implementation Using Ajax for Web-Based Instructio...

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international conference on Advanced Information Networking and Applications Workshops (AINAW)

作者： Hideaki Yanagisawa Minoru Uehara Hideki Mori Computer Science and Electronic Engineering Tokuyama College of Technology Japan Information and Computer Sciences Toyo University Japan

SSC-DASH (Server Side C-like Design Automation Shell) has been developed as a Web-based HW/SW codesign tool for designing processors. SSC-DASH obtains a processor definition file via Web browser and generates a HW (synthesizable Verilog-HDL description) and SWDE (software Development Environment) for the generated processor. The SWDE includes ISS (Instruction Set Simulator), assembler, disassembler and compiler. For the verification of the defined processor, processor developers have to download the generated SWDE, every time, even where changes are small. To improve the usability of this system a Web-based interface for the generated SWDE is implemented using Ajax. Using Ajax, download of the SWDE becomes unnecessary and makes it possible to verify the processor on the server quickly and easily. This greatly improves the usability of the SWDE. In this paper, we describe implementation of Web-based ISS using Ajax.

关键词： hardware design languages Assembly Process design Java Programming Usability Instruction sets Computer architecture Web pages Control system synthesis

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An EKF-based algorithm for automatic tuning and control of electrical drives

An EKF-based algorithm for automatic tuning and control of e...

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international conference on Industrial Electronics, Control and Instrumentation

作者： E. Bassi F. Benzi G. De Nicolao Dipartimento di Ingegneria Elettrica Università di Pavia Pavia Italy Dipartimento di Informatica e Sistemistica Università di Pavia Pavia Italy

The paper presents a DSP-based procedure for the automatic tuning of speed and position controllers of electrical drives. The procedure is based on an identification algorithm (namely an extended Kalman filter) for the determination of the parameters of the system model, assumed as a first-order lag defined by its mechanical constant. The algorithm, which is executed at the start-up of the drive, transfers its results to another procedure which exploits the identified parameters for the optimal tuning of the drive motion controllers. The tuning is carried out off-line in discrete time. Theoretical and experimental results of the chosen tuning procedure are reported. For the design and testing of both the identification and regulation algorithm a simple PC-based tool has been developed, which provides the hardware support to command different actuators, together with the required software facilities.< >

关键词： Automatic control Communication system control Control system synthesis Optimal control Motion control Algorithm design and analysis software testing software algorithms hardware Actuators

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CFSMcharts: a new language for microprocessor based system design

CFSMcharts: a new language for microprocessor based system d...

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international conference on VLSI Design

作者： P.S. Roop A. Sowmya School of Computer Science and Engineering University of New South Wales Sydney NSW Australia

Component-based design is a well known engineering design method that uses prefabricated components with known properties to design larger systems. We propose a new language called CFSMcharts for component-based design of microprocessor based systems. In this domain, there exists a vast library of programmable devices, which may be used during design synthesis for cheap bulk production of these systems. However, the use of these components during design synthesis is still low-key. CFSMcharts will alleviate the above problem by encouraging the use of programmable components during design synthesis. The language is an extension of CFSMs proposed recently to model the behaviour of programmable components. We also propose a formal semantics of the above language based on the concept of Sequence Function Trees (SFTs).

关键词： Microprocessors Specification languages Computer science Design engineering Australia Design methodology Production hardware software libraries Costs

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Blue matter on blue gene/L: massively parallel computation for biomolecular simulation 05

Blue matter on blue gene/L: massively parallel computation f...

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proceedings of the 3rd IEEE/ACM/IFIP international conference on hardware/software codesign and system synthesis

作者： Robert S. Germain Blake Fitch Aleksandr Rayshubskiy Maria Eleftheriou Michael C. Pitman Frank Suits Mark Giampapa T.J. Christopher Ward IBM Thomas J. Watson Research Center Yorktown Heights NY IBM Hursley Park Hursley UK

ISBN: (纸本)9781595931610

This paper provides an overview of the Blue Matter application development effort within the Blue Gene project that supports our scientific simulation efforts in the areas of protein folding and membrane-protein systems. The design philosophy of the Blue Gene/L architecture relies on large numbers of power efficient nodes (whose technology is derived from the world of embedded microprocessors) to enable packing of many such nodes into a small volume to achieve high performance. In order for an application to exploit the potential of this architecture, the application must scale well to large node counts. Because the scientific goals of the project entail simulating very long time-scales, up to microseconds, strong scaling of a fixed size problem to these large node counts is a requirement. In pursuit of this objective we have considered a variety of parallel decompositions and explored ways to exploit and map algorithms onto the two primary high performance interconnects provided by the Blue Gene architecture, the 3D-torus network and the collective network. Our current version of the application continues to speed up through 4096 nodes and is being used for studies of a protein/lipid system (for which some results have already been published) and for protein folding/unfolding simulations.

关键词： physical design microfluidics biochip synthesis

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MOGAC: a multiobjective genetic algorithm for the co-synthesis of hardware-software embedded systems 97

MOGAC: a multiobjective genetic algorithm for the co-synthes...

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proceedings of the 1997 IEEE/ACM international conference on Computer-aided design

作者： Robert P. Dick Niraj K. Jha Department of Electrical Engineering Princeton University Princeton New Jersey

ISBN: (纸本)9780818682001

In this paper, we present a hardware-software co-synthesis system, called MOGAC, that partitions and schedules embedded system specifications consisting of multiple periodic task graphs. MOGAC synthesizes real-time heterogeneous distributed architectures using an adaptive multiobjective genetic algorithm that can escape local minima. Price and power consumption are optimized while hard real-time constraints are met. MOGAC places no limit on the number of hardware or software processing elements in the architectures it synthesizes. Our general model for bus and point-to-point communication links allows a number of link types to be used in an architecture. Application-specific integrated circuits consisting of multiple processing elements are modeled. Heuristics are used to tackle multi-rate systems, as well as systems containing task graphs whose hyperperiods are large relative to their periods. The application of a multiobjective optimization strategy allows a single co-synthesis run to produce multiple designs which trade off different architectural features. Experimental results indicate that MOGAC has advantages over previous work in terms of solution quality and running time.

关键词： co-design

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Interfacing a simulation engine to an embedded runtime environment

Interfacing a simulation engine to an embedded runtime envir...

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IEEE international conference on systems, Man and Cybernetics

作者： B. Eames S. Neema T. Bapty J. Scott Institute for Software Integrated Systems Vanderbilt University Nashville TN USA

The design of modern high-performance embedded systems is challenging. Power and size constraints limit hardware size, while performance requirements demand algorithm-specific architectures. A model-integrated approach can be used in the design capture and synthesis of these systems. A domain-specific graphical system design environment allows the capture of system requirements, design information and alternatives, and of available processing resources in the form of models. A model interpretation process generates architecture specifications and compilable code. A typical first step in designing complex systems is to develop a simulation-based prototype. After functional verification of the prototype, system components are implemented, each tailored to a particular target platform. Only after all components are implemented can system integration be addressed, often uncovering inconsistencies between components and forcing costly redesign. This paper describes an extension of a model-integrated design environment and runtime system. Simulation-based components are included in system models. A simulation engine is interfaced to a runtime environment, allowing simulation components to run in the loop with nonsimulation based components. The extended environment allows prototype synthesis from system models and automates the integration of implemented components into the system. Further, the extended environment provides the designer with a powerful visualization and debugging tool.

关键词： Engines Runtime environment Mathematical model Prototypes system testing hardware Power system modeling Network synthesis Embedded system Virtual prototyping

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