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proceedings of the international conference on Compilers, Architectures and synthesis for Embedded systems (CASES)

作者： Paolo Mantovani Emilio G. Cota Christian Pilato Giuseppe Di Guglielmo Luca P. Carloni Department of Computer Science Columbia University New York NY USA

ISBN: (纸本)9781509035892

Local memory is a key factor for the performance of accelerators in SoCs. Despite technology scaling, the gap between on-chip storage and memory footprint of embedded applications keeps widening. We present a solution to preserve the speedup of accelerators when scaling from small to large data sets. Combining specialized DMA and address translation with a software layer in Linux, our design is transparent to user applications and broadly applicable to any class of SoCs hosting high-throughput accelerators. We demonstrate the robustness of our design across many heterogeneous workload scenarios and memory allocation policies with FPGA-based SoC prototypes featuring twelve concurrent accelerators accessing up to 768MB out of 1GB-addressable DRAM.

关键词： Program processors Random access memory system-on-chip hardware Linux Computer architecture

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Case study of a high speed three-dimensional graphics chip set

Case study of a high speed three-dimensional graphics chip s...

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Annual IEEE international conference and Exhibit ASIC

作者： R.E. Eisenstadt Design Consulting Engineer San Jose Technology Center VISI Technology Inc. San Jose CA USA

Design efforts to implement a 3-D graphics chip set are presented. The set contains designs ranging from a 10000-gate 1.5-micron gate array to a 208-pin, 50000+-gate 1.0-micron silicon compiled design containing RAM and datapath structures. The resulting graphics system contains 85 ASIC chips representing 10 different designs. Overviews of design entry, logic synthesis, physical design, package selection, vector generation, simulation, and test program development are provided. Further information reflecting hardware requirements, and design cycle times is included.< >

关键词： Computer aided software engineering Graphics Very large scale integration Application specific integrated circuits Timing Logic design Read-write memory Logic arrays Logic testing Silicon

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On the recursive reduction of the order of stabilizing controllers for LTI systems

On the recursive reduction of the order of stabilizing contr...

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IEEE conference on Control Technology and Applications (CCTA)

作者： S. Darbha Woosuk Choi S.P. Bhattacharya Department of Mechanical Engineering Texas A&M University College Station TX USA Advanced Technology Center Hyundai Motor Company Seoul South Korea Advanced Technology Center Kia Motor Corporation Seoul Korea

We first prove the following result: if there exists a proper stabilizing controller of order "r", there is a strictly proper stabilizing controller of order "r+1"; moreover, the set of strictly proper stabilizing controllers contains an infinite line segment in the controller parameter space. Using this result, we (1) provide a sufficient condition, based on pole-zero cancellation, for reducing the order of a stabilizing controller and (2) show that the minimal order of a proper stabilizing controller is "r" if and only if the following two conditions hold: (a) the set of rational, strictly proper stabilizing controllers of order "r" is bounded (can even be empty) in the controller parameter space and (b) the set of proper stabilizing controllers of order "r" is not empty. This result holds even for complex stabilization and hence, for the minimal order of stabilizing controllers that guarantee a performance describable through a complex stabilization problem.

关键词： Control systems Polynomials Sufficient conditions hardware Application software Force control Process control Control theory Control system synthesis Computer errors

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Localized watermarking: methodology and application to template mapping

Localized watermarking: methodology and application to templ...

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international conference on Acoustics, Speech, and Signal Processing (ICASSP)

作者： D. Kirovski M. Potkonjak Computer Science Department University of California Los Angeles USA

The semiconductor industry has adopted the intellectual property (IP) business model as a dominant system-on-chip development platform. Since copyright fraud has been recognized as the most devastating obstruction to this model, a number of techniques for IP protection have been introduced. Most of them rely on a selection of a global solution to an optimization problem according to a unique user-specific digital signature. Although such techniques may provide convincing proof of authorship with little hardware overhead, they fail to protect design partitions, do not provide an easy procedure for watermark detection, and are not capable of detecting the watermark when the design or its part is augmented in another larger design. Since these demands are of the highest interest for the IP business, we introduce localized watermarking as an IP protection technique which enables these features while satisfying the demand for low-cost and transparency. We have applied the new watermarking technology to template mapping, a behavioral synthesis task. This watermarking method has been tested on a set of real-life benchmarks where high likelihood of authorship has been achieved with negligible overhead in solution quality.

关键词： Watermarking Protection Algorithm design and analysis Partitioning algorithms Application software Digital signatures Constraint optimization Design optimization Computer science Electronics industry

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Adaptive streaming panoramic video for image based rendering system

Adaptive streaming panoramic video for image based rendering...

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IEEE international conference on Networking, Sensing and Control

作者： Yu Lei Xiaolin Zheng Zhongding Jiang D. Chen School of Computer Science Zhejiang University China School of Software Fudan University China

In this paper, we present an adaptive panoramic video streaming scheme for distributed image based rendering (IBR) systems. Real-time rendering of complex 3D scene on mobile devices is a challenging task. The main reason is that mobile devices have limited computational capabilities and are lack of powerful 3D graphics hardware support. In such systems, server should take most of the computing job and than transmit the required image segments to client. So the efficient network transmission is vital for client to smoothly synthesize attractive 3D scenes. The proposed streaming scheme fulfils this task by probing the mobile network's status and then effective adjust the sending data to avoid network congestion and jitter. Pre-fetching and cache management are also considered for efficient memory usage and reducing transmission requests. With the help of this scheme, we implemented an interactive distributed 3D walk through system on both mobile devices and desktop computers. Experimental results show that the adaptive panoramic video streaming scheme is useful for the distributed IBR systems.

关键词： Streaming media Rendering (computer graphics) Layout Mobile computing Memory management Graphics hardware Network servers Image segmentation Network synthesis

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Designing wireless protocols: methodology and applications

Designing wireless protocols: methodology and applications

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international conference on Acoustics, Speech, and Signal Processing (ICASSP)

作者： M. Sgroi J.L. da Silva F. De Bernardinis F. Burghardt A. Sangiovanni-Vincentelli J. Rabaey University of California Berkeley USA

Communication protocols are essential components of wireless systems. Present methods for protocol design are heuristic in nature and are not suited for next generation wireless systems where time-to-market concerns require correct-the-first-time implementations. In this paper we present a new design methodology for wireless protocols based on the principle of orthogonalization of concerns. In particular, the methodology separates function and architecture design and emphasizes the use of formal models to ensure correctness and reduce design time. Protocols are described using co-design finite state machines (CFSMs), a model of computation that has been introduced to allow the efficient capture of both the control and the data processing parts of the specification. Furthermore, algorithms for automatic hardware and software synthesis from CFSMs are available. This allows a fast exploration of different HW/SW partitions and the analysis of tradeoffs involved. Intercom, a mobile wireless system supporting full-duplex voice communication among different users, is presented and the design of its protocols is described. The design methodology presented here will be used for the design of PicoRadio, a low-power and highly adaptive network of sensors.

关键词： Design methodology Wireless application protocol Time to market Computer architecture Automata Computational modeling Automatic control Communication system control Data processing Partitioning algorithms

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Kepler: an extensible system for design and execution of scientific workflows

Kepler: an extensible system for design and execution of sci...

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international Working conference on Scientific and Statistical Database Management

作者： I. Altintas C. Berkley E. Jaeger M. Jones B. Ludascher S. Mock San Diego Supercomputer Center (SDSC) University of California San Diego USA National Center for Ecological Analysis and Synthesis (NCEAS) University of California슠Santa Barbara USA

Most scientists conduct analyses and run models in several different software and hardware environments, mentally coordinating the export and import of data from one environment to another. The Kepler scientific workflow system provides domain scientists with an easy-to-use yet powerful system for capturing scientific workflows (SWFs). SWFs are a formalization of the ad-hoc process that a scientist may go through to get from raw data to publishable results. Kepler attempts to streamline the workflow creation and execution process so that scientists can design, execute, monitor, re-run, and communicate analytical procedures repeatedly with minimal effort. Kepler is unique in that it seamlessly combines high-level workflow design with execution and runtime interaction, access to local and remote data, and local and remote service invocation. SWFs are superficially similar to business process workflows but have several challenges not present in the business workflow scenario. For example, they often operate on large, complex and heterogeneous data, can be computationally intensive and produce complex derived data products that may be archived for use in reparameterized runs or other workflows. Moreover, unlike business workflows, SWFs are often dataflow-oriented as witnessed by a number of recent academic systems (e.g., DiscoveryNet, Taverna and Triana) and commercial systems (Scitegic/Pipeline-Pilot, Inforsense). In a sense, SWFs are often closer to signal-processing and data streaming applications than they are to control-oriented business workflow applications.

关键词： Prototypes Business Web services Runtime Java Plugs Yarn Supercomputers Biological system modeling Power system modeling

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Algorithm-hardware Co-design of Attention Mechanism on FPGA Devices

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ACM TRANSACTIONS ON EMBEDDED COMPUTING systemS 2021年第5期20卷 71-71页

作者： Zhang, Xinyi Wu, Yawen Zhou, Peipei Tang, Xulong Hu, Jingtong Univ Pittsburgh Swanson Sch Engn Elect & Comp Engn Pittsburgh PA 15260 USA Univ Pittsburgh Sch Comp & Informat Comp Sci Pittsburgh PA 15260 USA

Multi-head self-attention (attention mechanism) has been employed in a variety of fields such as machine translation, language modeling, and image processing due to its superiority in feature extraction and sequential data analysis. This is benefited from a large number of parameters and sophisticated model architecture behind the attention mechanism. To efficiently deploy attention mechanism on resource-constrained devices, existing works propose to reduce the model size by building a customized smaller model or compressing a big standard model. A customized smaller model is usually optimized for the specific task and needs effort in model parameters exploration. Model compression reduces model size without hurting the model architecture robustness, which can be efficiently applied to different tasks. The compressed weights in the model are usually regularly shaped (e.g. rectangle) but the dimension sizes vary (e.g. differs in rectangle height and width). Such compressed attention mechanism can be efficiently deployed on CPU/GPU platforms as their memory and computing resources can be flexibly assigned with demand. However, for Field Programmable Gate Arrays (FPGAs), the data buffer allocation and computing kernel are fixed at run time to achieve maximum energy efficiency. After compression, weights are much smaller and different in size, which leads to inefficient utilization of FPGA on-chip buffer. Moreover, the different weight heights and widths may lead to inefficient FPGA computing kernel execution. Due to the large number of weights in the attention mechanism, building a unique buffer and computing kernel for each compressed weight on FPGA is not feasible. In this work, we jointly consider the compression impact on buffer allocation and the required computing kernel during the attention mechanism compressing. A novel structural pruning method with memory footprint awareness is proposed and the associated accelerator on FPGA is designed. The experimental resu

关键词： Co-design algorithm hardware attention transformer FPGA tops

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MARS: mm Wave-based Assistive Rehabilitation system for Smart Healthcare

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ACM TRANSACTIONS ON EMBEDDED COMPUTING systemS 2021年第5期20卷 72-72页

作者： An, Sizhe Ogras, Umit Y. Univ Wisconsin Dept Elect & Comp Engn Madison WI 53706 USA

Rehabilitation is a crucial process for patients suffering from motor disorders. The current practice is performing rehabilitation exercises under clinical expert supervision. New approaches are needed to allow patients to perform prescribed exercises at their homes and alleviate commuting requirements, expert shortages, and healthcare costs. Human joint estimation is a substantial component of these programs since it offers valuable visualization and feedback based on body movements. Camera-based systems have been popular for capturing joint motion. However, they have high-cost, raise serious privacy concerns, and require strict lighting and placement settings. We propose a millimeter-wave (mmWave)-based assistive rehabilitation system (MARS) for motor disorders to address these challenges. MARS provides a low-cost solution with a competitive object localization and detection accuracy. It first maps the 5D time-series point cloud from mmWave to a lower dimension. Then, it uses a convolution neural network (CNN) to estimate the accurate location of human joints. MARS can reconstruct 19 human joints and their skeleton from the point cloud generated by mmWave radar. We evaluate MARS using ten specific rehabilitation movements performed by four human subjects involving all body parts and obtain an average mean absolute error of 5.87 cm for all joint positions. To the best of our knowledge, this is the first rehabilitation movements dataset using mmWave point cloud. MARS is evaluated on the Nvidia Jetson Xavier-NX board. Model inference takes only 64 mu s and consumes 442 mu J energy. These results demonstrate the practicality of MARS on low-power edge devices.

关键词： Human pose estimation point cloud millimeter wave smart healthcare

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Type-Directed Program synthesis and Constraint Generation for Library Portability 19

Type-Directed Program Synthesis and Constraint Generation fo...

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proceedings of the international conference on Parallel Architectures and Compilation Techniques

作者： Bruce Collie Philip Ginsbach Michael F.P. O'Boyle School of Informatics University of Edinburgh United Kingdom

ISBN: (纸本)9781728136134

Fast numerical libraries have been a cornerstone of scientific computing for decades, but this comes at a price. Programs may be tied to vendor specific software ecosystems resulting in polluted, non-portable code. As we enter an era of heterogeneous computing, there is an explosion in the number of accelerator libraries required to harness specialized hardware. We need a system that allows developers to exploit ever-changing accelerator libraries, without over-specializing their *** we cannot know the behavior of future libraries ahead of time, this paper develops a scheme that assists developers in matching their code to new libraries, without requiring the source code for these ***, it can recover equivalent code from programs that use existing libraries and automatically port them to new interfaces. It first uses program synthesis to determine the meaning of a library, then maps the synthesized description into generalized constraints which are used to search the program for replacement opportunities to present to the *** applied this approach to existing large applications from the scientific computing and deep learning domains. Using our approach, we show speedups ranging from 1.1× to over 10× on end to end performance when using accelerator libraries.

关键词： code rejuvenation

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