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检索条件"任意字段=Proceedings of the International Conference on Hardware/Software Codesign and System Synthesis"

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proceedings - 2009 international conference on Embedded Computer systems: Architectures, Modeling and Simulation, IC-SAMOS 2009

Proceedings - 2009 International Conference on Embedded Comp...

引用

2009 international conference on Embedded Computer systems: Architectures, Modeling and Simulation, IC-SAMOS 2009

ISBN: (纸本)9781424445011

The proceedings contain 23 papers. The topics discussed include: a mixed hardware-software approach to flexible artificial neural network training on FPGA;high-speed FPGA-based implementations of a genetic algorithm;high-level synthesis for the design of FPGA-based signal processing systems;a physical-level study of the compacted matrix instruction scheduler for dynamically-scheduled superscalar processors;instruction-based reuse-distance prediction for effective cache management;adaptive simulation sampling using an autoregressive framework;an emulation-based real-time power profiling unit for embedded software;generation and calibration of compositional performance analysis models for multi-processor systems;performance evaluation of concurrently executing parallel applications on multi-processor systems;and multi-processor system-on-chip design space exploration based on multi-level modeling techniques.

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A Novel hardware-software codesign of Network Protocol Stacks on a SoC Platform

A Novel Hardware-Software Codesign of Network Protocol Stack...

引用

international conference on Computer Communications and Networks (ICCCN)

作者： Youngmann Kim Taehoon Kim E. K. Park Sungwoo Tak School of Computer Science and Engineering Pusan National University Busan South Korea School of Computer Science and Engineering University of Missouri MO USA

In this paper, we propose a novel hardware-software codesign technique of network protocol stacks on a SoC (system on chip) platform for providing the QoS (quality of service) functionality. We address that the codesign should guarantee the real-time performance of periodic packets and minimize the average response time of aperiodic packets in order to provide the QoS functionality. We present the following three mechanisms to resolve this issue: 1) task decomposition technique of a network protocol suite into hardware and software tasks, 2) a communication channel between heterogeneous tasks, 3) fine-grained and coarse-grained real-time processing simultaneously for application-specific real-time requirements. A case study based on experiments is conducted to illustrate the efficiency of the proposed technique by implementing it on the commercial SoC platform embedded with the Altera's Excalibur EPXA4 including ARM922T core and 400K gates of programmable logic.

关键词： Protocols hardware Quality of service Communication channels Real time systems Computer science system-on-a-chip Delay Computer networks software performance

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Research on Automatic Flaw Detection of Pipeline Girth Weld by Ultrasonic Phased Array system

Research on Automatic Flaw Detection of Pipeline Girth Weld ...

引用

IEEE international conference on Mechatronics and Automation

作者： Zhan, Xianglin Zhou, Dexin Chen, Shili Jin, Shijiu Civil Aviat Univ China Coll Aeronaut Automat Tianjin Peoples R China Tianjin Univ State Key Lab Precis Measuring Technol & Instrume Tianjin Peoples R China

ISBN: (纸本)9781424426928

An automatic ultrasonic phased array inspection system used for nondestructive testing (NDT) of pipeline girth weld is developed. The linear phased array transducer is optimized by numerical analysis based on a mathematical model. Then hardware and software designs of the system are presented, realizing dynamically focusing in the detection area. A series of technological difficulties are solved. Finally, an automatic flaw detection testing platform on pipeline girth weld is set up. Experimental results illustrate the transducer optimum design improves system performance and the system has good capabilities of ultrasonic transmitting and echo synthesis, greatly improving testing flexibility and testing speed whereas reducing the system's volume and weight. It can be extended to inspect an object with rough surface or irregular structure in industrial NDT field.

关键词： automatic flaw detection ultrasonic phased array nondestructive testing electronic scanning

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FPGA-based design of a high-performance and modular video processing platform

FPGA-based design of a high-performance and modular video pr...

引用

IEEE international conference on Electro-Information Technology

作者： Christophe Desmouliers Erdal Oruklu Jafar Saniie Department of Electrical and Computer Engineering Illinois Institute of Technology Chicago IL USA

In this paper, an FPGA-based design and implementation of a high-performance video processing platform (VPP) is presented. A hardware/software codesign system is proposed on Xilinx Virtex II Pro FPGA to realize complex algorithms for real-time image and video processing. This paper presents the framework of the VPP, discusses the architectural building blocks and FPGA synthesis results. Each hardware (custom accelerator blocks) and software (code running on an embedded CPU core) component is described comprehensively, laying the foundation for an adaptable and modular embedded system. As a case study, a real-time motion detection algorithm is implemented, demonstrating the feasibility of the proposed platform. Additional hardware accelerators can be easily plugged-in to the system for desired processing engines. VPP can be a robust, cost-effective solution for a broad range of multimedia applications including broadcasting and streaming video, video on-demand, video encoding/decoding, surveillance, detection and recognition.

关键词： hardware Video on demand Field programmable gate arrays Streaming media software systems software algorithms Real time systems Embedded software Embedded system Motion detection

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synthesis, Analysis, and Modeling of Large-Scale Mission-Critical Embedded software systems 1

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international conference on software Process

作者： Selby, Richard W. Univ Soouthern Calif Dept Comp Sci Northrop Grumman Space Technol Los Angeles CA 90089 USA

ISBN: (数字)9783642016806

ISBN: (纸本)9783642016790

Mission-critical embedded software performs the core processing logic for pervasive systems that affect people and enterprises everyday, ranging from aerospace systems to financial markets to automotive systems. In order to function properly, these embedded software systems rely on and are highly interdependent with other hardware and software systems. This research identifies design principles for large-scale mission-critical embedded software and investigates their application in development strategies, architectures, and techniques. We have examined actual embedded software systems from two different problem domains, advanced robotic spacecraft and financial market systems, and these analyses established the foundations for these design principles. Both system types embody solutions that respond to detailed specifications defined and modeled with heavy user involvement. Both system types possess mission-critical logic represented using state machines and other structured techniques. They both use a layered architecture approach with a foundation that provides infrastructure services, a layer with a simple set of foreground and background tasks, a layer with deterministic synchronous processing steps, and a layer with event-driven monitoring, commanding, and sequencing capabilities. The architectural approach supports a domain-specific command sequencing macro language that defines table-driven executable specifications and enables developers to work at higher abstraction levels throughout the lifecycle. The architectural approach also facilitates extensibility, reuse, and portability across multi-processor execution environments. The systems rely on extensive built-in self-tests, invariants, and redundant calculations that assess states and detect faults. From a development standpoint, both systems use risk-driven incremental lifecycles, system modeling, end-to-end prototyping, and statistical analysis of development processes. Based on insights gained from embed

关键词： software design

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Using GPCE principles for hardware systems and accelerators: (bridging the gap to HW design) 09

Using GPCE principles for hardware systems and accelerators:...

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proceedings of the eighth international conference on Generative programming and component engineering

作者： Rishiyur S. Nikhil Bluespec Inc. Waltham MA USA

ISBN: (纸本)9781605584942

Moore's Law has precipitated a crisis in the creation of hardware systems (ASICs and FPGAs)-how to design such enormously complex concurrent systems quickly, reliably and affordably? At the same time, portable devices, the energy crisis, and high performance computing present a related challenge-how to move complex and high-performance algorithms from software into hardware (for more speed and/or energy efficiency)?In this talk I will start with a brief technical introduction to BSV, a language that directly addresses these concerns. It uses ideas from Guarded Atomic Actions (cf. Term Rewriting systems, TLA+, Unity, and EventB) to address complex concurrency with scalability. It borrows from Haskell (types, type classes, higher-order functions) for robustness and powerful program generation (a.k.a. "static elaboration" to HW designers). And it is fully synthesizable (compilable) into high-quality RTL (Verilog/VHDL). I will then describe some of the remarkable projects that BSV has enabled in industry and academia today.

关键词： energy efficient computing high performance computing hybrid computing fpga term rewriting systems bluespec systemverilog hardware accelerators bsv hardware/software codesign high level synthesis haskell

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Message from the Organizers of UNECAS 2009

Message from the Organizers of UNECAS 2009

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Symposium on Applications and the Internet (SAINT)

Presents the welcome message from the conference proceedings.

关键词： Context-aware services RFID tags Actuators Context awareness Control system synthesis Network synthesis software systems hardware Robustness Privacy

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CODES+ISSS 2007: international conference on hardware/software codesign and system synthesis

CODES+ISSS 2007: International Conference on Hardware/Softwa...

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CODES+ISSS 2007: 5th international conference on hardware/software codesign and system synthesis

ISBN: (纸本)9781595938244

The proceeding contains 47 papers. The topics discussed include: temperature-aware processor frequency assignment for MPSoCs using convex optimization;three-dimensional multiprocessor system-on-chip thermal optimization;complexity challenges towards 4th generation communication solutions;locality optimization in wireless applications;a code-generator generator for multi-output instructions;influence of procedure cloning on WCET prediction;compile-time decided instruction cache locking using worst-case execution paths;predictable execution adaptivity through embedding dynamic reconfigurability into static MPSoC schedules;incremental run-time application mapping for homogenous NoCs with multiple voltage levels;a data protection unit for NoC-based architectures;improved response time analysis of tasks scheduled under preemptive round-robin;probabilistic performance risk analysis at system-level;and performance modeling for early analysis of multi-core systems.

关键词： Codes (symbols)

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hardware/software codesign - Pedagogy for the industry

Hardware/software codesign - Pedagogy for the industry

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5th international conference on Information Technology - New Generations

作者： He, Min Tsai, Ming-Che Wu, Xiaolong Wang, Fei Nasr, Ramzi Calif State Univ Long Beach Dept Comp Sci & Comp Engn Long Beach CA 90840 USA Calif State Univ Long Beach Dept Elect Engn Long Beach CA 90840 USA

ISBN: (纸本)9780769530994

With the essentiality of hardware/software codesign in present and future designs, it has become more and more important to educate engineers in this area. In this paper, industry trends and expectations are investigated in the area of hardware/software codesign and system-level design, as well as its current status in education, to derive a better pedagogy for hardware/software codesign.

关键词： Computer architecture

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Highly-cited ideas in system codesign and synthesis 08

Highly-cited ideas in system codesign and synthesis

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Embedded systems Week 2008 - 6th IEEE/ACM/IFIP international conference on hardware/software codesign and system synthesis, CODES+ISSS 2008

作者： Vahid, Frank Givargis, Tony Department of Computer Science and Engineering University of California Riverside United States Center for Embedded Computer Systems UC Irvine United States Center for Embedded Computer Systems University of California Irvine United States

ISBN: (纸本)9781605584706

We conducted a study of citations of papers published between 1996 and 2006 in the CODES and ISSS conferences, representing the hardware/software codesign and system synthesis community. Citations, meaning non-self-citations only, were considered from all papers known to Google Scholar, as well as only from subsequent CODES/ISSS papers. We list the most-cited CODES/ISSS papers of each year, summarizing their topics, and discussing common features of those papers. For comparison purposes, we also measured citations for the computer architecture community's ISCA and MICRO conferences, and for the field-programmable gate array community's FPGA and FCCM conferences. We point out several interesting differences among the citation patterns of the three communities. Copyright 2008 ACM.

关键词： Computer architecture

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