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检索条件"任意字段=Proceedings of the International Conference on Hardware/Software Codesign and System Synthesis"

共 1554 条记录，以下是641-650 订阅

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YOUFILE: Ontology based system for document smart indexing

YOUFILE: Ontology based system for document smart indexing

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12th World Multi-conference on systemics, Cybernetics and Informatics/14th international conference on Information systems Analysis and synthesis

作者： Mainetti, Luca Paiano, Roberto Bucciero, Alberto Guido, Anna Lisa Sabato, Stefano Santo Capone, Luciano Barchetti, Ugo Pulimeno, Enrico Univ Salento I-73100 Lecce Italy

ISBN: (纸本)9781934272374

The huge amount of files of different types (from photos, personal documents, to accounting or fiscal documents) which everyone stores in his own personal computer or in other hardware device (such as internet virtual space, external hard drives, etc.) risk, with the passing of time, to go lost. The founding idea of the eSCI project (eStore of Captured Information) is just to avoid the accidental loss of files, proposing to develop a web portal which allows the user to safely store his own documents and to retrieve them whenever he wants through a simple internet connection. Within the scope of this research project, the reached objective was double: first to assist the user in the document indexing activity, leading him to define the right keywords able to univocally characterize each file;in this way the user doesn't index the document only though its file name but also providing more precise information about its content. This allows to characterize the document according to a semantic meaning which will make its retrieval easier. At the same time, we would develop a software architecture that should be able to automatically generate the right data entry forms needed to index each particular class of documents, avoiding the expensive activities of the evolutive maintenance of the application. We made use of ontologies to express the real semantic value that each document could hide. simplifying their indexing and retrieval.

关键词： On the fly form generation Ontology Electronic documents ontology and database synchronization Document classification

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Yield maximization for system-level task assignment and configuration selection of configurable multiprocessors 08

Yield maximization for system-level task assignment and conf...

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proceedings of the 6th IEEE/ACM/IFIP international conference on hardware/software codesign and system synthesis

作者： Love Singhal Sejong Oh Eli Bozorgzadeh University of California Irvine Irvine CA USA Korea Advanced Institute of Science and Technology Daejeon South Korea

ISBN: (纸本)9781605584706

Configurable multiprocessor system is a promising design alternative because of its high degree of flexibility, short development time, and potentially high performance under constraints and challenges driven by applications. An important design challenge at 45nm for multi-core system is manufacturing process variation. Due to increasing concern of WID variation, designers will have to choose configurations of processing cores that maximize yield of the system while not affecting performance and throughput constraints. Due to interdependency between processor configuration selection and task allocation and its impact on yield and latency constraints, we tackle both problems simultaneously. In this paper, we propose the problem of task allocation and configuration selection for yield optimization. We prove the problem is NP-hard and propose an optimal pseudo-polynomial on Serial-Parallel graphs. We target streaming applications in pipelined reconfigurable multiprocessor systems. We provide a case study of configurable Leon processors as the cores implemented on FPGA. Results show that proposed problem could result in significant improvement of the timing yield of the system by exploiting extra slack on tasks.

关键词： configuration selection process variation delay budgeting within-die variation task allocation timing yield

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Interface Implementation Using Ajax for Web-Based Instruction Set Simulator

Interface Implementation Using Ajax for Web-Based Instructio...

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international conference on Advanced Information Networking and Applications Workshops (AINAW)

作者： Hideaki Yanagisawa Minoru Uehara Hideki Mori Computer Science and Electronic Engineering Tokuyama College of Technology Japan Information and Computer Sciences Toyo University Japan

SSC-DASH (Server Side C-like Design Automation Shell) has been developed as a Web-based HW/SW codesign tool for designing processors. SSC-DASH obtains a processor definition file via Web browser and generates a HW (synthesizable Verilog-HDL description) and SWDE (software Development Environment) for the generated processor. The SWDE includes ISS (Instruction Set Simulator), assembler, disassembler and compiler. For the verification of the defined processor, processor developers have to download the generated SWDE, every time, even where changes are small. To improve the usability of this system a Web-based interface for the generated SWDE is implemented using Ajax. Using Ajax, download of the SWDE becomes unnecessary and makes it possible to verify the processor on the server quickly and easily. This greatly improves the usability of the SWDE. In this paper, we describe implementation of Web-based ISS using Ajax.

关键词： hardware design languages Assembly Process design Java Programming Usability Instruction sets Computer architecture Web pages Control system synthesis

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CODES+ISSS 2006: 4th international conference on hardware software codesign and system synthesis

CODES+ISSS 2006: 4th International Conference on Hardware So...

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CODES+ISSS 2006: 4th international conference on hardware software codesign and system synthesis

ISBN: (纸本)1595933700

The proceedings contain 54 papers. The topics discussed include: UML and model-driven development for SoC design;application-specific workload shaping in multimedia-enabled personal mobile devices;efficient computation of buffer capacities for multi-rate real-time systems with back-pressure;design space exploration of real-time multi-media MPSoCs with heterogeneous scheduling policies;battery discharge aware energy feasibility analysis;a formal approach to robustness maximization of complex heterogeneous embedded systems;automatic run-time extraction of communication graphs from multithreaded applications;automatic generation of transaction level models for rapid design space exploration;accurate yet fast modeling of real-time communication;bounded arbitration algorithm for QoS-supported on-chip communication;automatic phase detection for stochastic on-chip traffic generation;and methodology for attack on a Java-based PDA.

关键词： Codes (symbols)

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hardware /software codesign of image processing applications using transaction level modeling

Hardware /software codesign of image processing applications...

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IEEE 18th international conference Application-specific systems, Architectures and Processors, ASAP07

作者： Cheema, Muhammad Omer Hammami, Omar Lacassagne, Lionel Merigot, Alain ENSTA 32 Boulevard Victor 75739 Paris France IEF University of Paris Sud 91405 Orsay France

ISBN: (纸本)1424410274

Transaction Level Modeling (TLM) and component based software development approaches accelerate the process of an embedded system design and simulation and hence improve the overall productivity. On the other hand, system level design languages facilitate the fast hardware synthesis at behavioral level of abstraction. In this paper, we introduce an approach for hardware/software codesign of image processing application that uses TLM and component based software design approaches along with HW synthesis using systemC to accelerate system design and verification process. Our experiments performed over an image processing application shows the effectiveness of our methodology. ©2006 IEEE.

关键词： hardware-software codesign

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A senior-level course in hardware-software codesign

A senior-level course in hardware-software codesign

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IEEE international conference on Microelectronic systems Education

作者： Schaumont, Patrick Virginia Polytech Inst & State Univ Blacksburg VA 24061 USA

ISBN: (纸本)9780769528496

Modern electronic system design makes extensive use of programmable architectures, and requires designers to jointly consider hardware and software in their design. A senior-level course called 'Introduction to codesign' provides a once-over-lightly approach to these complex system design issues. The course covers basic trade-offs in the design of custom architectures and software. In an associated design project, senior students analyze and accelerate a reference algorithm in C and end up with a processor and a coprocessor mapped on an FPGA board. We review the motivations for this course, the curriculum, the lab materials and tools used, and the results of the first offering of the course in the fall semester of 2006.

关键词： hardware/software co-design level course Coprocessors computer software ARCHITECTURE PROCESSOR Computer hardware Electronic systems

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hardware-software codesign of a fingerprint alignment processor

Hardware-software codesign of a fingerprint alignment proces...

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14th international conference on Mixed Design of Integrated Circuits and systems

作者： Fons, M. Fons, F. Canto, E. Univ Rovira & Virgili Tarragona 43003 Spain

ISBN: (纸本)9788392263241

Within the biometrics field, the development of an automatic personal authentication system is nowadays an open research problem. Most of the difficulties rely on the complexity and the computational power needed to implement an algorithm reliable enough to guarantee the validity of the recognition system even when only low-quality biometric information is available from the users. Apart from the inherent complexity of the biometric algorithm, there exist many additional requirements for the application: high-security level, real-time characteristics and low-cost. All these factors originate a technical challenge. A compromise between the final application performance and the amount of resources needed to implement the system exists. Following this direction, the design of a fingerprint alignment processor developed by means of hardware-software codesign techniques is presented in this paper. The performance achieved with this processor is compared against the performance reached with an only software-oriented solution. The acceleration factor achieved by the hardware proves the feasibility of real-time applications, which is not guaranteed when developing the same algorithm under purely-software platforms.

关键词： hardware-software codesign embedded systems fingerprints

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Bringing hardware and software closer together with termination analysis 07

Bringing hardware and software closer together with terminat...

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ACM/IEEE international conference on Formal Methods and Models for Co-Design

作者： Cook, Byron Microsoft Res Cambridge MD USA

When computers hang the root cause is usually due to termination bugs in the software that interfaces with hardware. In this talk I will discuss recent efforts to build program termination proof tools designed to find... 详细信息

ISBN: (纸本)9781424410507

关键词： hardware Computer bugs Computer interfaces system software

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HW/SW co-design for Esterel processing

HW/SW co-design for Esterel processing

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CODES+ISSS 2007: 5th international conference on hardware/software codesign and system synthesis

作者： Gädtke, Sascha Traulsen, Claus Von Hanxleden, Reinhard Real-Time and Embedded Systems Group Dept. of Computer Science Christian-Albrechts-Universität zu Kiel Olshausenstr. 40 D-24098 Kiel Germany

ISBN: (纸本)9781595938244

We present a co-synthesis approach that accelerates reactive software processing by moving the calculation of complex expressions into external combinational hardware. The starting point is a system model written in the synchronous language Esterel, which can be mapped to both hardware and software. Our approach performs the partitioning at the source-code level and preserves the original, strictly synchronous semantics. It is thus platform-independent and allows to use standard simulation and synthesis tools. Furthermore, the source-level partitioning approach presented here should be applicable to non-reactive processing platforms as well. However, the challenge is to partition the program without changing its meaning under any circumstances. In particular, signal scopes and inter-partition signal dependencies must be maintained, which rules out a naive top-level partitioning. We have implemented the co-synthesis approach based on the Columbia Esterel Compiler and have validated it on the Kiel Esterel Processor. As the experimental results confirm, this can significantly reduce execution times and energy consumption per reaction, with minimal additional hardware requirements. Copyright 2007 ACM.

关键词： software engineering

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Complex task activation schemes in system level performance analysis

Complex task activation schemes in system level performance ...

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CODES+ISSS 2007: 5th international conference on hardware/software codesign and system synthesis

作者： Haid, Wolfgang Thiele, Lothar Zurich Switzerland

ISBN: (纸本)9781595938244

The design and analysis of today's complex real-time systems requires advanced methods. Due to ever growing functionality, hardware complexity and component interaction, applying traditional methods like HW/SW cosimulation is getting increasingly difficult. On the other hand, analytic approaches have proven their usefulness and efficiency for system analysis when end-to-end performance figures like delay, throughput and memory consumption are requested. One of the main drawbacks of these methods is the limited set of systems that can be analyzed with high accuracy: Only simple models for task interaction and task semantics can be used. In this paper, we extend existing methods for analyzing heterogeneous multiprocessor systems such that (a) nonpreemptive scheduling policies, (b) complex activation schemes for tasks and (c) conditional behavior of task executions can be modeled and analyzed. We demonstrate the usefulness of the proposed approach in a case study. Copyright 2007 ACM.

关键词： software architecture

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