检索结果-内蒙古大学图书馆

您好，读者！请登录

内蒙古大学图书馆

首页
概况
党建
资源
服务
科研支持
- 论文收录引用证明
- 科技查新
知识产权
档案馆
帮助

咨询与建议

建议与咨询留下您的常用邮箱和电话号码，以便我们向您反馈解决方案和替代方法

您的常用邮箱：*

您的手机号码：*

问题描述：

当前已输入0个字，您还可以输入200个字

全部搜索
期刊论文
图书
学位论文
标准
纸本馆藏
外文资源发现
数据库导航
超星发现

高级检索

时间限定

出版年份：

文献类型

图书期刊文献学位论文多媒体

馆藏选择

电子馆藏纸本馆藏

核心期刊

全部期刊 SCI 收录期刊 SSCI 收录期刊 EI 收录期刊 CSCD 收录期刊 CSSCI 收录期刊

语言

中文英文

文献类型

期刊文献图书学位论文标准纸本馆藏

帮助

文字说明：

T=题名（书名、题名），A=作者（责任者），K=主题词，P=出版物名称，PU=出版社名称，O=机构（作者单位、学位授予单位、专利申请人），L=中图分类号，C=学科分类号，U=全部字段，Y=年（出版发行年、学位年度、标准发布年）

检索规则说明：

AND代表“并且”；OR代表“或者”；NOT代表“不包含”；(注意必须大写,运算符两边需空一格)

检索范例：

范例一：(K=图书馆学 OR K=情报学) AND A=范并思 AND Y=1982-2016
范例二：P=计算机应用与软件 AND (U=C++ OR U=Basic) NOT K=Visual AND Y=2011-2016

分类表

所选分类

>> <<

限定检索结果

文献类型

1,499 篇 会议
55 篇 期刊文献

馆藏范围

1,554 篇 电子文献
0 种 纸本馆藏

日期分布

学科分类号

799 篇 工学
- 738 篇 计算机科学与技术...
- 560 篇 软件工程
- 153 篇 电气工程
- 135 篇 电子科学与技术（可...
- 103 篇 信息与通信工程
- 74 篇 控制科学与工程
- 22 篇 机械工程
- 13 篇 动力工程及工程热...
- 11 篇 光学工程
- 10 篇 建筑学
- 9 篇 仪器科学与技术
- 9 篇 生物工程
- 8 篇 材料科学与工程（可...
- 8 篇 土木工程
- 8 篇 生物医学工程（可授...
- 7 篇 安全科学与工程
- 6 篇 航空宇航科学与技...
179 篇 理学
- 104 篇 数学
- 48 篇 系统科学
- 39 篇 物理学
- 16 篇 统计学（可授理学、...
- 9 篇 生物学
- 6 篇 化学
108 篇 管理学
- 89 篇 管理科学与工程(可...
- 29 篇 工商管理
- 23 篇 图书情报与档案管...
15 篇 法学
- 11 篇 社会学
5 篇 经济学
- 5 篇 应用经济学
5 篇 教育学
- 5 篇 教育学
5 篇 医学
- 5 篇 临床医学
4 篇 艺术学
1 篇 农学

主题

359 篇 hardware
177 篇 computer archite...
162 篇 embedded system
135 篇 application soft...
87 篇 field programmab...
83 篇 embedded systems
75 篇 control system s...
69 篇 costs
67 篇 high level synth...
65 篇 computational mo...
65 篇 algorithm design...
64 篇 system-on-a-chip
63 篇 permission
63 篇 embedded softwar...
61 篇 real time system...
52 篇 timing
50 篇 system-on-chip
48 篇 computer science
47 篇 energy consumpti...
46 篇 space exploratio...

机构

10 篇 department of el...
8 篇 univ calif river...
8 篇 center for embed...
6 篇 school of comput...
6 篇 arizona state un...
6 篇 center for embed...
6 篇 department of co...
5 篇 princeton univ d...
5 篇 school of inform...
5 篇 department of co...
5 篇 philips research...
5 篇 institute for in...
5 篇 technische unive...
4 篇 department of el...
4 篇 ibm thomas j. wa...
4 篇 imec leuven
4 篇 politecn torino ...
4 篇 university of er...
4 篇 tu braunschweig
4 篇 university of do...

作者

9 篇 sri parameswaran
9 篇 ogras umit y.
9 篇 parameswaran sri
9 篇 nikil dutt
7 篇 rolf ernst
7 篇 dick robert p.
7 篇 dutt nikil
7 篇 robert p. dick
7 篇 leupers rainer
7 篇 vahid f
6 篇 jiang wei
6 篇 greg stitt
6 篇 teich juergen
6 篇 mitra tulika
6 篇 rainer leupers
6 篇 andreas gerstlau...
6 篇 a. sangiovanni-v...
6 篇 r. ernst
6 篇 jha niraj k.
5 篇 sungjoo yoo

语言

1,545 篇 英文
7 篇 其他
2 篇 中文

检索条件"任意字段=Proceedings of the International Conference on Hardware/Software Codesign and System Synthesis"

共 1554 条记录，以下是691-700 订阅

全选清除本页清除全部题录导出标记到"检索档案"

详细简洁

排序：

Energy efficient co-scheduling in dynamically reconfigurable systems

Energy efficient co-scheduling in dynamically reconfigurable...

引用

international conference on hardware/software codesign and system synthesis (CODES)

作者： Pao-Ann Hsiung Pin-Hsien Lu Chih-Wen Liu Department of Computer Science and Information Engineering National Chung Cheng University Chiayi Taiwan

Energy consumption is a major issue in dynamically reconfigurable systems because of the high power requirements during repeated configurations. hardware designs employ low power techniques such as configuration prefetch and reuse. software designs restrain energy usage by dynamically scaling the voltage of processors. However, when these techniques are implemented in a system, they might be conflicting and thus cancel their mutual benefits, which results in high power consumption and low performance. We propose run-time co-scheduling of hardware and software tasks by using the slack time, which is introduced due to reusing hardware task configurations, for dynamically scaling the processor voltage such that preceding software tasks consume lesser power. At the same time, the reuse of hardware task configurations also result in lower power consumption and higher performance due to fewer number of reconfigurations. The combined effects of hardware configuration reuse and software dynamic voltage scaling result in schedules with a lower power consumption and higher performance than that obtained through individual techniques applied to hardware and software separately. We performed extensive experiments whose results show that irrespective of different slack ratios, number of voltage levels, or hardware partitions, the schedules generated by our proposed method are more energy efficient than methods that either do not apply any runtime techniques or only apply hardware configuration prefetch and reuse.

关键词： hardware Dynamic scheduling Prefetching Processor scheduling Voltage control

来源：评论

学校读者我要写书评

暂无评论

A smart random code injection to mask power analysis based side channel attacks

A smart random code injection to mask power analysis based s...

引用

international conference on hardware/software codesign and system synthesis (CODES)

作者： Jude Angelo Ambrose Roshan G. Ragel Sri Parameswaran University of New South Wales Sydney Australia

One of the security issues in embedded system is the ability of an adversary to perform side channel attacks. Power analysis attacks are often very successful, where the power sequence dissipated by the system is observed and analyzed to predict secret keys. In this paper we show a processor architecture, which automatically detects the execution of the most common encryption algorithms, starts to scramble the power waveform by adding randomly placed instructions with random register accesses, and stops injecting instructions when it is safe to do so. Our technique prevents both Simple Power Analysis (SPA) and Differential Power Analysis (DPA). This approach has less overheads compared to previous solutions and avoids software instrumentation, allowing programmers with no special knowledge to use the system. Our processor model costs an additional area of 1.2%, and an average of 25% in runtime and 28.5% in energy over heads for industry standard cryptographic algorithms.

关键词： Runtime Encryption Registers hardware Indexes Benchmark testing

来源：评论

学校读者我要写书评

暂无评论

Aggressive snoop reduction for synchronized producer-consumer communication in energy-efficient embedded multi-processors

Aggressive snoop reduction for synchronized producer-consume...

引用

international conference on hardware/software codesign and system synthesis (CODES)

作者： Chenjie Yu Peter Petrov University of Maryland College Park USA

Snoop-based cache coherence protocols are typically used when multiple processor cores share memory through a common bus. It is well known, however, that these coherence protocols introduce an excessive power overhead. To help alleviate this problem, we propose an application-driven customization technique where application knowledge regarding data sharing in producer-consumer relationships is used in order to aggressively eliminate unnecessary and predictable snoop-induced cache tag lookups even for references to shared data, thus, achieving significant power reduction with minimal hardware cost. Snoop-induced cache tag lookups for accesses to both shared and private data are eliminated when it is ensured that such lookups will not result in extra knowledge regarding the cache state in respect to the other caches and memories. The proposed methodology relies on the combined support from the compiler, the operating system, and the hardware architecture. Our experiments show average power reductions of more than 80% compared to a general-purpose snoop protocol.

关键词： hardware Radiation detectors Coherence Protocols Synchronization Instruction sets Operating systems

来源：评论

学校读者我要写书评

暂无评论

Performance analysis and design space exploration for high-end biomedical applications: Challenges and solutions

Performance analysis and design space exploration for high-e...

引用

international conference on hardware/software codesign and system synthesis (CODES)

作者： Iyad Al Khatib Davide Bertozzi Axel Jantsch Luca Benini IMIT ICT KTH Royal Institute of Technology Sweden ENDIF University of Ferrara Ferrara Italy DEIS University of Bologna Bologna Italy

High-end biomedical applications are a good target for specific-purpose system-on-chip (SoC) implementations. Human heart electrocardiogram (ECG) real-time monitoring and analysis is an immediate example with a large potential market. Today, the lack of scalable hardware platforms limits real-time analysis capabilities of most portable ECG analyzers, and prevents the upgrade of analysis algorithms for better accuracy. Multiprocessor system-on-chip (MPSoC) technology, which is becoming main-stream in the domain of high-performance microprocessors, is becoming attractive even for power-constrained portable applications, due to the capability to provide scalable computation horsepower at an affordable power cost. This paper illustrates one of the first comprehensive HW/SW exploration frameworks to fully exploit MPSoC technology to improve the quality of real-time ECG analysis.

关键词： Electrocardiography Algorithm design and analysis Heart Real time systems Lead system-on-a-chip Computer architecture

来源：评论

学校读者我要写书评

暂无评论

Reliable multiprocessor system-on-chip synthesis

Reliable multiprocessor system-on-chip synthesis

引用

international conference on hardware/software codesign and system synthesis (CODES)

作者： Changyun Zhu Zhenyu Gu Robert P. Dick Li Shang ECE Department Queen''s University Kingston ONT Canada EECS Department Northwestern University Evanston IL USA

This article presents a multiprocessor system-on-chip synthesis (MPSoC) algorithm that optimizes system mean time to failure. Given a set of directed acyclic periodic graphs of communicating tasks, the proposed algorithm determines a processor core allocation, level of system-level and processor-level structural redundancy, assignment of tasks to processors, floorplan, and schedule in order to minimize system failure rate and area while meeting functionality and timing constraints. Changes to the thermal profile resulting from changes in allocation, assignment, scheduling, and floorplan are modeled and optimized during synthesis, as is the impact of thermal profile on temperature-dependent failure mechanisms. The proposed techniques have the potential to substantially increase MPSoC system mean time to failure compared to area-optimized solutions. If power densities are high and the dominant lifetime failure mechanisms are strongly dependent on temperature, our results indicate that thermal and structural redundancy optimization during synthesis have the potential to greatly increase MPSoC lifetime with low area cost.

关键词： Optimization Algorithm design and analysis Redundancy Thermal analysis Benchmark testing Mathematical model

来源：评论

学校读者我要写书评

暂无评论

Probabilistic performance risk analysis at system-level

Probabilistic performance risk analysis at system-level

引用

international conference on hardware/software codesign and system synthesis (CODES)

作者： Alexander Viehl Markus Schwarz Oliver Bringmann Wolfgang Rosenstiel FZI Forschungszentrum Informatik Karlsruhe Germany Universität Tübingen Tubingen Germany

We present a novel hybrid approach for performance analysis of a system design. Unlike other approaches in this area, in this paper we do not focus on the determination of pessimistic best-case and worst-case quantities of system properties. Our proposed analysis methodology determines qualitative numbers between best-case and worst-case of system properties and quantifies them with probabilities. For this issue, we combine local coarse-grained profiling and formal system-level analysis models in a hybrid approach for an early quantitative determination of qualitative system properties. Our approach considers the control-flow of communicating processes and the impact of blocking communication instances on the temporal behavior of the entire system during formal analysis. This can be used for determining the global system performance. The application of our new methodology leads to an inclusion of probabilities concerning system properties and allows an early performance risk estimation of a design with regard to predefined system requirements and constraints.

关键词： Computational modeling Process control Analytical models Synchronization Estimation Performance analysis

来源：评论

学校读者我要写书评

暂无评论

Embedded software development on top of transaction-level models

Embedded software development on top of transaction-level mo...

引用

international conference on hardware/software codesign and system synthesis (CODES)

作者： Wolfgang Klingauf Robert Günzel Christian Schröder Dept. E.I.S. Technical University of Braunschweig Braunschweig Germany

Early embedded SW development with transaction-level models has been broadly promoted to improve SoC design productivity. But the proposed APIs only provide low-level read/write operations via a TLM interconnect. SW developers have to implement platform-specific communication procedures and handshake protocols to access HW functions, which requires a deep understanding of both the HW interfaces and the TLM fabric used. In this paper, we propose our concept of hardware procedure calls (HPC) with which HW services are provided to SW processes as remote methods on top of transaction-level communication. To this end, a lightweight HPC protocol is presented, and we propose a method to generate the infrastructure for HPC communication from a straightforward input description. Our experiments show that with HPC, embedded SW development is considerably made easier, and that also the effort to create the transaction-level model itself is reduced.

关键词： IP networks Fabrics Protocols system-on-a-chip Time domain analysis Time varying systems Object oriented modeling

来源：评论

学校读者我要写书评

暂无评论

Database of distributed information measurement and control system

Database of distributed information measurement and control ...

引用

11th World Multi-conference on systemics, Cybernetics and Informatics/13th international conference on Information systems Analysis and synthesis

作者： Kiprushkin, Sergey A. Kurskov, Sergey Yu. Semin, Vadim V. Petrozavodsk State Univ Dept Engn Phys Petrozavodsk 185910 Russia

ISBN: (纸本)9781934272152

The present paper is devoted to the development of database of the distributed information measurement and control system that implements methods of optical spectroscopy for plasma physics research and atomic collisions and provides remote access to information and hardware resources within the Intranet/Intemet networks. The database is based on database management system Oracle9i. Client software was realized in Java language. The software was developed using Model View Controller architecture, which separates application data from graphical presentation components and input processing logic. The following graphical presentations were implemented: measurement of radiation spectra of beam and plasma objects, excitation function for non-elastic collisions of heavy particles and analysis of data acquired in preceding experiments. The graphical clients have the following functionality of the interaction with the database: browsing information on experiments of a certain type, searching for data with various criteria, and inserting the information about preceding experiments.

关键词： database of distributed information measurement and control system database management system Oracle9i distance learning

来源：评论

学校读者我要写书评

暂无评论

A framework for rapid system-level exploration, synthesis, and programming of multimedia MP-SoCs

A framework for rapid system-level exploration, synthesis, a...

引用

international conference on hardware/software codesign and system synthesis (CODES)

作者： Mark Thompson Hristo Nikolov Todor Stefanov Andy D. Pimentel Cagkan Erbas Simon Polstra Ed F. Deprettere Department of Computer Science University of Amsterdam Netherlands Leiden Embedded Research Center Leiden University Netherlands

In this paper, we present the Daedalus framework, which allows for traversing the path from sequential application specification to a working MP-SoC prototype in FPGA technology with the (parallelized) application mapped onto it in only a matter of hours. During this traversal, which offers a high degree of automation, guidance is provided by Daedalus' integrated system-level design space exploration environment. We show that Daedalus offers remarkable potentials for quickly experimenting with different MP-SoC architectures and exploring system-level design options during the very early stages of design. Using a case study with a Motion-JPEG encoder application, we illustrate Daedalus' design steps and demonstrate its efficiency.

关键词： Computer architecture Computational modeling Program processors IP networks Field programmable gate arrays XML Space exploration

来源：评论

学校读者我要写书评

暂无评论

ESL design and HW/SW co-verification of high-end software Defined Radio platforms

ESL design and HW/SW co-verification of high-end Software De...

引用

international conference on hardware/software codesign and system synthesis (CODES)

作者： A. C. H. Ng J. W. Weijers M. Glassee T. Schuster B. Bougard L. Van der Perre IMEC Belgium

Multiple wireless technologies are converging to run on personal handhelds. The plethora of communication standards next to the cost issues of deeper submicron processing require handheld platforms to shift from sets of multiple application specific ICs (ASICs) to multi-purpose Multi-Processor system-on-Chip (MPSoC) on which software Defined Radios (SDR) are run. SDR design faces hard real-time processing and data transfer latency constraints. Designing SDR under stringent time-to-market (cost), energy and real-time processing constraints requires the help of advanced Electronic system-Level (ESL) design methodologies. This paper demonstrates an integrated ESL design flow built on advanced ESL tools to design SDR platforms for handhelds. We share the experience from creation of a high-level virtual platform model down to hardware/software (HW/SW) co-verification of a large scale SoC (5 million gates+). Incremental RTL verification based on co-simulation and co-emulation is also presented.

关键词： hardware design languages Emulation Throughput Time domain analysis Time varying systems Synchronization Gain control

来源：评论

学校读者我要写书评

暂无评论

没有更多数据了...

全选清除本页清除全部题录导出标记到“检索档案”

共156页 << < 66 67 68 69 70 71 72 73 74 75 > >>

检索报告对象比较合并检索0

隐藏清空

合并搜索

回到顶部

执行限定条件

内容：

评分：

请选择保存的检索档案：

请选择收藏分类：

订阅名称：

通借通还

温馨提示：

图书名称：

借书校区：

取书校区：

手机号码：

邮箱地址：

一卡通帐号：

电话和邮箱必须正确填写，我们会与您联系确认。

联系人：

所在院系：

联系邮箱：

联系电话：

内蒙古自治区呼和浩特市赛罕区大学西街235号邮编: 010021

建议与咨询 留下您的常用邮箱和电话号码，以便我们向您反馈解决方案和替代方法

时间限定

文献类型

馆藏选择

核心期刊

语言

文献类型

帮助

文字说明：

检索规则说明：

检索范例：

分类表

所选分类

限定检索结果

文献类型

馆藏范围

日期分布

学科分类号

主题

机构

作者

语言

请选择保存的检索档案： 新增检索档案 确定 取消

请选择收藏分类： 新增自定义分类 确定 取消

通借通还

建议与咨询留下您的常用邮箱和电话号码，以便我们向您反馈解决方案和替代方法

请选择保存的检索档案：

请选择收藏分类：