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Hierarchical coarse-grained stream compilation for software defined radio

Hierarchical coarse-grained stream compilation for software ...

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CASES'07: 2007 international conference on Compilers, Architecture, and synthesis for Embedded systems

作者： Lin, Yuan Kudlur, Manjunath Mahlke, Scott Mudge, Trevor Advanced Computer Architecture Laboratory University of Michigan Ann Arbor MI United States

ISBN: (纸本)9781595938268

software Defined Radio (SDR) is an emerging embedded domain where the physical layer of wireless protocols is implemented in software rather than the traditional application specific hardware. The operation throughput requirements of current third-generation (3G) wireless protocols are an order of magnitude higher than the capabilities of modern DSP processors. Due to this steep performance requirement, heterogeneous multiprocessor system-on-chip designs have been proposed to support SDR. Given the difficulty in compiling traditional digital signal processors, these new multiprocessor architectures provide even greater challenges for the programmers and compilers. In this paper, we utilize a hierarchical dataflow programming model, referred to as SPIR, that is designed for modeling SDR applications. We then present a coarse-grained data ow compilation strategy that assigns a SDR protocol's DSP kernels onto multiple processors, allocates memory buffers, and determines an execution schedule that meets a prescribed throughput. Unlike traditional approaches, coarse-grained compilation exploits task-level parallelism by scheduling concurrent DSP kernels instead of instructions. Because of the streaming nature of SDR protocols, we adapted an existing instruction-level software pipelining technique, modulo scheduling, for coarse-grained compilation. Our compilation methodology is able to generate parallel code that achieves near linear speedup on a SDR multiprocessor system. Copyright 2007 ACM.

关键词： Hierarchical systems

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Three-dimensional multiprocessor system-on-chip thermal optimization

Three-dimensional multiprocessor system-on-chip thermal opti...

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international conference on hardware/software codesign and system synthesis (CODES)

作者： Chong Sun Li Shang Robert P. Dick ECE Department Queen''s University Kingston ONT Canada EECS Department Northwestern University Evanston IL USA

3D stacked wafer integration has the potential to improve multiprocessor system-on-chip (MPSoC) integration density, performance, and power efficiency. However, the power density of 3D MPSoCs increases with the number of active layers, resulting in high chip temperatures. This can reduce system reliability, reduce performance, and increase cooling cost. Thermal optimization for 3D MPSoCs imposes numerous challenges. It is difficult to manage assignment and scheduling of heterogeneous workloads to maintain thermal safety. In addition, the thermal characteristics of 3D MP-SoCs differ from those of 2D MPSoCs because each stacked layer has a different thermal resistance to the ambient and vertically-adjacent processors have strong temperature correlation. We propose a 3D MPSoC thermal optimization algorithm that conducts task assignment, scheduling, and voltage scaling. A power balancing algorithm is initially used to distribute tasks among cores and active layers. Detailed thermal analysis is used to guide a hotspot mitigation algorithm that incrementally reduces the peak MPSoC temperature by appropriately adjusting task execution times and voltage levels. The proposed algorithm considers leakage power consumption and adapts to inter-layer thermal heterogeneity. Performance evaluation on a set of multiprogrammed and multithreaded benchmarks indicates that the proposed techniques can optimize 3D MPSoC power consumption, power profile, and chip peak temperature.

关键词： Three dimensional displays Algorithm design and analysis Thermal analysis Optimization Program processors Power demand Heuristic algorithms

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Tuning servo amplifiers using Straight-Line Bode plots for tuning servo amplifier current loops (and velocity loops)

Tuning servo amplifiers using Straight-Line Bode plots for t...

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11th World Multi-conference on systemics, Cybernetics and Informatics/13th international conference on Information systems Analysis and synthesis

作者： Brandstetter, Robert W. Hexagon Metrol Miamisburg OH 45342 USA

ISBN: (纸本)9781934272169

Servo amplifier (servo "drives") vendors do not provide customers with any means to analytically servo tune their products. This paper presents an analytic method for tuning servo amplifiers without expensive controls software, and without actual hardware, test utilities, or "on site" servo tuning, by using "Straight Line" Bode plots. This technique permits control system users to analytically tune their amplifiers rather than having to empirically tune them. This is the first in a series of papers to present techniques to allow servo amplifier users to analytically integrate their drives;this paper presents the Straight-Line Bode plotting method and outlines tuning current loops. The second paper will cover tuning velocity loops, again using Straight Line Bode plots. The third paper will address proper tachometer scaling and buffering, and will present a "rules based" system level tuning method. All these papers will be written to enable users to analytically tune their servo amplifiers, to replace or augment the empirical method all vendors provide, with an end goal of creating auto tuning software. Straight Line Bode plots are asymptotic line Bode plots. As no commercial software to create these Bode plots was found, a method will first be presented to create them quickly and inexpensively. The method can be implemented in MatLab M. riles, VB code, or in Excel. These models and tuning techniques are being used by Sheffield Measurement, a division of Hexagon Metrology, for servo tuning its current loops and velocity loops on their CNC Coordinate Measuring Machines (CMMs), over a wide range of machine styles and sizes. This technique allows CMMs to be servo tuned "off line", so that little or no "on site" servo tuning is required. This is an important tool as the task of integrating CMM machine controllers to 3(rd) party CMM's is a growing mark et segment. These models apply equally well to all industrial servo drives.

关键词： software testing

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Prototyping of a WLAN system using C++ based architecture exploration 07

Prototyping of a WLAN system using C++ based architecture ex...

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proceedings of the 3rd international conference on Mobile multimedia communications

作者： Nikolaos S. Voros Konstantinos Masselos TEI of Mesolonghi Ethniki Odos Antiriou Nafpaktou Varia Nafpaktos Greece University of Peloponnese Terma Karaiskaki Tripolis Greece

ISBN: (纸本)9789630626705

Wireless Local Area Networks (WLANs) are currently considered as one of the most popular application domains. In this paper the protyping of a WLAN system on a platform including microprocessors and FPGAs is described. The prototyping started from architecture exploration using a C++ library for hardware/software codesign. The developed prototype allowed evaluation of the system performance and the architecture decisions. The use of the systematic architecture exploration allowed making correct decisions early in the design cycle thus avoiding time consuming iterations from lower design stages (necessary when constraints are not met by the final implementation).

关键词： wireless systems architecture exploration hardware/software codesign

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Applying formal methods for the design of wireless telecommunication systems 07

Applying formal methods for the design of wireless telecommu...

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proceedings of the 3rd international conference on Mobile multimedia communications

作者： Konstantinos Antonis Nikolaos S. Voros TEI of Lamia Lamia Greece TEI of Mesolonghi Ethniki Odos Antiriou Nafpaktou Varia Nafpaktos Greece

ISBN: (纸本)9789630626705

The increasing complexity of modern telecommunication systems is one of the main issues encountered in most telecom products. Despite the plethora of methods and tools for efficient system design, verification and validation phases are still consuming significant part of the overall design time. The proposed approach outlines the use of the B method/language for producing correct-by-construction implementations of telecommunication systems. The method described is supported by appropriate tools that automate the process of proving that system properties are maintained during the various design stages. The feasibility of the latter is evaluated in practice through the design of a real world telecom application, borrowed from the domain of wireless telecommunication networks.

关键词： wireless systems B language formal methods hardware/software codesign

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CODES+ISSS 2005 - international conference on hardware/software codesign and system synthesis

CODES+ISSS 2005 - International Conference on Hardware/Softw...

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3rd IEEE/ACM/IFIP international conference on hardware/software codesign and systems synthesis CODES+ISSS 2005

ISBN: (纸本)1595931619

The proceedings contain 61 papers from the Codes+ISSS 2005 - international conference on hardware/software codesign and system synthesis. The topics discussed include: hardware and software architecture for the CELL processor;performance and power analysis of computer systems;the challenge of embedded system design;conflict analysis in multipurpose synthesis for optimized system integration;a cycle-accurate compilation algorithm for custom pipelines datapaths;highly flexible multi-mode system synthesis;implementation of dynamic streaming applications on heterogeneous multi-processor architectures;and increasing on-chip memory space utilization for embedded chip multiprocessors through data compression.

关键词： Computer software

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Promises and challenges of mobile embedded system: An industry perspective 06

Promises and challenges of mobile embedded system: An indust...

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CODES+ISSS 2006: 4th international conference on hardware software codesign and system synthesis

作者： Woo, Nam-Sung Samsung Electronics

ISBN: (纸本)1595933700

Recent trends of IT industry include Mobile/Portable Solution, Integration and Faster Time-to-Market. These trends impose many interesting challenges to Embedded system development both in hardware and software. In this talk, we will first identify some of the challenges. Then, we will present both the current status and plans of Samsung Electronics (in particular, Samsung Semiconductor) to address and overcome the challenges. © Copyright 2006 ACM.

关键词： Information technology

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hardware-software codesign of multimedia embedded systems: the PeaCE approach

Hardware-software codesign of multimedia embedded systems: t...

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12th international conference on Embedded and Real-Time Computing systems and Applications

作者： Ha, Soonhui Lee, Choonseung Yi, Youngmin Kwon, Seongnam Joo, Young-Pyo Seoul Natl Univ CAP Lab Seoul South Korea

ISBN: (纸本)0769526764

hardware/software codesign involves various design problems including system specification, design space exploration, hardware/software co-verification, and system synthesis. A codesign environment is a software tool that facilitates capabilities to solve these design problems. This paper presents the PeaCE codesign environment mainly targeting for multimedia applications with real-time constraints. PeaCE specifies the system behavior with a heterogeneous composition of three models of computation. The PeaCE environment provides seamless co-design flow from functional simulation to system synthesis, utilizing the features of the formal models maximally during the whole design process. Preliminary experiments with real examples prove the viability of the proposed technique.

关键词： Embedded systems

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hardware /software codesign of image processing applications using transaction level modeling

Hardware /software codesign of image processing applications...

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CAMPS 2006 - international Workshop on Computer Architecture for Machine Perception and Sensing

作者： Cheema, Muhammad Orner Hammami, Omar Lacassagne, Lionel Merigot, Alain ENSTA 32 Boulevard Victor 75739 Paris France IEF University of Paris Sud 91405 Orsay France

ISBN: (纸本)1424406862

Transaction Level Modeling (TLM) and component based software development approaches accelerate the process of an embedded system design and simulation and hence improve the overall productivity. On the other hand, system level design languages facilitate the fast hardware synthesis at behavioral level of abstraction. In this paper, we introduce an approach for hardware/software codesign of image processing application that uses TLM and component based software design approaches along with HW synthesis using systemC to accelerate system design and verification process. Our experiments performed over an image processing application shows the effectiveness of our methodology. © 2006 IEEE.

关键词： hardware-software codesign

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A unified hardware/software runtime environment for FPGA-based reconfigurable computers using BORPH

A unified hardware/software runtime environment for FPGA-bas...

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CODES+ISSS 2006: 4th international conference on hardware software codesign and system synthesis

作者： So, Hayden Kwok-Hay Tkachenko, Artem Brodersen, Robert Department of Electrical Engineering and Computer Science University of California Berkeley

ISBN: (纸本)1595933700

This paper presents a hw/sw codesign methodology based on BORPH, an operating system designed for FPGA-based reconfigurable computers (RC's). By providing native kernel support for FPGA hardware, BORPH offers a homogeneous UNIX interface for both software and hardware processes. hardware processes inherit the same level of service from the kernel, such as file system support, as typical UNIX software processes. hardware and software components of a design therefore run as hardware and software processes within BORPH's run-time environment. The familiar and language independent UNIX kernel interface facilitates easy design reuse and rapid application development. Performance of our current implementation and our experience with developing a real-time wireless digital signal processing system based on BORPH will be presented. © Copyright 2006 ACM.

关键词： Field programmable gate arrays (FPGA)

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