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Custom assignment of MPI ranks for parallel multi-dimensional FFTs: Evaluation of BG/P versus BG/L

Custom assignment of MPI ranks for parallel multi-dimensiona...

引用

ieee International symposium on parallel and distributed processing with Applications

作者： Jagode, Heike Hein, Joachim Univ Tennessee Oak Ridge Natl Lab Knoxville TN 37996 USA Univ Edinburgh EPCC Edinburgh EH8 9YL Midlothian Scotland

ISBN: (纸本)9780769534718

For many scientific applications, the Fast Fourier Transformation (FFT) of multi-dimensional data is the kernel that limits scalability on a large number of processors. This paper investigates the extent of performance improvements for a parallel three-dimensional FFT (3D-FFT) implementation when using customized MPI task mappings. The MPI tasks are mapped in a customized fashion from the two-dimensional virtual processor grid of the algorithm to the physical hardware of a system with a mesh interconnect. We compare and analyze the outcomes on Blue Gene/P with those from previous investigations on Blue Gene/L. The performance analysis is based on bandwidth considerations. The results demonstrate that on Blue Gene/P a carefully chosen MPI task mapping with regards to the network characteristics is more important compared to Blue Gene/L and yields significant improvement.

关键词： Blue Gene FFT MPI task mapping MPI task placement mesh communication network network characteristic

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Architecture for an Offline parallel Debugger

Architecture for an Offline Parallel Debugger

引用

ieee International symposium on parallel and distributed processing with Applications

作者： Lindekugel, Karl DiGirolamo, Anthony Stanzione, Dan, Jr. Arizona State Univ Tempe AZ 85287 USA

ISBN: (纸本)9780769534718

This paper provides and overview of the GDBase framework for offline parallel debuggers. The framework was designed to become the basis of debugging tools which scale successfully on systems with tens to hundreds of thousands of cores. With several systems coming online at more than 50,000 cores in the past year debuggers which can run at these scales are now required. The proposed framework offers two features not found in current generation debugging tools: the ability to debug "offline", and a central database to act as a repository of debugging information. These two features enable the GDBase debugger to offer several advantages. The debugger can be used in conjunction with modern batch systems with low overhead, with user interaction taking place after the parallel system resources are freed. The use of a database and a simple API allows for multiple interfaces and data mining tools to be implemented to provide novel ways of viewing and analyzing debugging data. The database also enables cross-run analysis, and the combination of debugging, performance, and system health information. Evidence is provided of the scalability of the framework, as Well as output from several simple analysis tools that have been implemented.

关键词： hpc parallel debugging debugger Debugging OFF LINE Frameworks Building construction ARCHITECTURE central data base user-computer interaction WAREHOUSE viewing Database Scalability

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A prefetching scheme for energy conservation in parallel disk systems

A prefetching scheme for energy conservation in parallel dis...

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10th Workshop on Advances in parallel and distributed Computational Models/22nd ieee International parallel and distributed processing symposium

作者： Manzanares, Adam Bellani, Kiramnai Qin, Xiao Auburn Univ Dept Comp Sci & Software Engn Auburn AL 36830 USA

ISBN: (纸本)9781424416936

Large-scale parallel disk systems are frequently used to meet the demands of information systems requiring high storage capacities. 4 critical problem with these large-scale parallel disk systems is the fact that disks consume a significant amount of energy. To design economically attractive and environmentally friendly parallel disk systems, we developed two energy-aware prefetching strategies for parallel disk systems with disk buffers. First, we introduce a new buffer disk architecture that can provide significant energy savings for parallel disk systems while achieving high performance. Second, we design a prefetching approach to utilize an extra disk to accommodate prefetched data sets that are frequently accessed. third, we develop a second prefetching strategy that makes use of an existing disk in the parallel disk system as a buffer disk. Compared with the first prefetching scheme, the second approach lowers the capacity of the parallel disk system. However, the second approach is more cost-effective and energy-efficient than the first prefetching technique. Finally, we quantitatively compare both of our prefetching approaches against two conventional strategies including a dynamic power management technique and a non-energy-aware scheme. Using empirical results we show that our novel prefetching approaches are able to reduce energy dissipation in parallel disk systems by 44% and 50% when compared against a non-energy aware approach. Similarly, our strategies are capable of conserving 22% and 30% of the energy when compared to the dynamic power management technique.

关键词： Energy dissipation

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An integrated approach for reliability and dependability of wireless mesh networks

An integrated approach for reliability and dependability of ...

引用

IPDPS 2008 - 22nd ieee International parallel and distributed processing symposium

作者： Lukas, Georg Herms, André Ivanov, Svilen Nett, Edgar University of Magdeburg Institute for Distributed Systems Universitätsplatz 2 39106 Magdeburg Germany

ISBN: (纸本)9781424416943

Wireless Mesh Networks (WMNs) are gaining popularity in many application areas because of their low cost and high exibility. Technically, a WMN forms a distributed network-centric system which aims to provide communication services to the application layer, but has no built-in dependability provisions. To make the network dependable, many problems have to be solved on different layers. With this paper, we describe our ongoing work to provide an integrated solution to increase the dependability of WMNs. Our approach combines network coverage planning on the physical layer, bandwidth management on the link layer and live network monitoring to improve the reliability, availability and maintainability of a WMN. We provide ne-grained means to improve the predictability of the network components, thus making the WMN more dependable. In this paper, we present rst results of our work, and describe how they are interleaved. ©2008 ieee.

关键词： MESH networking

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DMA Performance Analysis and Multi-core Memory Optimization for SWIM Benchmark on the Cell Processor

DMA Performance Analysis and Multi-core Memory Optimization ...

引用

ieee International symposium on parallel and distributed processing with Applications

作者： Dou, Yong Deng, Lin Xu, Jinhui Zheng, Yi NUDT Natl Lab Parallel & Distributed Proc Changsha 410073 Hunan Peoples R China

ISBN: (纸本)9780769534718

The Cell processor is a typical heterogeneous multi-core processor, which owns powerful computing capability. But we are facing the challenges of 'memory wall' in developing parallel applications, such as, limited capacity of local memory, limited memory bandwidth for multi-cores and the long latency for data communication. The DMA transfer mechanism is often used to hide the long latency and improve the effective usage of memory bandwidth. In the paper, we start with a series of DMA experimental tests in the context of the Cell processor architecture, and perform mathematical analysis to setup a unified formula on the average bandwidth of DMA by means of exponential fitting, which describes that SPE amount and DMA block size take main effects on DMA bandwidth in quantity. With the supports of the DMA performance formula, we perform 4 types of memory optimization in the process of parallelizing, the SWIM benchmark program into a multi-core version. We take Sony PlayStation 3 (PS3) as our test-bed. For SWIM benchmark, with 6 SPE cores, we obtain over 13 times of speedup compared to single PPE, and 3.3 to 6.18 times to AMD and Intel CPU.

关键词： DMA performance SPEC parallelization memory optimization multi-core processor Multi-core processors memory bandwidth Local Memory PROCESSOR

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parallelism without Pain: Orchestrating Computational Algebra Components into a High-Performance parallel System

Parallelism without Pain: Orchestrating Computational Algebr...

引用

ieee International symposium on parallel and distributed processing with Applications

作者： Al Zain, A. D. Trinder, P. W. Hammond, K. Konovalov, A. Linton, S. Berthold, J. Heriot Watt Univ Sch Math & Comp Sci Edinburgh Midlothian Scotland Univ St Andrews Sch Comp Sci St Andrews Fife Scotland Univ Marburg Fachbereich Math Informat Hans Meerwein Strabe Marburg Germany

ISBN: (纸本)9780769534718

This paper describes a very high-level approach that aims to orchestrate sequential components written using high-level domain-specific programming into high-performance parallel applications. By achieving this goal, we hope to make parallel programming more accessible to experts in mathematics, engineering and other domains. A key feature of our approach is that parallelism is achieved without any modification to the underlying sequential computational algebra systems, or to the user-level components: rather, all orchestration is performed at an outer level, with sequential components linked through a standard communication protocol, the Symbolic Computing Software Composability Protocol, SCSCP Despite the generality of our approach, our results show that we are able to achieve very good, and even, in some cases, super-linear speedups on clusters of commodity workstations: up to a factor of 33.4 on a 28-processor cluster We are, moreover, able to parallelise a wider variety of problem, and achieve higher performance than typical specialist parallel computational algebra implementations.

关键词： parallel programming

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Optimization of multi-stage amplifiers in deep-submicron CMOS using a distributed/parallel genetic algorithm

Optimization of multi-stage amplifiers in deep-submicron CMO...

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ieee International symposium on Circuits and Systems

作者： Santos-Tavares, R. Paulino, N. Higino, J. Goes, J. Oliveira, J. P. Univ Nova Lisboa P-2829517 Monte De Caparica Portugal

ISBN: (纸本)9781424420780

This paper presents a framework for time-domain optimization of amplifiers employing a parallel genetic algorithm based on a message passing interface. This methodology achieves a considerable reduction in the optimization time (up to 19 times faster than a serial implementation). Increasing the processing capacity allows searching within a larger design space using complex transistors models, yielding more accurate results. The optimization, based on transient simulations, is possible due to the integration of a genetic algorithm optimizer together with the open-source simulator NGSPICE source-code.

关键词： Message passing

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A static data placement strategy towards perfect load-balancing for distributed storage clusters

A static data placement strategy towards perfect load-balanc...

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IPDPS 2008 - 22nd ieee International parallel and distributed processing symposium

作者： Madathil, Deepthi K. Thota, Rajani B. Paul, Ina Xie, Tao Department of Computer Science San Diego State University 5500 Campanile Drive San Diego CA 92182 United States

ISBN: (纸本)9781424416943

Applications like cluster-based Video-On-Demand (VOD) systems are inherently data-intensive because clients frequently retrieve data stored on a distributed storage subsystem interconnected by a high-speed local network. To meet the Quality-of-Service (QoS) imposed by the clients, quick responses to access requests are fundamental for these applications. Among the numerous ways to reduce response times, data placement, has attracted much attention from researchers due to its effectiveness and low cost. In this paper, we propose a novel load-balancing and performance oriented static data placement strategy, called perfect balancing (PB), which can be applied to distributed storage subsystems in clusters to noticeably improve system responsiveness. The basic idea of PB is to balance the load across local disks and to minimize the discrepancy of service times of data on each disk simultaneously. A comprehensive experimental study shows that PB reduces mean response time up to 19.04% and 8.67% over the two wellknown data placement algorithms Greedy and SP respectively. ©2008 ieee.

关键词： Quality of service

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Efficient parallel Adaptive Beamforming Algorithm for Planar Array System

Efficient Parallel Adaptive Beamforming Algorithm for Planar...

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8th International symposium on Antennas, Propagation and EM Theory

作者： Huang, Fei Sheng, Wei-xing Ma, Xiao-feng Nanjing Univ Sci & Technol Dept Commun Engn Nanjing 210094 Peoples R China

ISBN: (纸本)9781424421923

For large planar adaptive arrays, the computational load and the terabyte data transmission are two challenging problems in the implementation of adaptive beamforming system. This paper considers the problem of designing an efficient parallel adaptive algorithm using the two dimensional(2D) planar array. This paper extends the efficient parallel adaptive beamforming algorithm based on LCMV to adaptive 2D sensor array processing. The proposed 2D parallel adaptive algorithm can be easily implemented in distributed-parallel-processing system due to its parallel structure. It can save the data transmission as well as computing cost.

关键词： Adaptive algorithms

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FlexPar: Reconfigurable middleware for parallel environments

FlexPar: Reconfigurable middleware for parallel environments

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11th ieee symposium on Object/Component/Service-Oriented Real-Time distributed Computing

作者： Ueyama, Jo Madeira, Edmundo R. M. Grace, Paul Univ Estadual Campinas Inst Comp Ave Albert Einstein1251 Caixa Postal 6176 BR-13083970 Campinas SP Brazil Univ Lancaster Dept Comp Lancaster England

ISBN: (纸本)9780769531328

Although a growing number of devices have the support for parallel processing, parallelism is not widely exploited, as it should be. This can be illustrated by the fact that all Apple desktops and laptops are currently supplied with one or more dualcore processors. Despite this, parallel programming in popular languages such as Java is not widely encouraged and often only recommended as a last resort. In addition, it is likely that the next generation parallel applications will have to operate within a diverse range of heterogeneous devices ranging from supercomputers to sensors. This paper proposes a flexible component-based middleware that aims at facilitating the construction of deadlock free parallel and concurrent applications for heterogeneous environments. The middleware is particularly targeted to tailor applications to the target need and environment. For our prototyping, we implemented plugins that are capable of deploying JCSP (CSP library for Java programmers) and occam-pi processes. Both JCSP and occam-pi make use of the CSP disciplines. The CSP (Communicating Sequential Processes) paradigm helps us to avoid concurrency problems such as deadlocks. It should be stressed that there is no bias towards these languages as the proposed middleware is highly extensible.

关键词： Middleware

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