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检索条件"任意字段=Proceedings of the fourteenth workshop on Parallel and distributed simulation"

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Advanced distributed simulation (keynote speech): what we learned, where to go next 00

Advanced distributed simulation (keynote speech): what we le...

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proceedings of the fourteenth workshop on parallel and distributed simulation

作者： W. H. Lunceford US Army Model and Simulation Office Arlington VA

No abstract available.

ISBN: (纸本)9780769506678

No abstract available.

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A performance simulation technique for distributed programs: Application to an SOR iterative solver 8

A performance simulation technique for distributed programs:...

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8th Euromicro workshop on parallel and distributed Processing, EURO-PDP 2000

作者： Aversa, R. Di Martino, B. Mazzocca, N. Villano, U. Facoltà di Ingegneria Dipartimento di Ingegneria dell' Informazione Second University of Naples Italy Facoltà di Ingegneria Informatica Università del Sannio Italy

ISBN: (纸本)0769505007

In this paper we present the application of an approach for the performance prediction of message passing programs, to a PVM code implementing an iterative solver based on the Successive OverRelaxation method. The approach, based on the integration of static program analysis and simulation techniques, is aimed at significantly speeding up the time needed for simulating the execution of a message passing program. We show how the proposed technique can provide, in a reasonable elaboration time, the user for a characterization of iterative regular programs as the proposed one, in terms of idle-, cpu-, communication and synchronization time in Heterogeneous and Network Computing environments. © 2000 IEEE.

关键词： Iterative methods

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Safe timestamps and large-scale modeling

Safe timestamps and large-scale modeling

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workshop on Principles of Advanced and distributed simulation (PADS)

作者： D. Nicol J. Liu J. Cowie Dartmouth College USA Cooperating Systems Corporation

The paper examines issues that recur in consideration of simulation time-stamps, in the context of building very large simulation models from components developed by different groups at different times. A key problem here is "safety", loosely defined to mean that unintended model behavior does not occur due to unpredictable behavior of timestamp generation and comparisons. We revisit the problems of timestamp format and simultaneity, and then turn to the new problem of timestamp interoperability. We describe how a C++ simulation kernel can support the concurrent evaluation of submodels that internally use heterogeneous timestamps, and evaluate the execution time costs of doing so. We find that use of a safe timestamp format that explicitly allows different time scales costs less than 10% over a stock 64-bit integer format, whereas support for completely heterogeneous timestamps can cost as much as 50% in execution speed.

关键词： Large-scale systems Costs Educational institutions Context modeling Kernel Discrete event simulation Contracts Runtime Middleware Mars

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parallelizing a sequential logic simulator using an optimistic framework based on a global parallel heap event queue: an experience and performance report

Parallelizing a sequential logic simulator using an optimist...

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workshop on Principles of Advanced and distributed simulation (PADS)

作者： S.K. Prasad N. Junankar Computer Science Department Georgia State University Atlanta USA

We have parallelized the Iowa Logic Simulator a gate-level fine-grained discrete-event simulator by employing an optimistic algorithm framework based on a global event queue implemented as a parallel heap. The original code and the basic data structures of the serial simulator remained unchanged. Wrapper data structures for the logical processes (gates) and the events are created to allow roll-backs, all the earliest events at each logical processes are stored into the parallel heap, and multiple earliest events are simulated repeatedly by invoking the simulate function of the serial simulator. The parallel heap allowed extraction of hundreds to thousands of earliest events in each queue access. On a bus-based shared-memory multiprocessor simulation of synthetic circuits with 250,000 gates yielded speedups of 3.3 employing five processors compared to the serial execution time of the Iowa Logic Simulator and limited the number of roll-backs to within 2,000. The basic steps of parallelization are well-defined and general enough to be employable on other discrete-event simulators.

关键词： Discrete event simulation Circuit simulation Computational modeling Computer simulation Data structures Protocols Concurrent computing Computer science Logic circuits Circuit testing

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Network aware time management and event distribution

Network aware time management and event distribution

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workshop on Principles of Advanced and distributed simulation (PADS)

作者： G.F. Riley R. Fujimoto M.H. Ammar College of Computing Georgia Institute of Technology Atlanta GA USA Georgia Institute of Technology Atlanta GA US

We discuss new synchronization algorithms for parallel and distributed discrete event simulations (PDES) which exploit the capabilities and behavior of the underlying communications network. Previous work in this area has assumed the network to be a black box which provides a one-to-one, reliable and in-order message passing paradigm. In our work, we utilize the broadcast capability of the ubiquitous Ethernet for synchronization computations, and both unreliable and reliable protocols for message passing, to achieve more efficient communications between the participating systems. We describe two new algorithms for computation of a distributed snapshot of global reduction operations on monotonically increasing values. The algorithms require O(N) messages (where N is the number of systems participating in the snapshot) in the normal case. We specifically target the use of this algorithm for distributed discrete event simulations to determine a global lower bound on time-stamp (LETS), but expect the algorithm has applicability outside the simulation community.

关键词： Protocols Discrete event simulation Ethernet networks Computational modeling distributed computing Telecommunication network reliability Broadcasting Communication networks Message passing Pervasive computing

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Repeatability in real-time distributed simulation executions

Repeatability in real-time distributed simulation executions

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workshop on Principles of Advanced and distributed simulation (PADS)

作者： T. McLean R. Fujimoto College of Computing Georgia Institute of Technology Atlanta GA USA

Real-time distributed simulations, such as on-line gaming or military training simulations are normally considered to be non-deterministic. Analysis of these simulations is therefore difficult depending solely on logging and runtime observations. This paper explores an approach for removing one major source of non-determinism in these simulations, thereby allowing repeatable executions. Specifically, we use a synchronization protocol to ensure repeatable delivery of messages. Through limited instrumentation of the simulation code, we maintain a virtual time clock, by which message delivery is governed. The additional overhead imposed by the scheme is shown to be reasonable, although additional reductions in this overhead are anticipated. The results are demonstrated in the context of a simple combat model, whose only source of non-determinism is communications latency. The simulation is shown to be made repeatable, and the perturbation on the execution compared to the non-repeatable execution small. The paper is one step in bridging the gap between the traditional PDES perspective and real-time simulation world.

关键词： Protocols Educational institutions Ores Instruments Context Humans Delay Large-scale systems Runtime Merging

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Optimizing cell-size in grid-based DDM

Optimizing cell-size in grid-based DDM

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workshop on Principles of Advanced and distributed simulation (PADS)

作者： R. Ayani F. Moradi G. Tan School of Computing National University of Singapore Singapore

In a large scale distributed simulation with thousands of dynamic objects, efficient communication of data among these objects is an important issue. The broadcasting mechanism specified by the distributed Interactive simulation (DIS) standards is not suitable for large scale distributed simulations. In the high level architecture (HLA) paradigm, the Runtime Infrastructure (RTI) provides a set of services, such as data distribution management (DDM) among federates. The goal of the DDM module in RTI is to make the data communication more efficient by sending the data only to those federates that need the data, as opposed to the broadcasting mechanism employed by DIS. Several DDM schemes have appeared in the literature. We discuss grid based DDM and develop a DDM model that uses grids for matching the publishing/subscription regions, and for data filtering. We show that appropriate choice of the grid-cell size is crucial in obtaining good performance. We develop an analytical model and derive a formula for identifying the optimal cell size in grid-based DDM.

关键词： distributed decision making Large-scale systems Broadcasting Runtime Data communication Publishing Subscriptions Matched filters Filtering Analytical models

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simulation studies of gigabit ethernet versus myrinet using real application cores 4th

Simulation studies of gigabit ethernet versus myrinet using ...

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4th International workshop on Communication, Architecture, and Applications for Network-Based parallel Computing (CANPC 2000)

作者： Chen, H Wyckoff, P Sandia Natl Labs Livermore CA 94551 USA

ISBN: (纸本)3540678794

parallel cluster computing projects use a large number of commodity PCs to provide cost-effective computational power to run parallel applications. Because properly load-balanced distributed parallel applications tend to send messages synchronously, minimizing blocking is as crucial a requirement for the network fabric as are those of high bandwidth and low latency. We consider the selection of an optimal, commodity-based, interconnect network technology and topology to provide high bandwidth, low latency, and reliable delivery. Since our network design goal is to facilitate the performance of real applications, we evaluated the performance of myrinet and gigabit ethernet technologies in the context of working algorithms using modeling and simulation tools developed for this work.

关键词： Cluster computing

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ROSS: a high-performance, low memory, modular Time Warp system

ROSS: a high-performance, low memory, modular Time Warp syst...

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PADS 2000 - 14th ACM/IEEE/SCS workshop on parallel and distributed simulation

作者： Carothers, Christopher D. Bauer, David Pearce, Shawn Rensselaer Polytechnic Inst Troy United States

In this paper, we introduce a new Time Warp system called ROSS: Rensselaer's Optimistic simulation System. ROSS is an extremely modular kernel that is capable of achieving event rates as high as 1,250,000 events per second when simulating a wireless telephone network model (PCS) on a quad processor PC server. In a head-to-head comparison, we observe that ROSS out performs the Georgia Tech Time Warp (GTW) system on the same computing platform by up to 180%. ROSS only requires a small constant amount of memory buffers greater than the amount needed by the sequential simulation for a constant number of processors. The driving force behind these high-performance and low memory utilization results is the coupling of an efficient pointer-based implementation framework, Fujimoto's fast GVT algorithm for shared memory multiprocessors, reverse computation and the introduction of Kernel Processes (KPs). KPs lower fossil collection overheads by aggregating processed event lists. This aspect allows fossil collection to be done with greater frequency, thus lowering the overall memory necessary to sustain stable, efficient parallel execution.

关键词： Computer simulation

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A case study of trace-driven simulation for analyzing interconnection networks: cc-NUMAs with ILP processors 8

A case study of trace-driven simulation for analyzing interc...

引用

8th Euromicro workshop on parallel and distributed Processing, EURO-PDP 2000

作者： Puente, V. Prellezo, J.M. Izu, C. Gregorio, J.A. Beivide, R. University of Cantabria Spain University of Adelaide Australia

ISBN: (纸本)0769505007

The evaluation of network performance under real application loads is carried out by detailed time-intensive and resource-intensive simulations. Moreover, the use of ILP (instruction-level parallel) processors in cc-NUMA (cache-coherent non-uniform memory access) architectures introduces non-deterministic memory accesses;the resulting parallel system must be modeled by a detailed execution-driven simulation, further increasing the evaluation cost. This paper introduces a simulation methodology, based on network traces, to estimate the impact that a given network has on the execution time of parallel applications. This methodology allows the study of the network design space with a level of accuracy close to that of execution-driven simulations but with much shorter simulation times. The network trace, extracted from an execution-driven simulation, is processed to substitute the temporal dependencies produced by the simulated network with an estimation of the message dependencies caused by both the application and the applied cache-coherent protocol. This methodology has been tested on two direct networks, with 16 and 64 nodes respectively, running the FFT and Radix applications of the SPLASH2 suite. The trace-driven simulation is 3 to 4 times faster than the execution-driven one, with an average error of 4% in the total execution time. © 2000 IEEE.

关键词： Interconnection networks (circuit switching)

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