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parallel Suffix Array and Least Common Prefix for the GPU 13

Parallel Suffix Array and Least Common Prefix for the GPU

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18th acm sigplan symposium on principles and practice of parallel programming

作者： Deo, Mrinal Keely, Sean Adv Micro Devices Inc Sunnyvale CA 94088 USA Univ Texas Austin Austin TX 78712 USA

ISBN: (纸本)9781450319225

Suffix Array (SA) is a data structure formed by sorting the suffixes of a string into lexicographic order. SAs have been used in a variety of applications, most notably in pattern matching and Burrows-Wheeler Transform (BWT) based lossless data compression. SAs have also become the data structure of choice for many, if not all, string processing problems to which suffix tree methodology is applicable. Over the last two decades researchers have proposed many suffix array construction algorithm (SACAs). We do a systematic study of the main classes of SACAs with the intent of mapping them onto a data parallel architecture like the GPU. We conclude that skew algorithm [12], a linear time recursive algorithm, is the best candidate for GPUs as all its phases can be efficiently mapped to a data parallel hardware. Our OpenCL implementation of skew algorithm achieves a throughput of up to 25 MStrings/sec and a speedup of up to 34x and 5.8x over a single threaded CPU implementation using a discrete GPU and APU respectively. We also compare our OpenCL implementation against the fastest known CPU implementation based on induced copy in g and achieve a speedup of up to 3.7x. Using SA we construct BWT on GPU and achieve a speedup of 11x over the fastest known BWT on GPU. Suffix arrays are often augmented with the longest common prefix (LCP) information. We design a novel high-performance parallel algorithm for computing LCP on the GPU. Our GPU implementation of LCP achieves a speedup of up to 25x and 4.3x on discrete GPU and APU respectively.

关键词： Algorithms Performance Suffix Array Suffix Tree BWT Longest Common Prefix OpenCL GPU Prefix Sum Accelerated Processing Unit (APU)

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StreamScan: Fast Scan Algorithms for GPUs without Global Barrier Synchronization 13

StreamScan: Fast Scan Algorithms for GPUs without Global Bar...

引用

18th acm sigplan symposium on principles and practice of parallel programming

作者： Yan, Shengen Long, Guoping Zhang, Yunquan Chinese Acad Sci Inst Software Lab Parallel Software & Computat Sci Beijing 100864 Peoples R China Chinese Acad Sci State Key Lab Comp Sci Beijing 100864 Peoples R China Chinese Acad Sci Grad Univ Beijing 100864 Peoples R China

ISBN: (纸本)9781450319225

Scan (also known as prefix sum) is a very useful primitive for various important parallel algorithms, such as sort, BFS, SpMV, compaction and so on. Current state of the art of GPU based scan implementation consists of three consecutive Reduce-Scan-Scan phases. This approach requires at least two global barriers and 3N (N is the problem size) global memory accesses. In this paper we propose StreamScan, a novel approach to implement scan on GPUs with only one computation phase. The main idea is to restrict synchronization to only adjacent workgroups, and thereby eliminating global barrier synchronization completely. The new approach requires only 2N global memory accesses and just one kernel invocation. On top of this we propose two important optimizations to further boost performance speedups, namely thread grouping to eliminate unnecessary local barriers, and register optimization to expand the on chip problem size. We designed an auto-tuning framework to search the parameter space automatically to generate highly optimized codes for both AMD and Nvidia GPUs. We implemented our technique with OpenCL. Compared with previous fast scan implementations, experimental results not only show promising performance speedups, but also reveal dramatic different optimization tradeoffs between Nvidia and AMD GPU platforms.

关键词： Scan prefix-sum OpenCL CUDA GPU parallel algorithms

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Scheduling parallel Programs by Work Stealing with Private Deques 13

Scheduling Parallel Programs by Work Stealing with Private D...

引用

18th acm sigplan symposium on principles and practice of parallel programming

作者： Acar, Umut A. Chargueraud, Arthur Rainey, Mike Carnegie Mellon Univ Dept Comp Sci Pittsburgh PA 15213 USA Univ Paris 11 CNRS LRI Orsay France

ISBN: (纸本)9781450319225

Work stealing has proven to be an effective method for scheduling parallel programs on multicore computers. To achieve high performance, work stealing distributes tasks between concurrent queues, called deques, which are assigned to each processor. Each processor operates on its deque locally except when performing load balancing via steals. Unfortunately, concurrent deques suffer from two limitations: 1) local deque operations require expensive memory fences in modern weak-memory architectures, 2) they can be very difficult to extend to support various optimizations and flexible forms of task distribution strategies needed many applications, e. g., those that do not fit nicely into the divide-and-conquer, nested data parallel paradigm. For these reasons, there has been a lot recent interest in implementations of work stealing with non-concurrent deques, where deques remain entirely private to each processor and load balancing is performed via message passing. Private deques eliminate the need for memory fences from local operations and enable the design and implementation of efficient techniques for reducing task-creation overheads and improving task distribution. These advantages, however, come at the cost of communication. It is not known whether work stealing with private deques enjoys the theoretical guarantees of concurrent deques and whether they can be effective in practice. In this paper, we propose two work-stealing algorithms with private deques and prove that the algorithms guarantee similar theoretical bounds as work stealing with concurrent deques. For the analysis, we use a probabilistic model and consider a new parameter, the branching depth of the computation. We present an implementation of the algorithm as a C++ library and show that it compares well to Cilk on a range of benchmarks. Since our approach relies on private deques, it enables implementing flexible task creation and distribution strategies. As a specific example, we show how to impleme

关键词： work stealing nested parallelism dynamic load balancing

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parallel programming with Big Operators

Parallel Programming with Big Operators

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18th acm sigplan symposium on principles and practice of parallel programming

作者： Park, Changhee Steele, Guy L., Jr. Tristan, Jean-Baptiste Korea Adv Inst Sci & Technol Taejon South Korea

In the sciences, it is common to use the so-called "big operator" notation to express the iteration of a binary operator (the reducer) over a collection of values. Such a notation typically assumes that the reducer is associative and abstracts the iteration process. Consequently, from a programming point-of-view, we can organize the reducer operations to minimize the depth of the overall reduction, allowing a potentially parallel evaluation of a big operator expression. We believe that the big operator notation is indeed an effective construct to express parallel computations in the Generate/Map/Reduce programming model, and our goal is to introduce it in programming languages to support parallel programming. The effective definition of such a big operator expression requires a simple way to generate elements, and a simple way to declare algebraic properties of the reducer (such as its identity, or its commutativity). In this poster, we want to present an extension of Scala with support for big operator expressions. We show how big operator expressions are defined and how the API is organized to support the simple definition of reducers with their algebraic properties.

关键词： parallelism Mathematical notation Scala

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Scalable Deterministic Replay in a parallel Full-system Emulator 13

Scalable Deterministic Replay in a Parallel Full-system Emul...

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18th acm sigplan symposium on principles and practice of parallel programming

作者： Chen, Yufei Chen, Haibo Fudan Univ Sch Comp Sci Shanghai Peoples R China Shanghai Jiao Tong Univ Inst Parallel & Distributed Syst Shanghai 200030 Peoples R China

ISBN: (纸本)9781450319225

Full-system emulation has been an extremely useful tool in developing and debugging systems software like operating systems and hypervisors. However, current full-system emulators lack the support for deterministic replay, which limits the reproducibility of concurrency bugs that is indispensable for analyzing and debugging the essentially multi-threaded systems software. This paper analyzes the challenges in supporting deterministic replay in parallel full-system emulators and makes a comprehensive study on the sources of non-determinism. Unlike application-level replay systems, our system, called ReEmu, needs to log sources of non-determinism in both the guest software stack and the dynamic binary translator for faithful replay. To provide scalable and efficient record and replay on multicore machines, ReEmu makes several notable refinements to the CREW protocol that replays shared memory systems. First, being aware of the performance bottlenecks in frequent lock operations in the CREW protocol, ReEmu refines the CREW protocol with a seqlock-like design, to avoid serious contention and possible starvation in instrumentation code tracking dependence of racy accesses on a shared memory object. Second, to minimize the required log files, ReEmu only logs minimal local information regarding accesses to a shared memory location, but instead relies on an offline log processing tool to derive precise shared memory dependence for faithful replay. Third, ReEmu adopts an automatic lock clustering mechanism that clusters a set of uncontended memory objects to a bulk to reduce the frequencies of lock operations, which noticeably boost performance. Our prototype ReEmu is based on our open-source COREMU system and supports scalable and efficient record and replay of full-system environments (both x64 and ARM). Performance evaluation shows that ReEmu has very good performance scalability on an Intel multicore machine. It incurs only 68.9% performance overhead on average (ranging

关键词： Algorithms Performance Reliability Scalable Deterministic Replay Full-system Emulator

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ZOOMM: A parallel Web Browser Engine for Multicore Mobile Devices

ZOOMM: A Parallel Web Browser Engine for Multicore Mobile De...

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18th acm sigplan symposium on principles and practice of parallel programming

作者： Cascaval, Calin Fowler, Seth Ortego, Pablo Montesinos Piekarski, Wayne Reshadi, Mehrdad Robatmili, Behnam Weber, Michael Bhavsar, Vrajesh Qualcomm Res Silicon Valley Raleigh NC USA

We explore the challenges in expressing and managing concurrency in browsers on mobile devices. Browsers are complex applications that implement multiple standards, need to support legacy behavior, and are highly dynamic and interactive. We present ZOOMM, a highly concurrent web browser engine prototype and show how concurrency is effectively exploited at different levels: speed up computation performance, preload network resources, and preprocess resources outside the critical path of page loading. On a dual-core Android mobile device we demonstrate that ZOOMM is two times faster than the native WebKit based browser when loading the set of pages defined in the Vellamo benchmark.

关键词： parallel Browser Mobile Multicore

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Decentralized execution of constraint handling rules for ensembles 13

Decentralized execution of constraint handling rules for ens...

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15th symposium on principles and practice of Declarative programming, PPDP 2013

作者： Lam, Edmund S. L. Cervesato, Iliano Carnegie Mellon University United States

ISBN: (纸本)9781450321549

CHR is a declarative, concurrent and committed choice rule-based constraint programming language. In this paper, we adapt CHR to provide a decentralized execution model for parallel and distributed programs. Specifically, we consider an execution model consisting of an ensemble of computing entities, each with its own constraint store and each capable of communicating with its neighbors. We extend CHR into CHRe, in which rules are executed at a location and are allowed to access the constraint store of its immediate neighbors. We give an operational semantics for CHRe, denoted ω 0e, that defines incremental and asynchronous decentralized rewriting for the class of CHRe rules characterized by purely local matching (0-neighbor restricted rules). We show the soundness of the ω0e semantics with respect to the abstract CHR semantics. We then give a safe encoding of the more general 1-neighbor restricted rules as 0-neighbor restricted rules, and discuss how this encoding can be generalized to all CHRe programs. © 2013 acm.

关键词： Constraint programming

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PPoPP'12 - proceedings of the 2012 acm sigplan symposium on principles and practice of parallel programming

PPoPP'12 - Proceedings of the 2012 ACM SIGPLAN Symposium on ...

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17th acm sigplan symposium on principles and practice of parallel programming, PPoPP'12

ISBN: (纸本)9781450311601

The proceedings contain 57 papers. The topics discussed include: scalable framework for mapping streaming applications onto multi-GPU systems;efficient performance evaluation of memory hierarchy for highly multithreaded graphics processors;extending a C-like language for portable SIMD programming;DOJ: dynamically parallelizing object-oriented programs;GPU-based NFA implementation for memory efficient high speed regular expression matching;concurrent tries with efficient non-blocking snapshots;deterministic parallel random-number generation for dynamic-multithreading platforms;algorithm-based fault tolerance for dense matrix factorizations;revisiting the combining synchronization technique;FlexBFS: a parallelism-aware implementation of breadth-first search on GPU;optimizing remote accesses for offloaded kernels: application to high-level synthesis for FPGA;and the boat hull model: adapting the roofline model to enable performance prediction for parallel computing.

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Prolog programming with a map-reduce parallel construct 13

Prolog programming with a map-reduce parallel construct

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15th symposium on principles and practice of Declarative programming, PPDP 2013

作者： Côrte-Real, Joana Dutra, Inês Rocha, Ricardo CRACS INESC TEC University of Porto Rua Campo Alegre 1021/1055 4169-007 Porto Portugal

ISBN: (纸本)9781450321549

Map-Reduce is a programming model that has its roots in early functional programming. In addition to producing short and elegant code for problems involving lists or collections, this model has proven very useful for large-scale highly parallel data processing. In this work, we present the design and implementation of a high-level parallel construct that makes the Map-Reduce programming model available for Prolog programmers. To the best of our knowledge, there is no Map-Reduce framework native to Prolog, and so the aim of this work is to offer data processing features from which several applications can greatly benefit;the Inductive Logic programming field, for instance, can take advantage of a Map-Reduce predicate when proving newly created rules against sets of examples. Our Map-Reduce model was comprehensively tested with different applications. Our experiments, using the Yap Prolog system, show that: (i) the model scales linearly up to 24 processors;(ii) a dynamic distributed scheduling strategy performs better than centralized or static scheduling strategies;and (iii) the performance varies significantly with the number of items being sent to each processor at a time. Overall, our Map-Reduce framework presents as a good alternative for both taking advantage of the currently available low cost multi-core architectures and developing scalable data processing applications, native to the Prolog programming language. © 2013 acm.

关键词： Computer circuits

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A Peta-scalable CPU-GPU Algorithm for Global Atmospheric Simulations 13

A Peta-scalable CPU-GPU Algorithm for Global Atmospheric Sim...

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18th acm sigplan symposium on principles and practice of parallel programming

作者： Yang, Chao Xue, Wei Fu, Haohuan Gan, Lin Li, Linfeng Xu, Yangtong Lu, Yutong Sun, Jiachang Yang, Guangwen Zheng, Weimin Chinese Acad Sci Inst Software Beijing Peoples R China Tsinghua Univ Dept Comp Sci & Technol Beijing 100084 Peoples R China Tsinghua Univ Minist Educ Key Lab Earth Syst Modeling Beijing 100084 Peoples R China Tsinghua Univ Ctr Earth Syst Sci Beijing 100084 Peoples R China Natl Univ Def Technol Dept Comp Sci & Technol Changsha Hunan Peoples R China Chinese Acad Sci State Key Lab Space Weather Beijing Peoples R China

ISBN: (纸本)9781450319225

Developing highly scalable algorithms for global atmospheric modeling is becoming increasingly important as scientists inquire to understand behaviors of the global atmosphere at extreme scales. Nowadays, heterogeneous architecture based on both processors and accelerators is becoming an important solution for large-scale computing. However, large-scale simulation of the global atmosphere brings a severe challenge to the development of highly scalable algorithms that fit well into state-of-the-art heterogeneous systems. Although successes have been made on GPU-accelerated computing in some top-level applications, studies on fully exploiting heterogeneous architectures in global atmospheric modeling are still very less to be seen, due in large part to both the computational difficulties of the mathematical models and the requirement of high accuracy for long term simulations. In this paper, we propose a peta-scalable hybrid algorithm that is successfully applied in a cubed-sphere shallow-water model for global atmospheric simulations. We employ an adjustable partition between CPUs and GPUs to achieve a balanced utilization of the entire hybrid system, and present a pipe-flow scheme to conduct conflict-free inter-node communication on the cubed-sphere geometry and to maximize communication-computation overlap. Systematic optimizations for multithreading on both GPU and CPU sides are performed to enhance computing throughput and improve memory efficiency. Our experiments demonstrate nearly ideal strong and weak scalabilities on up to 3,750 nodes of the Tianhe-1A. The largest run sustains a performance of 0.8 Pflops in double precision (32% of the peak performance), using 45,000 CPU cores and 3,750 GPUs.

关键词： parallel algorithm atmospheric modeling GPU heterogeneous system communication-computation overlap scalability

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