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Copperhead: Compiling an Embedded Data parallel Language 11

Copperhead: Compiling an Embedded Data Parallel Language

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16th acm symposium on principles and practice of parallel programming

作者： Catanzaro, Bryan Garland, Michael Keutzer, Kurt Univ Calif Berkeley Berkeley CA 94720 USA

ISBN: (纸本)9781450301190

Modern parallel microprocessors deliver high performance on applications that expose substantial fine-grained data parallelism. Although data parallelism is widely available in many computations, implementing data parallel algorithms in low-level languages is often an unnecessarily difficult task. The characteristics of parallel microprocessors and the limitations of current programming methodologies motivate our design of Copperhead, a high-level data parallel language embedded in Python. The Copperhead programmer describes parallel computations via composition of familiar data parallel primitives supporting both flat and nested data parallel computation on arrays of data. Copperhead programs are expressed in a subset of the widely used Python programming language and interoperate with standard Python modules, including libraries for numeric computation, data visualization, and analysis. In this paper, we discuss the language, compiler, and runtime features that enable Copperhead to efficiently execute data parallel code. We define the restricted subset of Python which Copperhead supports and introduce the program analysis techniques necessary for compiling Copperhead code into efficient low-level implementations. We also outline the runtime support by which Copperhead programs interoperate with standard Python modules. We demonstrate the effectiveness of our techniques with several examples targeting the CUDA platform for parallel programming on GPUs. Copperhead code is concise, on average requiring 3.6 times fewer lines of code than CUDA, and the compiler generates efficient code, yielding 45-100% of the performance of hand-crafted, well optimized CUDA code.

关键词： Python Data parallelism GPU Algorithms Design Performance

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Accelerating CUDA Graph Algorithms at Maximum Warp 11

Accelerating CUDA Graph Algorithms at Maximum Warp

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16th acm symposium on principles and practice of parallel programming

作者： Hong, Sungpack Kim, Sang Kyun Oguntebi, Tayo Olukotun, Kunle Stanford Univ Comp Syst Lab Stanford CA 94305 USA

ISBN: (纸本)9781450301190

Graphs are powerful data representations favored in many computational domains. Modern GPUs have recently shown promising results in accelerating computationally challenging graph problems but their performance suffers heavily when the graph structure is highly irregular, as most real-world graphs tend to be. In this study, we first observe that the poor performance is caused by work imbalance and is an artifact of a discrepancy between the GPU programming model and the underlying GPU architecture. We then propose a novel virtual warp-centric programming method that exposes the traits of underlying GPU architectures to users. Our method significantly improves the performance of applications with heavily imbalanced workloads, and enables trade-offs between workload imbalance and ALU underutilization for fine-tuning the performance. Our evaluation reveals that our method exhibits up to 9x speedup over previous GPU algorithms and 12x over single thread CPU execution on irregular graphs. When properly configured, it also yields up to 30% improvement over previous GPU algorithms on regular graphs. In addition to performance gains on graph algorithms, our programming method achieves 1.3x to 15.1x speedup on a set of GPU benchmark applications. Our study also confirms that the performance gap between GPUs and other multi-threaded CPU graph implementations is primarily due to the large difference in memory bandwidth.

关键词： Algorithms Performance parallel graph algorithms CUDA GPGPU

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Achieving a Single Compute Device Image in OpenCL for Multiple GPUs 11

Achieving a Single Compute Device Image in OpenCL for Multip...

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16th acm symposium on principles and practice of parallel programming

作者： Kim, Jungwon Kim, Honggyu Lee, Joo Hwan Lee, Jaejin Seoul Natl Univ Ctr Manycore Programming Sch Comp Sci & Engn Seoul 151744 South Korea

ISBN: (纸本)9781450301190

In this paper, we propose an OpenCL framework that treats multiple GPUs as a single compute device. Providing the single GPU image makes an OpenCL application written for a single GPU portable to the GPGPU systems with multiple GPUs. It also makes the application exploit the full computing power of the multiple GPUs and the entire amount of GPU memories available in the system. Our OpenCL framework automatically distributes at run time an OpenCL kernel written for a single GPU into multiple CUDA kernels that execute on the multiple GPUs. It applies a run-time memory access range analysis to the kernel by performing a sampling run and identifies an optimal workload distribution for the kernel. To achieve a single compute device image, the runtime maintains a virtual device memory that is allocated in the main memory of the GPGPU system. The OpenCL runtime treats the memory as if it were the memory of a single GPO device and keeps it consistent to the memories of the multiple GPUs. Our OpenCL-C-to-C translator generates the sampling code from the OpenCL kernel code and our OpenCL-C-to-CUDA-C translator generates the CUDA kernel code for the distributed OpenCL kernel. We show the effectiveness of our OpenCL framework by implementing the OpenCL runtime and the two source-to-source translators. We evaluate its performance with a GPGU system that contains eight GPUs using eleven OpenCL benchmark applications.

关键词： Algorithm Design Experimentation Languages Measurement Performance OpenCL Compilers Runtime Access range analysis Workload distribution Virtual device memory

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Ordered vs. Unordered: a Comparison of parallelism and Work-efficiency in Irregular Algorithms 11

Ordered <i>vs</i>. Unordered: a Comparison of Parallelism an...

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16th acm symposium on principles and practice of parallel programming

作者： Hassaan, M. Amber Burtscher, Martin Pingali, Keshav Texas State Univ San Marcos Dept Comp Sci San Marcos TX USA Univ Texas Austin Dept Comp Sci Austin TX 78712 USA

ISBN: (纸本)9781450301190

Outside of computational science, most problems are formulated in terms of irregular data structures such as graphs, trees and sets. Unfortunately, we understand relatively little about the structure of parallelism and locality in irregular algorithms. In this paper, we study several algorithms for four such problems: discrete-event simulation, single-source shortest path, breadth-first search, and minimal spanning trees. We show that these algorithms can be classified into two categories that we call unordered and ordered, and demonstrate experimentally that there is a trade-off between parallelism and work efficiency: unordered algorithms usually have more parallelism than their ordered counterparts for the same problem, but they may also perform more work. Nevertheless, our experimental results show that unordered algorithms typically lead to more scalable implementations, demonstrating that less work-efficient irregular algorithms may be better for parallel execution.

关键词： Irregular Algorithms Amorphous Data-parallelism parallel Breadth-first Search Single-Source Shortest Path Discrete-Event Simulation Minimal Spanning Tree Multicore processors Galois system Algorithms Languages Performance

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The STAPL parallel Container Framework 11

The STAPL Parallel Container Framework

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16th acm symposium on principles and practice of parallel programming

作者： Tanase, Gabriel Buss, Antal Fidel, Adam Harshvardhan Papadopoulos, Ioannis Pearce, Olga Smith, Timmie Thomas, Nathan Xu, Xiabing Mourad, Nedal Vu, Jeremy Bianco, Mauro Amato, Nancy M. Rauchwerger, Lawrence Texas A&M Univ Parasol Lab Dept Comp Sci & Engn College Stn TX 77843 USA

ISBN: (纸本)9781450301190

The Standard Template Adaptive parallel Library (STAPL) is a parallel programming infrastructure that extends C++ with support for parallelism. It includes a collection of distributed data structures called pContainers that are thread-safe, concurrent objects, i.e., shared objects that provide parallel methods that can be invoked concurrently. In this work, we present the STAPL parallel Container Framework (PCF), that is designed to facilitate the development of generic parallel containers. We introduce a set of concepts and a methodology for assembling a pContainer from existing sequential or parallel containers, without requiring the programmer to deal with concurrency or data distribution issues. The PCF provides a large number of basic parallel data structures (e.g., pArray, pList, pVector, pMatrix, pGraph, pMap, pSet). The PCF provides a class hierarchy and a composition mechanism that allows users to extend and customize the current container base for improved application expressivity and performance. We evaluate STAPL pContainer performance on a CRAY XT4 massively parallel system and show that pContainer methods, generic pAlgorithms, and different applications provide good scalability on more than 16,000 processors.

关键词： parallel programming Languages Libraries Data Structures Languages Design Performance

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COREMU: A Scalable and Portable parallel Full-system Emulator 11

COREMU: A Scalable and Portable Parallel Full-system Emulato...

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16th acm symposium on principles and practice of parallel programming

作者： Wang, Zhaoguo Liu, Ran Chen, Yufei Wu, Xi Chen, Haibo Zhang, Weihua Zang, Binyu Fudan Univ Parallel Proc Inst Shanghai Peoples R China

ISBN: (纸本)9781450301190

This paper presents the open-source COREMU, a scalable and portable parallel emulation framework that decouples the complexity of parallelizing full-system emulators from building a mature sequential one. The key observation is that CPU cores and devices in current (and likely future) multiprocessors are loosely-coupled and communicate through well-defined interfaces. Based on this observation, COREMU emulates multiple cores by creating multiple instances of existing sequential emulators, and uses a thin library layer to handle the inter-core and device communication and synchronization, to maintain a consistent view of system resources. COREMU also incorporates lightweight memory transactions, feedback-directed scheduling, lazy code invalidation and adaptive signal control to provide scalable performance. To make COREMU useful in practice, we also provide some preliminary tools and APIs that can help programmers to diagnose performance problems and (concurrency) bugs. A working prototype, which reuses the widely-used QEMU as the sequential emulator, is with only 2500 lines of code (LOCs) changes to QEMU. It currently supports x64 and ARM platforms, and can emulates up to 255 (1) cores running commodity OSes with practical performance, while QEMU cannot scale above 32 cores. A set of performance evaluation against QEMU indicates that, COREMU has negligible uniprocessor emulation overhead, performs and scales significantly better than QEMU. We also show how COREMU could be used to diagnose performance problems and concurrency bugs of both OS kernel and parallel applications.

关键词： Full-system Emulator parallel Emulator Multicore Design Experimentation Performance

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Lifeline-based Global Load Balancing 11

Lifeline-based Global Load Balancing

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16th acm symposium on principles and practice of parallel programming

作者： Saraswat, Vijay Kambadur, Prabhanjan Kodali, Sreedhar Grove, David Krishnamoorthy, Sriram Pacific NW Natl Lab Richland WA 99352 USA

ISBN: (纸本)9781450301190

On shared-memory systems, Cilk-style work-stealing [5] has been used to effectively parallelize irregular task-graph based applications such as Unbalanced Tree Search (UTS) [24, 28]. There are two main difficulties in extending this approach to distributed memory. In the shared memory approach, thieves (nodes without work) constantly attempt to asynchronously steal work from randomly chosen victims until they find work. In distributed memory, thieves cannot autonomously steal work from a victim without disrupting its execution. When work is sparse, this results in performance degradation. In essence, a direct extension of traditional work-stealing to distributed memory violates the work-first principle underlying work-stealing. Further, thieves spend useless CPU cycles attacking victims that have no work, resulting in system inefficiencies in multi-programmed contexts. Second, it is non-trivial to detect active distributed termination (detect that programs at all nodes are looking for work, hence there is no work). This problem is well-studied and requires careful design for good performance. Unfortunately, in most existing languages/frameworks, application developers are forced to implement their own distributed termination detection. In this paper, we develop a simple set of ideas that allow work-stealing to be efficiently extended to distributed memory. First, we introduce lifeline graphs: low-degree, low-diameter, fully-connected directed graphs. Such graphs can be constructed from k-dimensional hypercubes. When a node is unable to find work after w unsuccessful steals, it quiesces after informing the outgoing edges in its lifeline graph. Quiescent nodes do not disturb other nodes. A quiesced node is reactivated when work arrives from a lifeline, and itself shares this work with those of its incoming lifelines that are activated. Termination occurs precisely when computation at all nodes has quiesced. In a language such as X10, such passive distributed terminati

关键词： UTS global load balancing distributed computing X10 work-stealing parallel programming Algorithms Design

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A Domain-Specific Approach To Heterogeneous parallelism

A Domain-Specific Approach To Heterogeneous Parallelism

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16th acm symposium on principles and practice of parallel programming

作者： Chafi, Hassan Sujeeth, Arvind K. Brown, Kevin J. Lee, HyoukJoong Atreya, Anand R. Olukotun, Kunle Stanford Univ Pervas Parallelism Lab Stanford CA 94305 USA

Exploiting heterogeneous parallel hardware currently requires mapping application code to multiple disparate programming models. Unfortunately, general-purpose programming models available today can yield high performance but are too low-level to be accessible to the average programmer. We propose leveraging domain-specific languages (DSLs) to map high-level application code to heterogeneous devices. To demonstrate the potential of this approach we present OptiML, a DSL for machine learning. OptiML programs are implicitly parallel and can achieve high performance on heterogeneous hardware with no modification required to the source code. For such a DSL-based approach to be tractable at large scales, better tools are required for DSL authors to simplify language creation and parallelization. To address this concern, we introduce De lite, a system designed specifically for DSLs that is both a framework for creating an implicitly parallel DSL as well as a dynamic runtime providing automated targeting to heterogeneous parallel hardware. We show that OptiML running on De lite achieves single-threaded, parallel, and GPU performance superior to explicitly parallelized MATLAB code in nearly all cases.

关键词： parallel programming Domain-Specific Languages Dynamic Optimizations Languages Performance

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PPoPP'10 - proceedings of the 2010 acm sigplan symposium on principles and practice of parallel programming

PPoPP'10 - Proceedings of the 2010 ACM SIGPLAN Symposium on ...

引用

2010 acm sigplan symposium on principles and practice of parallel programming, PPoPP'10

ISBN: (纸本)9781605587080

The proceedings contain 46 papers. The topics discussed include: exascale computing: the challenges and opportunities in the next decade;structure-driven optimizations for amorphous data-parallel programs;compiler aided selective lock assignment for improving the performance of software transactional memory;debugging programs that use atomic blocks and transactional memory;scheduling support for transactional memory contention management;leveraging parallel nesting in transactional memory;extreme scale computing: challenges and opportunities;scalable communication protocols for dynamic sparse data exchange;thread to strand binding of parallel network applications in massive multi-threaded systems;improving parallelism and locality with asynchronous algorithms;using data structure knowledge for efficient lock generation and strong atomicity;modeling advanced collective communication algorithms on cell-based systems;and towards scalable and transparent parallelization of multiplayer games using transactional memory support.

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A Domain-Specific Approach To Heterogeneous parallelism 11

A Domain-Specific Approach To Heterogeneous Parallelism

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International acm Special Interest Group on programming Languages Conference on principles and practice of Declarative programming

作者： Hassan Chafi HyoukJoong Lee Arvind K. Sujeeth Anand R. Atreya Kevin J. Brown Kunle Olukotun Pervasive Parallelism Laboratory Stanford University

ISBN: (纸本)9781450313742

Exploiting heterogeneous parallel hardware currently requires mapping application code to multiple disparate programming models. Unfortunately, general-purpose programming models available today can yield high performance but are too low-level to be accessible to the average programmer. We propose leveraging domain-specific languages (DSLs) to map high-level application code to heterogeneous devices. To demonstrate the potential of this approach we present OptiML, a DSL for machine learning. OptiML programs are implicitly parallel and can achieve high performance on heterogeneous hardware with no modification required to the source code. For such a DSL-based approach to be tractable at large scales, better tools are required for DSL authors to simplify language creation and parallelization. To address this concern, we introduce Delite, a system designed specifically for DSLs that is both a framework for creating an implicitly parallel DSL as well as a dynamic runtime providing automated targeting to heterogeneous parallel hardware. We show that OptiML running on Delite achieves single-threaded, parallel, and GPU performance superior to explicitly parallelized MATLAB code in nearly all cases.

关键词： Languages Performance parallel programming Domain-Specific Languages Dynamic Optimizations

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