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共 369 条记录，以下是71-80 订阅

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Brief Announcement: Serial-parallel Reciprocity in Dynamic Multithreaded Languages 10

Brief Announcement: Serial-Parallel Reciprocity in Dynamic M...

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22nd acm symposium on parallelism in algorithms and architectures

作者： Agrawal, Kunal Lee, I-Ting Angelina Sukha, Jim Washington Univ St Louis MO 63130 USA

ISBN: (纸本)9781450300797

In dynamically multithreaded platforms that employ work stealing, there appears to be a fundamental tradeoff between providing provably good time and space bounds and supporting SP-reciprocity, the property of allowing arbitrary calling between parallel and serial code, including legacy serial binaries. Many known dynamically multithreaded platforms either fail to support SP-reciprocity or sacrifice on the provable time and space bounds that an efficient work-stealing scheduler could otherwise guarantee We describe PR-Cilk, a design of a runtime system that supports SP-reciprocity in Cilk and provides provable bounds on time and space In order to maintain the space bound, PR-Cilk uses subtree-restricted work stealing. We show that with subtree-restricted work stealing. PR-Cilk provides the same guarantee on stack space usage as ordinary Cilk. The completion time guaranteed by PR-Cilk is slightly worse than ordinary Cilk Nevertheless, if the number of times a C function calls a Cilk function is small, or if each Cilk function called by a C function is sufficiently parallel. PR-Cilk still guarantees linear speedup.

关键词： Cilk dynamic multithreading Intel Threading Building Blocks scheduling work stealing serial-parallel reciprocity

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Implementing and Evaluating Nested parallel Transactions in Software Transactional Memory 10

Implementing and Evaluating Nested Parallel Transactions in ...

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22nd acm symposium on parallelism in algorithms and architectures

作者： Baek, Woongki Bronson, Nathan Kozyrakis, Christos Olukotun, Kunle Stanford Univ Comp Syst Lab Stanford CA 94305 USA

ISBN: (纸本)9781450300797

Transactional Memory (TM) is a promising technique that simplifies parallel programming for shared-memory applications To date, most TM systems have been designed to efficiently support single-level parallelism To achieve widespread use and maximize performance gains. TM must support nested parallelism available in many applications and supported by several programming models. We present NesTM, a software TM (STM) system that supports closed-nested parallel transactions NesTM is based on a high-performance. blocking STM that uses eager version management and word-granularity conflict detection Its algorithm targets the state and runtime overheads of nested parallel transactions We also describe several subtle correctness issues in supporting nested parallel transactions in NesTM and discuss their performance impact Through our evaluation, we quantitatively analyze the performance of NesTM using STAMP applications and microbenchmarks based on concurrent data structures. First, we show that the performance overhead of NesTM is reasonable when single-level parallelism is used. Second. we quantify the incremental overhead of NesTM when the parallelism is exploited in deeper nesting levels and draw conclusions that can be useful in designing a nesting-aware TM runtime environment. Finally, we demonstrate a use-case where nested parallelism improves the performance of a transactional microbenchmark

关键词： Transactional Memory Nested parallelism parallel Programming

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New algorithms for Efficient parallel String Comparison 10

New Algorithms for Efficient Parallel String Comparison

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22nd acm symposium on parallelism in algorithms and architectures

作者： Krusche, Peter Tiskin, Alexander Univ Warwick Dept Comp Sci Coventry CV4 7AL W Midlands England

ISBN: (纸本)9781450300797

In this paper. we show new parallel algorithms for a set of classical string comparison problems. computation of string alignments. longest common subsequences (LCS) or edit distances, and longest increasing subsequence computation. These problems have a wide range of applications, in particular in computational biology and signal processing. We discuss the scalability of our new parallel algorithms in computation time, in memory, and in commumcation Our new algorithms are based on an efficient parallel method for (min, +)-multiplication of distance matrices The core result of this paper is a scalable parallel algorithm for multiplying Implicit simple unit-Monge matrices of size n x n on p processors using lime O(n log n/p), communication O(n log p/p) and O( log p) supersteps. This algorithm allows us to implement scalable LCS computation for two strings of length n using time O(n(2)/p) and communication O(n/root P) requiring local memory of size O(n/root P) on each processor Furthermore, our algorithm can be used to obtain the first generally work-scalable algorithm for computing the longest increasing subsequence (LIS) Our algorithm for LIS computation requires computation O(n log(2) n/p), communication O(n log(2) p/p), and O(log(2) p) supersteps for computing the LIS of a sequence of length n This is within a log n factor of work-optimality for the LIS problem. which can be solved sequentially in time O(n log n) in the comparison-based model. Our LIS algorithm is also within a log p-factor of achieving perfectly scalable communication and furthermore has perfectly scalable memory size requirements of O(n/p) per processor

关键词： BSP algorithms longest common subsequences longest increasing subsequences

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The Cilkview Scalability Analyzer 10

The Cilkview Scalability Analyzer

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22nd acm symposium on parallelism in algorithms and architectures

作者： He, Yuxiong Leiserson, Charles E. Leiserson, William M. Microsoft Res Redmond WA USA

ISBN: (纸本)9781450300797

The Cilkview scalability analyzer is a software tool for profiling, estimating scalability, and benchmarking multithreaded Cilk++ applications Cilkview monitors logical parallelism during an instrumented execution of the Cilk++ application on a single processing core. As Cilkview executes, it analyzes logical dependencies within the computation to determine its work and span (critical-path length) These metrics allow Cilkview to estimate parallelism and predict how the application will scale with the number of processing cores. In addition, Cilkview analyzes scheduling overhead using the concept of a "burdened dag," which allows it to diagnose performance problems in the application due to an insufficient grain size of parallel subcomputations Cilkview employs the Pin dynamic-instrumentation framework to collect metrics during a serial execution of the application code It operates directly on the optimized code rather than on a debug version Metadata embedded by the Cilk++ compiler in the binary executable identifies the parallel control constructs in the executing application This approach introduces little or no overhead to the program binary in normal runs. Cilkview can perform real-time scalability benchmarking automatically, producing gnuplot-compatible output that allows developers to compare an application's performance with the tool's predictions. If the program performs beneath the range of expectation, the programmer can be confident in seeking a cause such as insufficient memory bandwidth, false sharing, or contention, rather than inadequate parallelism or insufficient exam size.

关键词： Burdened parallelism Cilk plus Cilkview dag model multicore programming multithreading parallelism parallel programming performance scalability software tools span speedup work

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A Work-Efficient parallel Breadth-First Search Algorithm (or How to Cope with the Nondeterminism of Reducers) 10

A Work-Efficient Parallel Breadth-First Search Algorithm (or...

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22nd acm symposium on parallelism in algorithms and architectures

作者： Leiserson, Charles E. Schardl, Tao B. MIT Comp Sci & Artificial Intelligence Lab Cambridge MA 02139 USA

ISBN: (纸本)9781450300797

We have developed a multithreaded implementation of breadth-first search (BFS) of a sparse graph using the Cilk++ extensions to C++. Our PBFS program on a single processor runs as quickly as a standard C++ breadth-first search implementation PBFS achieves high work-efficiency by using a novel implementation of a multiset data structure, called a "bag," in place of the FIFO queue usually employed in serial breadth-first search algorithms For a variety of benchmark Input graphs whose diameters are significantly smaller than the number of vertices a condition met by many real-world graphs PBFS demonstrates good speedup with the number of processing cores. Since PBFS employs a nonconstant-time "reducer" a "hyper-object" feature of Cilk++ the work inherent in a PM execution depends nondeterministically on how the underlying work-stealing scheduler load-balances the computation We provide a general method for analyzing nondeterministic programs that use reducers PBFS also is nondeterministic in that it contains benign races which affect its performance but not its correctness Fixing these races with mutual-exclusion locks slows down PBFS empirically, but it makes the algorithm amenable to analysis In particular, we show that for a graph G = (V, E) with diameter D and bounded out-degree, this data-race-free version of PBFS algorithm runs in time O((V + E)/P + Dlg(3) (V/D)) on P processors, which means that it attains near-perfect linear speedup if P << (V + E)I Dlg(3) (V/D).

关键词： Breadth-first search Cilk graph algorithms hyperobjects multithreading nondeterminism parallel algorithms reducers work-stealing

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Brief Announcement: Performance Potential of an Easy-to-Program PRAM-On-Chip Prototype Versus State-of-the-Art Processor 09

Brief Announcement: Performance Potential of an Easy-to-Prog...

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21st acm symposium on parallelism in algorithms and architectures

作者： Caragea, George C. Saybasili, A. Beliz Wen, Xingzhi Vishkin, Uzi Univ Maryland College Pk MD 20742 USA

ISBN: (纸本)9781605586069

we compare the Paraleap FPCA computer, a 64-processor hardware prototype of the PRAM-driven XMT architecture, with an Intel Core 2 Duo processor and show that Paraleap outperforms the Intel processor by up to 13.89x in terms of cycle counts. The comparison favors the Intel design, since the silicon area of an ASIC implementation of the 64-processor XMT design is the same as that of a single core.

关键词： paraleap parallel algorithms xmt PRAM explicit multi-treading ease of programming on-chip parallel processor

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Brief Announcement: Low Depth Cache-Oblivious Sorting 09

Brief Announcement: Low Depth Cache-Oblivious Sorting

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21st acm symposium on parallelism in algorithms and architectures

作者： Blelloch, Guy E. Gibbons, Phillip B. Simhadri, Harsha Vardhan Carnegie Mellon Univ Pittsburgh PA 15213 USA

ISBN: (纸本)9781605586069

Cache-oblivious algorithms have the advantage of achieving good sequential cache complexity across all levels of a multi-level cache hierarchy, regardless of the specifies (cache size and cache line size) of each level. In this paper, we describe cache-oblivious sorting algorithms with optimal work, optimal cache complexity and polylogarithmic depth. Using known mappings, these lead to low cache complexities on shared-memory multiprocessors with a single level of private caches or a single shared cache. Moreover, the low cache complexities extend to shared-memory multiprocessors with common configurations of multi-level caches. The key factor in the low cache complexity on multiprocessors is the low depth of the algorithms we propose.

关键词： Cache-oblivious algorithms sorting parallel algorithms multiprocessors schedulers

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SPAA'09 - proceedings of the 21st annual symposium on parallelism in algorithms and architectures

SPAA'09 - Proceedings of the 21st Annual Symposium on Parall...

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21st annual symposium on parallelism in algorithms and architectures, SPAA'09

ISBN: (纸本)9781605586069

The proceedings contain 43 papers. The topics discussed include: speed scaling of processes with arbitrary speedup curves on a multiprocessor;the bell is ringing in speed-scaled multiprocessor scheduling;mapping filtering streaming applications with communication costs;scheduling to minimize staleness and stretch in real-time data warehouses;parameterized maximum and average degree approximation in topic-based publish-subscribe overlay network design;selfishness in transactional memory;at-most-once semantics in asynchronous shared memory;memory models: a case for rethinking parallel languages and hardware;the life and times of a ZooKeeper;Cassandra - a structured storage system on a P2P network;Pregel: a system for large-scale graph processing;towards transactional memory semantics for C++;on avoiding spare aborts in transactional memory;inherent limitations on disjoint-access parallel implementations of transactional memory;reducers and other Cilk++ hyperobjects;and beyond nested parallelism: tight bounds on work-stealing overheads for parallel futures.

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Inherent Limitations on Disjoint-Access parallel Implementations of Transactional Memory (Preliminary Version) 09

Inherent Limitations on Disjoint-Access Parallel Implementat...

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21st acm symposium on parallelism in algorithms and architectures

作者： Attiya, Hagit Hillel, Eshcar Milani, Alessia Technion Israel Inst Technol Dept Comp Sci IL-32000 Haifa Israel

ISBN: (纸本)9781605586069

Transactional memory (TM) is a promising approach for designing concurrent data structures, and it is essential to develop better understanding of the formal properties that can be achieved by TM implementations. Two fundamental properties of TM implementations are disjoint-access parallelism, which is critical for their scalability, and the invisibility of read operations, which reduces memory contention. This paper proves an inherent tradeoff for implementations of transactional memories: they cannot be both disjoint-access parallel and have read-only transactions that are invisible and always terminate successfully. In fact, a lower bound of Omega(t) is proved on the number of writes needed in order to implement a read-only transaction of t items, which successfully terminates in a disjoint-access parallel TM implementation. The results assume strict serializability and thus hold under the assumption of opacity. It is shown how to extend the results to hold also for weaker consistency conditions, serializability and snapshot isolation.

关键词： Transactional memory disjoint-access parallelism partial snapshots lower bound impossibility result

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parallel Sparse Matrix-Vector and Matrix-Transpose-Vector Multiplication Using Compressed Sparse Blocks 09

Parallel Sparse Matrix-Vector and Matrix-Transpose-Vector Mu...

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21st acm symposium on parallelism in algorithms and architectures

作者： Buluc, Aydin Fineman, Jeremy T. Frigo, Matteo Gilbert, John R. Leiserson, Charles E. Univ Calif Santa Barbara Dept Comp Sci Santa Barbara CA 93106 USA

ISBN: (纸本)9781605586069

This paper introduces a storage format for sparse matrices, called compressed sparse blocks (CSB), which allows both Ax and A(x)(inverted perpendicular) to be computed efficiently in parallel, where A is an n x n sparse matrix with nnz >= n nonzeros and x is a dense n-vector. Our algorithms use Theta(nnz) work (serial running time) and Theta(root nlgn) span (critical-path length), yielding a parallelism of Theta(nnz/root nlgn), which is amply high for virtually any large matrix. The storage requirement for CSB is esssentially the same as that for the more-standard compressed-sparse-rows (CSR) format, for which computing Ax in parallel is easy but A(x)(inverted perpendicular) is difficult. Benchmark results indicate that on one processor, the CSB algorithms for Ax and A(x)(inverted perpendicular) run just as fast as the CSR algorithm for Ax, but the CSB algorithms also scale up linearly with processors until limited by off-chip memory bandwidth.

关键词： Compressed sparse blocks compressed sparse columns compressed sparse rows matrix transpose matrix-vector multiplication multithreaded algorithm parallelism span sparse matrix storage format work

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