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检索条件"任意字段=Proceedings of the seventh workshop on Parallel and distributed simulation"

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On extending more parallelism to serial simulators 96

On extending more parallelism to serial simulators

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proceedings of the tenth workshop on parallel and distributed simulation

作者： David Nicol Philip Heidelberger Department of Computer Science The College of William and Mary Williamsburg VA IBM T.J. Watson Research Center P.O. Box 704 Yorktown Heights NY

ISBN: (纸本)9780818675393

The Utilitarian parallel Simulator (U.P.S.) extends parallelism to the CSIM sequential simulation tool by providing several new modeling constructs. Using conservative synchronization techniques, these constructs automatically support time-synchronized communications between CSIM submodels running on different processors. This paper describes extensions to U.P.S. that allow the user to assist U.P.S. by providing additional "process lookahead," thereby reducing the frequency of synchronizations. The use and effect on performance of process lookahead is described for several models. In a mobile cellular communications model, the use of process lookahead results in up to a 60% improvement in speedup on 32 nodes of the IBM SP2. A factor of 3 improvement is obtained on a closed queueing network simulation running on 32 nodes of the Intel Paragon.

关键词： queueing system communications network parallel simulation

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Optimistic simulation of parallel architectures using program executables 96

Optimistic simulation of parallel architectures using progra...

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proceedings of the tenth workshop on parallel and distributed simulation

作者： Sashikanth Chandrasekaran Mark D. Hill Computer Sciences Department University of Wisconsin-Madison 1210 West Dayton Street Madison WI

ISBN: (纸本)9780818675393

A key tool of computer architects is computer simulation at the level of detail that can execute program executables. The time and memory requirements of such simulations can be enormous, especially when the machine under design-the target-is a parallel machine. Thus, it is attractive to use parallel simulation, as successfully demonstrated by the Wisconsin Wind Tunnel (WWT). WWT uses a conservative simulation algorithm and eschews network simulation to make lookahead adequate. Nevertheless, we find most of WWT's slowdown to be due to the synchronization overhead in the conservative simulation algorithm. This paper examines the use of optimistic algorithms to perform parallel simulations of parallel machines. We first show that we can make optimistic algorithms work correctly even with WWT's direct execution of program executables. We checkpoint processor registers (integer, floating-point, and condition codes) and use executable editing to log the value of memory words just before they are overwritten by stores. Second, we consider the performance of two optimistic algorithms. The first executes programs optimistically, but performs protocol events (e.g., sending messages) conservatively. The second executes everything optimistically and is similar to Time Warp with lazy message cancellation. Unfortunately, both approaches make parallel simulation performance worse for the default WWT assumptions. We conclude by speculating on the performance of optimistic simulation when simulating (1) target network details, and (2) on hosts with high message latencies and no synchronization hardware.

关键词： Optimistic simulation State Saving parallel Machines Direct Execution

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Semi-asynchronous checkpointing for optimistic simulation on a Myrinet based NOW

Semi-asynchronous checkpointing for optimistic simulation on...

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workshop on Principles of Advanced and distributed simulation (PADS)

作者： F. Quaglia A. Santoro Dipartimento di Informatica e Sistemistica Università di Roma La Sapienza Rome Italy

ISBN: (纸本)076951104X

Great effort has been devoted to the design of optimized checkpointing strategies for optimistic parallel discrete event simulators. On the other hand, there is less work being done in the direction of improving the execution mode of any single checkpoint operation. Specifically, checkpoint operations are typically charged to the CPU, thus leading to freezing of the simulation application while checkpointing is in progress, i.e. the execution mode of the checkpointing protocol is typically synchronous. In this paper, we focus on improvements of the execution mode and present a software architecture, designed for Myrinet-based networks of workstations (NOWs), to avoid application freezing during any checkpoint operation, thus moving the execution itself towards an asynchronous mode. This is done by charging checkpoint operations to a hardware component that is distinct from the CPU, namely a DMA (direct memory access) engine. On the other hand, totally asynchronous checkpointing could suffer from data inconsistency whenever the content of a state buffer is accessed for further modifications while a checkpoint operation involving it has not yet completed. To avoid this, the architecture includes functionalities for resynchronization on demand. We have used these functionalities to implement an execution mode of the checkpointing protocol that we refer to as semi-asynchronous. By the results of an experimental study, we argue that the semi-asynchronous mode can be an effective solution to almost completely remove the delay associated with any checkpoint operation from the completion time of the simulation.

关键词： Checkpointing Design optimization Application software Discrete event simulation Protocols Software architecture Software design Workstations Hardware Engines

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An improved cost function for static partitioning of parallel circuit simulations using a conservative synchronization protocol 95

An improved cost function for static partitioning of paralle...

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proceedings of the ninth workshop on parallel and distributed simulation

作者： Kevin L. Kapp Thomas C. Hartrum Tom S. Wailes Department of Electrical and Computer Engineering School of Engineering Air Force Institute of Technology

ISBN: (纸本)9780818671203

Distributing computation among multiple processors is one approach to reducing simulation time for large VLSI circuit designs. However, parallel simulation introduces the problem of how to partition the logic gates and system behaviors of the circuit among the available processors in order to obtain maximum speedup. A complicating factor that is often ignored is the effect of the time-synchronization protocol (conservative [1] or optimistic [2]). Inherent in the partitioning problem is the question of how to effectively measure the relative quality of a partition. This paper describes an objective cost function for measuring the relative quality of a task partition that includes a synchronization factor for a conservative NULL-message protocol. A graph-based partitioning tool based on this cost function is used to perform the static task allocation for parallel simulation of a structural VHDL circuit. Results for two 1000 – 4000 gate circuits demonstrate that the additional consideration of the synchronization protocol in the cost function generates partitions that exhibit improved speedup.

关键词： logic CAD time-synchronization protocol parallel programming logic partitioning static partitioning conservative synchronization protocol VLSI circuit design parallel simulation parallel circuit simulations objective cost function graph-based partitioning tool discrete event simulation circuit analysis computing synchronization protocol

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CHIUW 2020 The seventh Annual Chapel Implementers and Users workshop

CHIUW 2020 The Seventh Annual Chapel Implementers and Users ...

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IEEE International Symposium on parallel and distributed Processing workshops and Phd Forum (IPDPSW)

作者： Brad Chamberlain

ISBN: (数字)9781728174457

ISBN: (纸本)9781728174570

The Chapel Implementers and Users workshop (CHIUW) is the primary annual gathering of the Chapel community. Its main goal is to bring developers and users of Chapel together on an regular basis to share progress and results with one another and with members of the broader parallel programming community. CHIUW typically also fosters new Chapel collaborations and endeavors through a code camp session held on the following day. Anyone with interest in Chapel is encouraged to attend CHIUW, from the seasoned user or developer to someone simply curious to learn more. This year, due to the COVID-19 pandemic, we are holding CHIUW in an online fom1at. This year, CHIUW received 13 submissions from 12 1ead authors, two of which were full research papers while the other 11 were extended abstracts. Each submitted extended abstract received four reviews from the program committee, while the research papers received 5-6. Due to our goal of making CHIUW as inclusive as possible, we ended up accepting eight of the submissions (including both papers) as full- length talks and tour as short talks (pending author interest), rejecting only one of the two submissions by the same lead author. After being accepted, one of the submissions upgraded from an extended abstract to a short paper with the program committee's approval. The accepted submissions can be found within these proceedings and describe recent work being done in improving Chapel's features, optimizing its performance, and using Chapel to target GPUs, as well as a variety of applications being pursued in Chapel including Computational Fluid Dynamics, graph algorithms such as Hypergraph Homology, and simulations of Ultralight Dark Matter.

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Colored Petri net methods for performance analysis of scalable high-speed interconnects

Colored Petri net methods for performance analysis of scalab...

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International Symposium on Modeling, Analysis and simulation of Computer and Telecommunication Systems (MASCOTS)

作者： L. Cherkasova A. Davis V. Kotov T. Rokicki Hewlett Packard Laboratories Palo Alto CA USA Comptuer Science Department University of Stanford Stanford CA USA

Large concurrent or distributed systems have proven notoriously difficult to comprehend due to their combinatoric complexity. There is a clear need for thorough formal system modeling at all design stages. Ease of use and validation capability are important criteria in method selection. It is important that the selection permit evaluation of design details with respect to performance and behavioral goals. Net models are a likely candidate to achieve the requisite needs of such a modeling environment. They provide both graphical and mathematical system modeling views which inherently enable both quantitative and qualitative analysis of the design. To demonstrate this claim, a colored Petri Net model and performance analysis of a particular scalable multiprocessor interconnect fabric is presented. The fundamental component of this fabric is an adaptive routing device, R2. The R2 fabric is based on the interconnection scheme used in the Mayfly parallel processing system.< >

关键词： Performance analysis Fabrics Routing Petri nets Modeling Topology Milling machines parallel processing Computer science Algorithm design and analysis

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A scheduling algorithm to optimize real-world applications

A scheduling algorithm to optimize real-world applications

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International Conference on distributed Computing Systems workshop

作者： M. Solar M. Inostroza University of Santiago Chile

This article presents a scheduling algorithm that assigns tasks represented in a directed acyclic graph (DAG). The behavior of the proposed algorithm is compared with the dominant sequence clustering (DSC) algorithm on a set of DAG tests. The tests were carried out on two sets of DAGs, one with tasks of arbitrary duration, and the other with tasks of unit time duration. When comparing the results for each algorithm in terms of parallel computation time, the proposed algorithm is superior in 75% of the cases, equal in 20% of the tests, and in those cases in which DSC outperforms the proposed algorithm (5% of the cases), it can be seen that the planning carried out by DSC uses a greater number of processors than the proposed algorithm, so that the performance in terms of CPU use is lower for DSC. The results obtained show that the proposed algorithm is superior in 100% of the cases when considering the number of processors used.

关键词： Scheduling algorithm Clustering algorithms Testing Concurrent computing parallel machines Computational modeling Aerospace simulation Process planning Processor scheduling Algorithm design and analysis

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The SPEEDES Persistence Framework and the Standard simulation Architecture 03

The SPEEDES Persistence Framework and the Standard Simulatio...

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proceedings of the seventeenth workshop on parallel and distributed simulation

作者： Dr. Jeffrey S. Steinman Jennifer W. Wong RAM Laboratories 10525 Vista Sorrento Parkway Suite 220 San Diego CA

ISBN: (纸本)9780769519708

This paper provides an overview of the SPEEDESpersistence framework that is currently used to automatecheckpoint/restart for the Joint simulation System. Thepersistence framework interfaces are documented in thispaper and are proposed standards for the Standardsimulation *** persistence framework fundamentally keeps trackof memory allocations and pointer references within ahigh-speed internal database linked with *** persistence, an object, and the collection of objectsit recursively references through pointers, can beautomatically packed into a buffer that is written to diskor sent as a message to another machine. Later, thatbuffer can be used to reconstruct the object and all of itsrecursively referenced objects. The reconstructed objectswill likely be instantiated at different memory *** persistence framework automatically updates allaffected pointer references to account for this *** persistence framework is fully integrated with theSPEEDES rollback infrastructure and built-in containerclass libraries that include an implementation of theStandard Template Library. These utilities automatesupport for optimistic event processing required by manyhigh-performance parallel and distributed timemanagement algorithms. In the future, persistence willenable dynamic load balancing algorithms to migratecomplex objects to different processors.

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A causality based time management mechanism for federated simulation

A causality based time management mechanism for federated si...

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workshop on Principles of Advanced and distributed simulation (PADS)

作者： Bu-Sung Lee Wentong Cai Junlan Zhou School of Computer Engineering Nanyang Technological University Singapore

ISBN: (纸本)076951104X

One of the six categories of management services provided in the Run Time Infrastructure (RTI) to federated simulations is time management. Currently, it provides only two message ordering policies, that is, time stamp ordering and receipt ordering. Temporal anomalies occurring during the execution of federation due to the heterogeneous latencies in the communication network are not handled in receipt ordering. While time stamp ordering eliminates the temporal anomalies entirely, it incurs great communication latency, and huge bandwidth requirement. The paper presents a novel time management mechanism which provides a less costly message ordering service, namely causal ordering, to federates. It does not require the specification of lookahead and allows federates that do not require stringent message ordering properties to achieve much more efficient execution. A series of experiments has been carried out to benchmark the performance of this new time management mechanism and the results show that it includes a slight overhead compared to the receipt ordering mechanism but achieves significant performance improvement over the time stamp ordering mechanism.

关键词： Delay Computational modeling Technology management Engineering management Bandwidth Computer simulation Communication networks Runtime Large-scale systems Communication system control

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Performance evaluation of an integrated instrumentation system

Performance evaluation of an integrated instrumentation syst...

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International Symposium on Modeling, Analysis and simulation of Computer and Telecommunication Systems (MASCOTS)

作者： A. Waheed D.T. Rover Department of Electrical Engineering Michigan State University East Lansing MI USA

With increasing sophistication of parallel tool development technologies, runtime data collection and management activities are receiving greater attention from tool developers. We define an instrumentation system (IS) as a set of modules and functions that collect runtime data from concurrent processes and support an integrated tool environment by sharing this data along with specific control information. Presently, it is not standard practice to formally evaluate the performance and functionality of a tool early in its development. Usability and efficiency studies of prototypical tools are emerging to alleviate this situation. However; the underlying IS is removed from the end-user and is part of system infrastructure, thus necessitating more rigorous evaluation. We are developing a structured approach to plan, design, model, realize, and test an IS, called the Vista IS, to appropriately address these issues.

关键词： Instruments Prototypes Runtime Technology management System testing Standards development Usability distributed computing Real time systems Engineering management

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